gwj / at91sam9263 · Commits

Commit 2d7272a5884d90ed1ac78fdb436621db1f192909

Authored by bellard
1 parent 30d6cb84

kernel command line support (Daniel Jacobowitz) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1687 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 19 additions and 2 deletions
hw/mips_r4k.c
  View file @2d7272a
... ... @@ -53,7 +53,7 @@ static void cpu_mips_update_count (CPUState *env, uint32_t count,
53 53 next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000);
54 54 if (next == now)
55 55 next++;
56   -#if 1
  56 +#if 0
57 57 if (logfile) {
58 58 fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
59 59 __func__, now, count, compare, next - now);
... ... @@ -84,7 +84,7 @@ static void mips_timer_cb (void *opaque)
84 84 CPUState *env;
85 85  
86 86 env = opaque;
87   -#if 1
  87 +#if 0
88 88 if (logfile) {
89 89 fprintf(logfile, "%s\n", __func__);
90 90 }
... ... @@ -103,23 +103,29 @@ void cpu_mips_clock_init (CPUState *env)
103 103  
104 104 static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
105 105 {
  106 +#if 0
106 107 if (logfile)
107 108 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
  109 +#endif
108 110 cpu_outb(NULL, addr & 0xffff, value);
109 111 }
110 112  
111 113 static uint32_t io_readb (void *opaque, target_phys_addr_t addr)
112 114 {
113 115 uint32_t ret = cpu_inb(NULL, addr & 0xffff);
  116 +#if 0
114 117 if (logfile)
115 118 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
  119 +#endif
116 120 return ret;
117 121 }
118 122  
119 123 static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
120 124 {
  125 +#if 0
121 126 if (logfile)
122 127 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
  128 +#endif
123 129 #ifdef TARGET_WORDS_BIGENDIAN
124 130 value = bswap16(value);
125 131 #endif
... ... @@ -132,15 +138,19 @@ static uint32_t io_readw (void *opaque, target_phys_addr_t addr)
132 138 #ifdef TARGET_WORDS_BIGENDIAN
133 139 ret = bswap16(ret);
134 140 #endif
  141 +#if 0
135 142 if (logfile)
136 143 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
  144 +#endif
137 145 return ret;
138 146 }
139 147  
140 148 static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
141 149 {
  150 +#if 0
142 151 if (logfile)
143 152 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
  153 +#endif
144 154 #ifdef TARGET_WORDS_BIGENDIAN
145 155 value = bswap32(value);
146 156 #endif
... ... @@ -154,8 +164,10 @@ static uint32_t io_readl (void *opaque, target_phys_addr_t addr)
154 164 #ifdef TARGET_WORDS_BIGENDIAN
155 165 ret = bswap32(ret);
156 166 #endif
  167 +#if 0
157 168 if (logfile)
158 169 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
  170 +#endif
159 171 return ret;
160 172 }
161 173  
... ... @@ -233,6 +245,11 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
233 245 initrd_size = 0;
234 246 }
235 247 env->PC = KERNEL_LOAD_ADDR;
  248 + /* Store command line. */
  249 + strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
  250 + /* FIXME: little endian support */
  251 + *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
  252 + *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
236 253 } else {
237 254 kernel_base = 0;
238 255 kernel_size = 0;
... ...