Commit 2d106186dfe0f97e3f88633350115ea62566e18c
1 parent
b7f4e503
EMAC:
add offset reduction for emac read/write function, so now it works with at91sam9
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hw/at91_emac.c
@@ -410,6 +410,8 @@ static uint32_t at91_emac_mem_read(void *opaque, target_phys_addr_t offset) | @@ -410,6 +410,8 @@ static uint32_t at91_emac_mem_read(void *opaque, target_phys_addr_t offset) | ||
410 | EMACState *s = opaque; | 410 | EMACState *s = opaque; |
411 | uint32_t isr; | 411 | uint32_t isr; |
412 | 412 | ||
413 | + offset &= EMAC_SIZE - 1; | ||
414 | + | ||
413 | switch (offset) { | 415 | switch (offset) { |
414 | case EMAC_CTL: | 416 | case EMAC_CTL: |
415 | return s->ctl; | 417 | return s->ctl; |
@@ -448,6 +450,8 @@ static void at91_emac_mem_write(void *opaque, target_phys_addr_t offset, | @@ -448,6 +450,8 @@ static void at91_emac_mem_write(void *opaque, target_phys_addr_t offset, | ||
448 | { | 450 | { |
449 | EMACState *s = opaque; | 451 | EMACState *s = opaque; |
450 | 452 | ||
453 | + offset &= EMAC_SIZE - 1; | ||
454 | + | ||
451 | switch (offset) { | 455 | switch (offset) { |
452 | case EMAC_CTL: | 456 | case EMAC_CTL: |
453 | s->ctl = value & ~(CTL_CLRSTAT | CTL_INCSTAT); | 457 | s->ctl = value & ~(CTL_CLRSTAT | CTL_INCSTAT); |