Commit 2c7c13d4b81d59dfe50ce4ae9afe1a34f2d573cf
1 parent
b7df4bcc
apic: Fix access to non-existent APIC
When running with -M isapc, there is no env->apic_state. Fix cpu_get/set_apic_* helpers to handle this corner case gracefully. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7048 c046a42c-6fe2-441c-8c8c-71466251a162
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8 additions
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3 deletions
hw/apic.c
... | ... | @@ -280,6 +280,8 @@ void cpu_set_apic_base(CPUState *env, uint64_t val) |
280 | 280 | #ifdef DEBUG_APIC |
281 | 281 | printf("cpu_set_apic_base: %016" PRIx64 "\n", val); |
282 | 282 | #endif |
283 | + if (!s) | |
284 | + return; | |
283 | 285 | s->apicbase = (val & 0xfffff000) | |
284 | 286 | (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); |
285 | 287 | /* if disabled, cannot be enabled again */ |
... | ... | @@ -294,14 +296,17 @@ uint64_t cpu_get_apic_base(CPUState *env) |
294 | 296 | { |
295 | 297 | APICState *s = env->apic_state; |
296 | 298 | #ifdef DEBUG_APIC |
297 | - printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase); | |
299 | + printf("cpu_get_apic_base: %016" PRIx64 "\n", | |
300 | + s ? (uint64_t)s->apicbase: 0); | |
298 | 301 | #endif |
299 | - return s->apicbase; | |
302 | + return s ? s->apicbase : 0; | |
300 | 303 | } |
301 | 304 | |
302 | 305 | void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) |
303 | 306 | { |
304 | 307 | APICState *s = env->apic_state; |
308 | + if (!s) | |
309 | + return; | |
305 | 310 | s->tpr = (val & 0x0f) << 4; |
306 | 311 | apic_update_irq(s); |
307 | 312 | } |
... | ... | @@ -309,7 +314,7 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) |
309 | 314 | uint8_t cpu_get_apic_tpr(CPUX86State *env) |
310 | 315 | { |
311 | 316 | APICState *s = env->apic_state; |
312 | - return s->tpr >> 4; | |
317 | + return s ? s->tpr >> 4 : 0; | |
313 | 318 | } |
314 | 319 | |
315 | 320 | /* return -1 if no bit is set */ | ... | ... |