gwj / at91sam9263 · Commits

Commit 2c2435bdd498ab177469bec25a44e915a4d4a63a

Authored by ths
1 parent a8303d18

Fix data type mixup, spotted by malc. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4724 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 4 additions and 10 deletions
target-mips/translate.c
  View file @2c2435b
... ... @@ -2595,11 +2595,8 @@ static inline void gen_mfc0_load32 (TCGv t, target_ulong off)
2595 2595  
2596 2596 static inline void gen_mfc0_load64 (TCGv t, target_ulong off)
2597 2597 {
2598   - TCGv r_tmp = tcg_temp_new(TCG_TYPE_I64);
2599   -
2600   - tcg_gen_ld_i64(r_tmp, cpu_env, off);
2601   - tcg_gen_trunc_i64_tl(t, r_tmp);
2602   - tcg_temp_free(r_tmp);
  2598 + tcg_gen_ld_tl(t, cpu_env, off);
  2599 + tcg_gen_ext32s_tl(t, t);
2603 2600 }
2604 2601  
2605 2602 static inline void gen_mtc0_store32 (TCGv t, target_ulong off)
... ... @@ -2613,11 +2610,8 @@ static inline void gen_mtc0_store32 (TCGv t, target_ulong off)
2613 2610  
2614 2611 static inline void gen_mtc0_store64 (TCGv t, target_ulong off)
2615 2612 {
2616   - TCGv r_tmp = tcg_temp_new(TCG_TYPE_I64);
2617   -
2618   - tcg_gen_ext_tl_i64(r_tmp, t);
2619   - tcg_gen_st_i64(r_tmp, cpu_env, off);
2620   - tcg_temp_free(r_tmp);
  2613 + tcg_gen_ext32s_tl(t, t);
  2614 + tcg_gen_st_tl(t, cpu_env, off);
2621 2615 }
2622 2616  
2623 2617 static void gen_mfc0 (CPUState *env, DisasContext *ctx, int reg, int sel)
... ...