Commit 2b29924f8c65fda8047e5c19f616ac5617b75a14

Authored by blueswir1
1 parent 2be17ebd

Convert align checks to TCG


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
target-sparc/helper.h
... ... @@ -37,6 +37,7 @@ void TCG_HELPER_PROTO helper_tick_set_limit(void *opaque, uint64_t limit);
37 37 void TCG_HELPER_PROTO helper_trap(target_ulong nb_trap);
38 38 void TCG_HELPER_PROTO helper_trapcc(target_ulong nb_trap,
39 39 target_ulong do_trap);
  40 +void TCG_HELPER_PROTO helper_check_align(target_ulong addr, uint32_t align);
40 41 void TCG_HELPER_PROTO helper_debug(void);
41 42 void TCG_HELPER_PROTO helper_save(void);
42 43 void TCG_HELPER_PROTO helper_restore(void);
... ...
target-sparc/op.c
... ... @@ -36,15 +36,3 @@
36 36 #include "op_mem.h"
37 37 #endif
38 38 #endif
39   -
40   -#define CHECK_ALIGN_OP(align) \
41   - void OPPROTO op_check_align_T0_ ## align (void) \
42   - { \
43   - if (T0 & align) \
44   - raise_exception(TT_UNALIGNED); \
45   - FORCE_RET(); \
46   - }
47   -
48   -CHECK_ALIGN_OP(1)
49   -CHECK_ALIGN_OP(3)
50   -CHECK_ALIGN_OP(7)
... ...
target-sparc/op_helper.c
... ... @@ -50,6 +50,12 @@ void helper_trapcc(target_ulong nb_trap, target_ulong do_trap)
50 50 }
51 51 }
52 52  
  53 +void helper_check_align(target_ulong addr, uint32_t align)
  54 +{
  55 + if (addr & align)
  56 + raise_exception(TT_UNALIGNED);
  57 +}
  58 +
53 59 #define F_HELPER(name, p) void helper_f##name##p(void)
54 60  
55 61 #if defined(CONFIG_USER_ONLY)
... ...
target-sparc/translate.c
... ... @@ -1664,6 +1664,26 @@ static inline void gen_clear_float_exceptions(void)
1664 1664 tcg_gen_helper_0_0(helper_clear_float_exceptions);
1665 1665 }
1666 1666  
  1667 +static inline void gen_check_align(TCGv r_addr, int align)
  1668 +{
  1669 + tcg_gen_helper_0_2(helper_check_align, r_addr, tcg_const_i32(align));
  1670 +}
  1671 +
  1672 +static inline void gen_op_check_align_T0_1(void)
  1673 +{
  1674 + gen_check_align(cpu_T[0], 1);
  1675 +}
  1676 +
  1677 +static inline void gen_op_check_align_T0_3(void)
  1678 +{
  1679 + gen_check_align(cpu_T[0], 3);
  1680 +}
  1681 +
  1682 +static inline void gen_op_check_align_T0_7(void)
  1683 +{
  1684 + gen_check_align(cpu_T[0], 7);
  1685 +}
  1686 +
1667 1687 /* asi moves */
1668 1688 #ifdef TARGET_SPARC64
1669 1689 static inline TCGv gen_get_asi(int insn, TCGv r_addr)
... ...