gwj / at91sam9263 · Commits

Commit 2a39bc41cb81e1fbd989e0dc648251a1f745c4db

Authored by pbrook
1 parent 53715e48

Remove incorrect discards and old unused defines (blueswir1). 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4137 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 0 additions and 64 deletions
target-sparc/translate.c
  View file @2a39bc4
@@ -614,7 +614,6 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2) @@ -614,7 +614,6 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)
614 tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1); 614 tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);
615 tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF)); 615 tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
616 gen_set_label(l1); 616 gen_set_label(l1);
617 - tcg_gen_discard_tl(r_temp);  
618 } 617 }
619 618
620 static inline void gen_op_sub_cc(TCGv dst, TCGv src1, TCGv src2) 619 static inline void gen_op_sub_cc(TCGv dst, TCGv src1, TCGv src2)
@@ -736,7 +735,6 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) @@ -736,7 +735,6 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
736 735
737 /* do addition and update flags */ 736 /* do addition and update flags */
738 tcg_gen_add_tl(dst, cpu_cc_src, cpu_cc_src2); 737 tcg_gen_add_tl(dst, cpu_cc_src, cpu_cc_src2);
739 - tcg_gen_discard_tl(r_temp);  
740 738
741 gen_cc_clear_icc(); 739 gen_cc_clear_icc();
742 gen_cc_NZ_icc(dst); 740 gen_cc_NZ_icc(dst);
@@ -763,9 +761,6 @@ static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2) @@ -763,9 +761,6 @@ static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2)
763 #else 761 #else
764 tcg_gen_trunc_i64_tl(dst, r_temp2); 762 tcg_gen_trunc_i64_tl(dst, r_temp2);
765 #endif 763 #endif
766 -  
767 - tcg_gen_discard_i64(r_temp);  
768 - tcg_gen_discard_i64(r_temp2);  
769 } 764 }
770 765
771 static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2) 766 static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2)
@@ -787,9 +782,6 @@ static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2) @@ -787,9 +782,6 @@ static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2)
787 #else 782 #else
788 tcg_gen_trunc_i64_tl(dst, r_temp2); 783 tcg_gen_trunc_i64_tl(dst, r_temp2);
789 #endif 784 #endif
790 -  
791 - tcg_gen_discard_i64(r_temp);  
792 - tcg_gen_discard_i64(r_temp2);  
793 } 785 }
794 786
795 #ifdef TARGET_SPARC64 787 #ifdef TARGET_SPARC64
@@ -1644,7 +1636,6 @@ static inline void gen_ld_asi(TCGv dst, TCGv addr, int insn, int size, int sign) @@ -1644,7 +1636,6 @@ static inline void gen_ld_asi(TCGv dst, TCGv addr, int insn, int size, int sign)
1644 r_asi = gen_get_asi(insn, addr); 1636 r_asi = gen_get_asi(insn, addr);
1645 tcg_gen_helper_1_4(helper_ld_asi, dst, addr, r_asi, 1637 tcg_gen_helper_1_4(helper_ld_asi, dst, addr, r_asi,
1646 tcg_const_i32(size), tcg_const_i32(sign)); 1638 tcg_const_i32(size), tcg_const_i32(sign));
1647 - tcg_gen_discard_i32(r_asi);  
1648 } 1639 }
1649 1640
1650 static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size) 1641 static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size)
@@ -1653,7 +1644,6 @@ static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size) @@ -1653,7 +1644,6 @@ static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size)
1653 1644
1654 r_asi = gen_get_asi(insn, addr); 1645 r_asi = gen_get_asi(insn, addr);
1655 tcg_gen_helper_0_4(helper_st_asi, addr, src, r_asi, tcg_const_i32(size)); 1646 tcg_gen_helper_0_4(helper_st_asi, addr, src, r_asi, tcg_const_i32(size));
1656 - tcg_gen_discard_i32(r_asi);  
1657 } 1647 }
1658 1648
1659 static inline void gen_ldf_asi(TCGv addr, int insn, int size, int rd) 1649 static inline void gen_ldf_asi(TCGv addr, int insn, int size, int rd)
@@ -1663,7 +1653,6 @@ static inline void gen_ldf_asi(TCGv addr, int insn, int size, int rd) @@ -1663,7 +1653,6 @@ static inline void gen_ldf_asi(TCGv addr, int insn, int size, int rd)
1663 r_asi = gen_get_asi(insn, addr); 1653 r_asi = gen_get_asi(insn, addr);
1664 tcg_gen_helper_0_4(helper_ldf_asi, addr, r_asi, tcg_const_i32(size), 1654 tcg_gen_helper_0_4(helper_ldf_asi, addr, r_asi, tcg_const_i32(size),
1665 tcg_const_i32(rd)); 1655 tcg_const_i32(rd));
1666 - tcg_gen_discard_i32(r_asi);  
1667 } 1656 }
1668 1657
1669 static inline void gen_stf_asi(TCGv addr, int insn, int size, int rd) 1658 static inline void gen_stf_asi(TCGv addr, int insn, int size, int rd)
@@ -1673,7 +1662,6 @@ static inline void gen_stf_asi(TCGv addr, int insn, int size, int rd) @@ -1673,7 +1662,6 @@ static inline void gen_stf_asi(TCGv addr, int insn, int size, int rd)
1673 r_asi = gen_get_asi(insn, addr); 1662 r_asi = gen_get_asi(insn, addr);
1674 tcg_gen_helper_0_4(helper_stf_asi, addr, r_asi, tcg_const_i32(size), 1663 tcg_gen_helper_0_4(helper_stf_asi, addr, r_asi, tcg_const_i32(size),
1675 tcg_const_i32(rd)); 1664 tcg_const_i32(rd));
1676 - tcg_gen_discard_i32(r_asi);  
1677 } 1665 }
1678 1666
1679 static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn) 1667 static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn)
@@ -1687,8 +1675,6 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn) @@ -1687,8 +1675,6 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn)
1687 tcg_gen_helper_0_4(helper_st_asi, addr, dst, r_asi, 1675 tcg_gen_helper_0_4(helper_st_asi, addr, dst, r_asi,
1688 tcg_const_i32(4)); 1676 tcg_const_i32(4));
1689 tcg_gen_extu_i32_tl(dst, r_temp); 1677 tcg_gen_extu_i32_tl(dst, r_temp);
1690 - tcg_gen_discard_i32(r_asi);  
1691 - tcg_gen_discard_i32(r_temp);  
1692 } 1678 }
1693 1679
1694 static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn) 1680 static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn)
@@ -1701,7 +1687,6 @@ static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn) @@ -1701,7 +1687,6 @@ static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn)
1701 tcg_gen_andi_i64(lo, cpu_tmp64, 0xffffffffULL); 1687 tcg_gen_andi_i64(lo, cpu_tmp64, 0xffffffffULL);
1702 tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32); 1688 tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32);
1703 tcg_gen_andi_i64(hi, cpu_tmp64, 0xffffffffULL); 1689 tcg_gen_andi_i64(hi, cpu_tmp64, 0xffffffffULL);
1704 - tcg_gen_discard_i32(r_asi);  
1705 } 1690 }
1706 1691
1707 static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd) 1692 static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd)
@@ -1715,8 +1700,6 @@ static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd) @@ -1715,8 +1700,6 @@ static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd)
1715 r_asi = gen_get_asi(insn, addr); 1700 r_asi = gen_get_asi(insn, addr);
1716 tcg_gen_helper_0_4(helper_st_asi, addr, cpu_tmp64, r_asi, 1701 tcg_gen_helper_0_4(helper_st_asi, addr, cpu_tmp64, r_asi,
1717 tcg_const_i32(8)); 1702 tcg_const_i32(8));
1718 - tcg_gen_discard_i32(r_asi);  
1719 - tcg_gen_discard_i32(r_temp);  
1720 } 1703 }
1721 1704
1722 static inline void gen_cas_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd) 1705 static inline void gen_cas_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd)
@@ -1727,8 +1710,6 @@ static inline void gen_cas_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd) @@ -1727,8 +1710,6 @@ static inline void gen_cas_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd)
1727 gen_movl_reg_TN(rd, r_val1); 1710 gen_movl_reg_TN(rd, r_val1);
1728 r_asi = gen_get_asi(insn, addr); 1711 r_asi = gen_get_asi(insn, addr);
1729 tcg_gen_helper_1_4(helper_cas_asi, dst, addr, r_val1, val2, r_asi); 1712 tcg_gen_helper_1_4(helper_cas_asi, dst, addr, r_val1, val2, r_asi);
1730 - tcg_gen_discard_i32(r_asi);  
1731 - tcg_gen_discard_i32(r_val1);  
1732 } 1713 }
1733 1714
1734 static inline void gen_casx_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd) 1715 static inline void gen_casx_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd)
@@ -1738,7 +1719,6 @@ static inline void gen_casx_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd @@ -1738,7 +1719,6 @@ static inline void gen_casx_asi(TCGv dst, TCGv addr, TCGv val2, int insn, int rd
1738 gen_movl_reg_TN(rd, cpu_tmp64); 1719 gen_movl_reg_TN(rd, cpu_tmp64);
1739 r_asi = gen_get_asi(insn, addr); 1720 r_asi = gen_get_asi(insn, addr);
1740 tcg_gen_helper_1_4(helper_casx_asi, dst, addr, cpu_tmp64, val2, r_asi); 1721 tcg_gen_helper_1_4(helper_casx_asi, dst, addr, cpu_tmp64, val2, r_asi);
1741 - tcg_gen_discard_i32(r_asi);  
1742 } 1722 }
1743 1723
1744 #elif !defined(CONFIG_USER_ONLY) 1724 #elif !defined(CONFIG_USER_ONLY)
@@ -1775,7 +1755,6 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn) @@ -1775,7 +1755,6 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn)
1775 tcg_gen_helper_0_4(helper_st_asi, addr, dst, tcg_const_i32(asi), 1755 tcg_gen_helper_0_4(helper_st_asi, addr, dst, tcg_const_i32(asi),
1776 tcg_const_i32(4)); 1756 tcg_const_i32(4));
1777 tcg_gen_extu_i32_tl(dst, r_temp); 1757 tcg_gen_extu_i32_tl(dst, r_temp);
1778 - tcg_gen_discard_i32(r_temp);  
1779 } 1758 }
1780 1759
1781 static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn) 1760 static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn)
@@ -1941,16 +1920,11 @@ static void disas_sparc_insn(DisasContext * dc) @@ -1941,16 +1920,11 @@ static void disas_sparc_insn(DisasContext * dc)
1941 goto jmp_insn; 1920 goto jmp_insn;
1942 } 1921 }
1943 case 0x4: /* SETHI */ 1922 case 0x4: /* SETHI */
1944 -#define OPTIM  
1945 -#if defined(OPTIM)  
1946 if (rd) { // nop 1923 if (rd) { // nop
1947 -#endif  
1948 uint32_t value = GET_FIELD(insn, 10, 31); 1924 uint32_t value = GET_FIELD(insn, 10, 31);
1949 tcg_gen_movi_tl(cpu_dst, value << 10); 1925 tcg_gen_movi_tl(cpu_dst, value << 10);
1950 gen_movl_TN_reg(rd, cpu_dst); 1926 gen_movl_TN_reg(rd, cpu_dst);
1951 -#if defined(OPTIM)  
1952 } 1927 }
1953 -#endif  
1954 break; 1928 break;
1955 case 0x0: /* UNIMPL */ 1929 case 0x0: /* UNIMPL */
1956 default: 1930 default:
@@ -1981,14 +1955,10 @@ static void disas_sparc_insn(DisasContext * dc) @@ -1981,14 +1955,10 @@ static void disas_sparc_insn(DisasContext * dc)
1981 tcg_gen_addi_tl(cpu_dst, cpu_src1, rs2); 1955 tcg_gen_addi_tl(cpu_dst, cpu_src1, rs2);
1982 } else { 1956 } else {
1983 rs2 = GET_FIELD(insn, 27, 31); 1957 rs2 = GET_FIELD(insn, 27, 31);
1984 -#if defined(OPTIM)  
1985 if (rs2 != 0) { 1958 if (rs2 != 0) {
1986 -#endif  
1987 gen_movl_reg_TN(rs2, cpu_src2); 1959 gen_movl_reg_TN(rs2, cpu_src2);
1988 tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); 1960 tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2);
1989 -#if defined(OPTIM)  
1990 } 1961 }
1991 -#endif  
1992 } 1962 }
1993 cond = GET_FIELD(insn, 3, 6); 1963 cond = GET_FIELD(insn, 3, 6);
1994 if (cond == 0x8) { 1964 if (cond == 0x8) {
@@ -2012,7 +1982,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2012,7 +1982,6 @@ static void disas_sparc_insn(DisasContext * dc)
2012 gen_cond(r_cond, 0, cond); 1982 gen_cond(r_cond, 0, cond);
2013 #endif 1983 #endif
2014 tcg_gen_helper_0_2(helper_trapcc, cpu_dst, r_cond); 1984 tcg_gen_helper_0_2(helper_trapcc, cpu_dst, r_cond);
2015 - tcg_gen_discard_tl(r_cond);  
2016 } 1985 }
2017 gen_op_next_insn(); 1986 gen_op_next_insn();
2018 tcg_gen_exit_tb(0); 1987 tcg_gen_exit_tb(0);
@@ -2055,7 +2024,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2055,7 +2024,6 @@ static void disas_sparc_insn(DisasContext * dc)
2055 tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst, 2024 tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst,
2056 r_tickptr); 2025 r_tickptr);
2057 gen_movl_TN_reg(rd, cpu_dst); 2026 gen_movl_TN_reg(rd, cpu_dst);
2058 - tcg_gen_discard_ptr(r_tickptr);  
2059 } 2027 }
2060 break; 2028 break;
2061 case 0x5: /* V9 rdpc */ 2029 case 0x5: /* V9 rdpc */
@@ -2089,7 +2057,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2089,7 +2057,6 @@ static void disas_sparc_insn(DisasContext * dc)
2089 tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst, 2057 tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst,
2090 r_tickptr); 2058 r_tickptr);
2091 gen_movl_TN_reg(rd, cpu_dst); 2059 gen_movl_TN_reg(rd, cpu_dst);
2092 - tcg_gen_discard_ptr(r_tickptr);  
2093 } 2060 }
2094 break; 2061 break;
2095 case 0x19: /* System tick compare */ 2062 case 0x19: /* System tick compare */
@@ -2160,7 +2127,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2160,7 +2127,6 @@ static void disas_sparc_insn(DisasContext * dc)
2160 offsetof(CPUState, tsptr)); 2127 offsetof(CPUState, tsptr));
2161 tcg_gen_ld_tl(cpu_dst, r_tsptr, 2128 tcg_gen_ld_tl(cpu_dst, r_tsptr,
2162 offsetof(trap_state, tpc)); 2129 offsetof(trap_state, tpc));
2163 - tcg_gen_discard_ptr(r_tsptr);  
2164 } 2130 }
2165 break; 2131 break;
2166 case 1: // tnpc 2132 case 1: // tnpc
@@ -2172,7 +2138,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2172,7 +2138,6 @@ static void disas_sparc_insn(DisasContext * dc)
2172 offsetof(CPUState, tsptr)); 2138 offsetof(CPUState, tsptr));
2173 tcg_gen_ld_tl(cpu_dst, r_tsptr, 2139 tcg_gen_ld_tl(cpu_dst, r_tsptr,
2174 offsetof(trap_state, tnpc)); 2140 offsetof(trap_state, tnpc));
2175 - tcg_gen_discard_ptr(r_tsptr);  
2176 } 2141 }
2177 break; 2142 break;
2178 case 2: // tstate 2143 case 2: // tstate
@@ -2184,7 +2149,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2184,7 +2149,6 @@ static void disas_sparc_insn(DisasContext * dc)
2184 offsetof(CPUState, tsptr)); 2149 offsetof(CPUState, tsptr));
2185 tcg_gen_ld_tl(cpu_dst, r_tsptr, 2150 tcg_gen_ld_tl(cpu_dst, r_tsptr,
2186 offsetof(trap_state, tstate)); 2151 offsetof(trap_state, tstate));
2187 - tcg_gen_discard_ptr(r_tsptr);  
2188 } 2152 }
2189 break; 2153 break;
2190 case 3: // tt 2154 case 3: // tt
@@ -2196,7 +2160,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2196,7 +2160,6 @@ static void disas_sparc_insn(DisasContext * dc)
2196 offsetof(CPUState, tsptr)); 2160 offsetof(CPUState, tsptr));
2197 tcg_gen_ld_i32(cpu_dst, r_tsptr, 2161 tcg_gen_ld_i32(cpu_dst, r_tsptr,
2198 offsetof(trap_state, tt)); 2162 offsetof(trap_state, tt));
2199 - tcg_gen_discard_ptr(r_tsptr);  
2200 } 2163 }
2201 break; 2164 break;
2202 case 4: // tick 2165 case 4: // tick
@@ -2209,7 +2172,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2209,7 +2172,6 @@ static void disas_sparc_insn(DisasContext * dc)
2209 tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst, 2172 tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst,
2210 r_tickptr); 2173 r_tickptr);
2211 gen_movl_TN_reg(rd, cpu_dst); 2174 gen_movl_TN_reg(rd, cpu_dst);
2212 - tcg_gen_discard_ptr(r_tickptr);  
2213 } 2175 }
2214 break; 2176 break;
2215 case 5: // tba 2177 case 5: // tba
@@ -2725,7 +2687,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2725,7 +2687,6 @@ static void disas_sparc_insn(DisasContext * dc)
2725 glue(glue(gen_op_load_fpr_, size_FDQ), T0)(glue(size_FDQ, FPREG(rs2))); \ 2687 glue(glue(gen_op_load_fpr_, size_FDQ), T0)(glue(size_FDQ, FPREG(rs2))); \
2726 glue(glue(gen_op_store_, size_FDQ), T0_fpr)(glue(size_FDQ, FPREG(rd))); \ 2688 glue(glue(gen_op_store_, size_FDQ), T0_fpr)(glue(size_FDQ, FPREG(rd))); \
2727 gen_set_label(l1); \ 2689 gen_set_label(l1); \
2728 - tcg_gen_discard_tl(r_cond); \  
2729 } 2690 }
2730 case 0x001: /* V9 fmovscc %fcc0 */ 2691 case 0x001: /* V9 fmovscc %fcc0 */
2731 FMOVCC(F, 0); 2692 FMOVCC(F, 0);
@@ -2794,7 +2755,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2794,7 +2755,6 @@ static void disas_sparc_insn(DisasContext * dc)
2794 glue(glue(gen_op_load_fpr_, size_FDQ), T0)(glue(size_FDQ, FPREG(rs2))); \ 2755 glue(glue(gen_op_load_fpr_, size_FDQ), T0)(glue(size_FDQ, FPREG(rs2))); \
2795 glue(glue(gen_op_store_, size_FDQ), T0_fpr)(glue(size_FDQ, FPREG(rd))); \ 2756 glue(glue(gen_op_store_, size_FDQ), T0_fpr)(glue(size_FDQ, FPREG(rd))); \
2796 gen_set_label(l1); \ 2757 gen_set_label(l1); \
2797 - tcg_gen_discard_tl(r_cond); \  
2798 } 2758 }
2799 2759
2800 case 0x101: /* V9 fmovscc %icc */ 2760 case 0x101: /* V9 fmovscc %icc */
@@ -2865,7 +2825,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2865,7 +2825,6 @@ static void disas_sparc_insn(DisasContext * dc)
2865 default: 2825 default:
2866 goto illegal_insn; 2826 goto illegal_insn;
2867 } 2827 }
2868 -#if defined(OPTIM)  
2869 } else if (xop == 0x2) { 2828 } else if (xop == 0x2) {
2870 // clr/mov shortcut 2829 // clr/mov shortcut
2871 2830
@@ -2894,7 +2853,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2894,7 +2853,6 @@ static void disas_sparc_insn(DisasContext * dc)
2894 } 2853 }
2895 } 2854 }
2896 gen_movl_TN_reg(rd, cpu_dst); 2855 gen_movl_TN_reg(rd, cpu_dst);
2897 -#endif  
2898 #ifdef TARGET_SPARC64 2856 #ifdef TARGET_SPARC64
2899 } else if (xop == 0x25) { /* sll, V9 sllx */ 2857 } else if (xop == 0x25) { /* sll, V9 sllx */
2900 cpu_src1 = get_src1(insn, cpu_src1); 2858 cpu_src1 = get_src1(insn, cpu_src1);
@@ -3176,7 +3134,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3176,7 +3134,6 @@ static void disas_sparc_insn(DisasContext * dc)
3176 offsetof(CPUState, tick)); 3134 offsetof(CPUState, tick));
3177 tcg_gen_helper_0_2(helper_tick_set_limit, 3135 tcg_gen_helper_0_2(helper_tick_set_limit,
3178 r_tickptr, cpu_dst); 3136 r_tickptr, cpu_dst);
3179 - tcg_gen_discard_ptr(r_tickptr);  
3180 } 3137 }
3181 break; 3138 break;
3182 case 0x18: /* System tick */ 3139 case 0x18: /* System tick */
@@ -3194,7 +3151,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3194,7 +3151,6 @@ static void disas_sparc_insn(DisasContext * dc)
3194 offsetof(CPUState, stick)); 3151 offsetof(CPUState, stick));
3195 tcg_gen_helper_0_2(helper_tick_set_count, 3152 tcg_gen_helper_0_2(helper_tick_set_count,
3196 r_tickptr, cpu_dst); 3153 r_tickptr, cpu_dst);
3197 - tcg_gen_discard_ptr(r_tickptr);  
3198 } 3154 }
3199 break; 3155 break;
3200 case 0x19: /* System tick compare */ 3156 case 0x19: /* System tick compare */
@@ -3214,7 +3170,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3214,7 +3170,6 @@ static void disas_sparc_insn(DisasContext * dc)
3214 offsetof(CPUState, stick)); 3170 offsetof(CPUState, stick));
3215 tcg_gen_helper_0_2(helper_tick_set_limit, 3171 tcg_gen_helper_0_2(helper_tick_set_limit,
3216 r_tickptr, cpu_dst); 3172 r_tickptr, cpu_dst);
3217 - tcg_gen_discard_ptr(r_tickptr);  
3218 } 3173 }
3219 break; 3174 break;
3220 3175
@@ -3277,7 +3232,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3277,7 +3232,6 @@ static void disas_sparc_insn(DisasContext * dc)
3277 offsetof(CPUState, tsptr)); 3232 offsetof(CPUState, tsptr));
3278 tcg_gen_st_tl(cpu_dst, r_tsptr, 3233 tcg_gen_st_tl(cpu_dst, r_tsptr,
3279 offsetof(trap_state, tpc)); 3234 offsetof(trap_state, tpc));
3280 - tcg_gen_discard_ptr(r_tsptr);  
3281 } 3235 }
3282 break; 3236 break;
3283 case 1: // tnpc 3237 case 1: // tnpc
@@ -3289,7 +3243,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3289,7 +3243,6 @@ static void disas_sparc_insn(DisasContext * dc)
3289 offsetof(CPUState, tsptr)); 3243 offsetof(CPUState, tsptr));
3290 tcg_gen_st_tl(cpu_dst, r_tsptr, 3244 tcg_gen_st_tl(cpu_dst, r_tsptr,
3291 offsetof(trap_state, tnpc)); 3245 offsetof(trap_state, tnpc));
3292 - tcg_gen_discard_ptr(r_tsptr);  
3293 } 3246 }
3294 break; 3247 break;
3295 case 2: // tstate 3248 case 2: // tstate
@@ -3301,7 +3254,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3301,7 +3254,6 @@ static void disas_sparc_insn(DisasContext * dc)
3301 offsetof(CPUState, tsptr)); 3254 offsetof(CPUState, tsptr));
3302 tcg_gen_st_tl(cpu_dst, r_tsptr, 3255 tcg_gen_st_tl(cpu_dst, r_tsptr,
3303 offsetof(trap_state, tstate)); 3256 offsetof(trap_state, tstate));
3304 - tcg_gen_discard_ptr(r_tsptr);  
3305 } 3257 }
3306 break; 3258 break;
3307 case 3: // tt 3259 case 3: // tt
@@ -3313,7 +3265,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3313,7 +3265,6 @@ static void disas_sparc_insn(DisasContext * dc)
3313 offsetof(CPUState, tsptr)); 3265 offsetof(CPUState, tsptr));
3314 tcg_gen_st_i32(cpu_dst, r_tsptr, 3266 tcg_gen_st_i32(cpu_dst, r_tsptr,
3315 offsetof(trap_state, tt)); 3267 offsetof(trap_state, tt));
3316 - tcg_gen_discard_ptr(r_tsptr);  
3317 } 3268 }
3318 break; 3269 break;
3319 case 4: // tick 3270 case 4: // tick
@@ -3325,7 +3276,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3325,7 +3276,6 @@ static void disas_sparc_insn(DisasContext * dc)
3325 offsetof(CPUState, tick)); 3276 offsetof(CPUState, tick));
3326 tcg_gen_helper_0_2(helper_tick_set_count, 3277 tcg_gen_helper_0_2(helper_tick_set_count,
3327 r_tickptr, cpu_dst); 3278 r_tickptr, cpu_dst);
3328 - tcg_gen_discard_ptr(r_tickptr);  
3329 } 3279 }
3330 break; 3280 break;
3331 case 5: // tba 3281 case 5: // tba
@@ -3430,7 +3380,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3430,7 +3380,6 @@ static void disas_sparc_insn(DisasContext * dc)
3430 offsetof(CPUState, hstick)); 3380 offsetof(CPUState, hstick));
3431 tcg_gen_helper_0_2(helper_tick_set_limit, 3381 tcg_gen_helper_0_2(helper_tick_set_limit,
3432 r_tickptr, cpu_dst); 3382 r_tickptr, cpu_dst);
3433 - tcg_gen_discard_ptr(r_tickptr);  
3434 } 3383 }
3435 break; 3384 break;
3436 case 6: // hver readonly 3385 case 6: // hver readonly
@@ -3474,7 +3423,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3474,7 +3423,6 @@ static void disas_sparc_insn(DisasContext * dc)
3474 } 3423 }
3475 gen_movl_TN_reg(rd, cpu_dst); 3424 gen_movl_TN_reg(rd, cpu_dst);
3476 gen_set_label(l1); 3425 gen_set_label(l1);
3477 - tcg_gen_discard_tl(r_cond);  
3478 break; 3426 break;
3479 } 3427 }
3480 case 0x2d: /* V9 sdivx */ 3428 case 0x2d: /* V9 sdivx */
@@ -3934,14 +3882,10 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3934,14 +3882,10 @@ static void disas_sparc_insn(DisasContext * dc)
3934 tcg_gen_addi_tl(cpu_dst, cpu_src1, (int)rs2); 3882 tcg_gen_addi_tl(cpu_dst, cpu_src1, (int)rs2);
3935 } else { /* register */ 3883 } else { /* register */
3936 rs2 = GET_FIELD(insn, 27, 31); 3884 rs2 = GET_FIELD(insn, 27, 31);
3937 -#if defined(OPTIM)  
3938 if (rs2) { 3885 if (rs2) {
3939 -#endif  
3940 gen_movl_reg_TN(rs2, cpu_src2); 3886 gen_movl_reg_TN(rs2, cpu_src2);
3941 tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); 3887 tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2);
3942 -#if defined(OPTIM)  
3943 } 3888 }
3944 -#endif  
3945 } 3889 }
3946 tcg_gen_helper_0_0(helper_restore); 3890 tcg_gen_helper_0_0(helper_restore);
3947 gen_mov_pc_npc(dc, cpu_cond); 3891 gen_mov_pc_npc(dc, cpu_cond);
@@ -3957,14 +3901,10 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3957,14 +3901,10 @@ static void disas_sparc_insn(DisasContext * dc)
3957 tcg_gen_addi_tl(cpu_dst, cpu_src1, (int)rs2); 3901 tcg_gen_addi_tl(cpu_dst, cpu_src1, (int)rs2);
3958 } else { /* register */ 3902 } else { /* register */
3959 rs2 = GET_FIELD(insn, 27, 31); 3903 rs2 = GET_FIELD(insn, 27, 31);
3960 -#if defined(OPTIM)  
3961 if (rs2) { 3904 if (rs2) {
3962 -#endif  
3963 gen_movl_reg_TN(rs2, cpu_src2); 3905 gen_movl_reg_TN(rs2, cpu_src2);
3964 tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); 3906 tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2);
3965 -#if defined(OPTIM)  
3966 } 3907 }
3967 -#endif  
3968 } 3908 }
3969 switch (xop) { 3909 switch (xop) {
3970 case 0x38: /* jmpl */ 3910 case 0x38: /* jmpl */
@@ -4052,14 +3992,10 @@ static void disas_sparc_insn(DisasContext * dc) @@ -4052,14 +3992,10 @@ static void disas_sparc_insn(DisasContext * dc)
4052 tcg_gen_addi_tl(cpu_addr, cpu_src1, (int)rs2); 3992 tcg_gen_addi_tl(cpu_addr, cpu_src1, (int)rs2);
4053 } else { /* register */ 3993 } else { /* register */
4054 rs2 = GET_FIELD(insn, 27, 31); 3994 rs2 = GET_FIELD(insn, 27, 31);
4055 -#if defined(OPTIM)  
4056 if (rs2 != 0) { 3995 if (rs2 != 0) {
4057 -#endif  
4058 gen_movl_reg_TN(rs2, cpu_src2); 3996 gen_movl_reg_TN(rs2, cpu_src2);
4059 tcg_gen_add_tl(cpu_addr, cpu_src1, cpu_src2); 3997 tcg_gen_add_tl(cpu_addr, cpu_src1, cpu_src2);
4060 -#if defined(OPTIM)  
4061 } 3998 }
4062 -#endif  
4063 } 3999 }
4064 if (xop < 4 || (xop > 7 && xop < 0x14 && xop != 0x0e) || 4000 if (xop < 4 || (xop > 7 && xop < 0x14 && xop != 0x0e) ||
4065 (xop > 0x17 && xop <= 0x1d ) || 4001 (xop > 0x17 && xop <= 0x1d ) ||