gwj / at91sam9263 · Commits

Commit 2a1639291bf9f3c88c62d10459fedaa677536ff5

Authored by balrog
1 parent 4f01035f

Remove a local subpage IO hack, now that general subpage IO works. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2885 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 21 additions and 41 deletions
hw/pxa.h
  View file @2a16392
... ... @@ -117,7 +117,7 @@ void pxa2xx_ssp_attach(struct pxa2xx_ssp_s *port,
117 117  
118 118 struct pxa2xx_i2c_s;
119 119 struct pxa2xx_i2c_s *pxa2xx_i2c_init(target_phys_addr_t base,
120   - qemu_irq irq, int ioregister);
  120 + qemu_irq irq, uint32_t page_size);
121 121 i2c_bus *pxa2xx_i2c_bus(struct pxa2xx_i2c_s *s);
122 122  
123 123 struct pxa2xx_i2s_s;
... ...
hw/pxa2xx.c
  View file @2a16392
... ... @@ -69,16 +69,9 @@ static struct {
69 69 #define PCMD0 0x80 /* Power Manager I2C Command register File 0 */
70 70 #define PCMD31 0xfc /* Power Manager I2C Command register File 31 */
71 71  
72   -static uint32_t pxa2xx_i2c_read(void *, target_phys_addr_t);
73   -static void pxa2xx_i2c_write(void *, target_phys_addr_t, uint32_t);
74   -
75 72 static uint32_t pxa2xx_pm_read(void *opaque, target_phys_addr_t addr)
76 73 {
77 74 struct pxa2xx_state_s *s = (struct pxa2xx_state_s *) opaque;
78   - if (addr > s->pm_base + PCMD31) {
79   - /* Special case: PWRI2C registers appear in the same range. */
80   - return pxa2xx_i2c_read(s->i2c[1], addr);
81   - }
82 75 addr -= s->pm_base;
83 76  
84 77 switch (addr) {
... ... @@ -99,11 +92,6 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
99 92 uint32_t value)
100 93 {
101 94 struct pxa2xx_state_s *s = (struct pxa2xx_state_s *) opaque;
102   - if (addr > s->pm_base + PCMD31) {
103   - /* Special case: PWRI2C registers appear in the same range. */
104   - pxa2xx_i2c_write(s->i2c[1], addr, value);
105   - return;
106   - }
107 95 addr -= s->pm_base;
108 96  
109 97 switch (addr) {
... ... @@ -1484,7 +1472,7 @@ static int pxa2xx_i2c_load(QEMUFile *f, void *opaque, int version_id)
1484 1472 }
1485 1473  
1486 1474 struct pxa2xx_i2c_s *pxa2xx_i2c_init(target_phys_addr_t base,
1487   - qemu_irq irq, int ioregister)
  1475 + qemu_irq irq, uint32_t page_size)
1488 1476 {
1489 1477 int iomemtype;
1490 1478 struct pxa2xx_i2c_s *s = (struct pxa2xx_i2c_s *)
... ... @@ -1497,11 +1485,9 @@ struct pxa2xx_i2c_s *pxa2xx_i2c_init(target_phys_addr_t base,
1497 1485 s->slave.send = pxa2xx_i2c_tx;
1498 1486 s->bus = i2c_init_bus();
1499 1487  
1500   - if (ioregister) {
1501   - iomemtype = cpu_register_io_memory(0, pxa2xx_i2c_readfn,
1502   - pxa2xx_i2c_writefn, s);
1503   - cpu_register_physical_memory(s->base & 0xfffff000, 0xfff, iomemtype);
1504   - }
  1488 + iomemtype = cpu_register_io_memory(0, pxa2xx_i2c_readfn,
  1489 + pxa2xx_i2c_writefn, s);
  1490 + cpu_register_physical_memory(s->base & ~page_size, page_size, iomemtype);
1505 1491  
1506 1492 register_savevm("pxa2xx_i2c", base, 0,
1507 1493 pxa2xx_i2c_save, pxa2xx_i2c_load, s);
... ... @@ -2089,6 +2075,12 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2089 2075 cpu_register_physical_memory(s->mm_base, 0xfff, iomemtype);
2090 2076 register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
2091 2077  
  2078 + s->pm_base = 0x40f00000;
  2079 + iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn,
  2080 + pxa2xx_pm_writefn, s);
  2081 + cpu_register_physical_memory(s->pm_base, 0xff, iomemtype);
  2082 + register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
  2083 +
2092 2084 for (i = 0; pxa27x_ssp[i].io_base; i ++);
2093 2085 s->ssp = (struct pxa2xx_ssp_s **)
2094 2086 qemu_mallocz(sizeof(struct pxa2xx_ssp_s *) * i);
... ... @@ -2120,17 +2112,8 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2120 2112 pxa2xx_rtc_init(s);
2121 2113 register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
2122 2114  
2123   - /* Note that PM registers are in the same page with PWRI2C registers.
2124   - * As a workaround we don't map PWRI2C into memory and we expect
2125   - * PM handlers to call PWRI2C handlers when appropriate. */
2126   - s->i2c[0] = pxa2xx_i2c_init(0x40301600, s->pic[PXA2XX_PIC_I2C], 1);
2127   - s->i2c[1] = pxa2xx_i2c_init(0x40f00100, s->pic[PXA2XX_PIC_PWRI2C], 0);
2128   -
2129   - s->pm_base = 0x40f00000;
2130   - iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn,
2131   - pxa2xx_pm_writefn, s);
2132   - cpu_register_physical_memory(s->pm_base, 0xfff, iomemtype);
2133   - register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
  2115 + s->i2c[0] = pxa2xx_i2c_init(0x40301600, s->pic[PXA2XX_PIC_I2C], 0xffff);
  2116 + s->i2c[1] = pxa2xx_i2c_init(0x40f00100, s->pic[PXA2XX_PIC_PWRI2C], 0xff);
2134 2117  
2135 2118 s->i2s = pxa2xx_i2s_init(0x40400000, s->pic[PXA2XX_PIC_I2S], s->dma);
2136 2119  
... ... @@ -2201,6 +2184,12 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
2201 2184 cpu_register_physical_memory(s->mm_base, 0xfff, iomemtype);
2202 2185 register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
2203 2186  
  2187 + s->pm_base = 0x40f00000;
  2188 + iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn,
  2189 + pxa2xx_pm_writefn, s);
  2190 + cpu_register_physical_memory(s->pm_base, 0xff, iomemtype);
  2191 + register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
  2192 +
2204 2193 for (i = 0; pxa255_ssp[i].io_base; i ++);
2205 2194 s->ssp = (struct pxa2xx_ssp_s **)
2206 2195 qemu_mallocz(sizeof(struct pxa2xx_ssp_s *) * i);
... ... @@ -2232,17 +2221,8 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
2232 2221 pxa2xx_rtc_init(s);
2233 2222 register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
2234 2223  
2235   - /* Note that PM registers are in the same page with PWRI2C registers.
2236   - * As a workaround we don't map PWRI2C into memory and we expect
2237   - * PM handlers to call PWRI2C handlers when appropriate. */
2238   - s->i2c[0] = pxa2xx_i2c_init(0x40301600, s->pic[PXA2XX_PIC_I2C], 1);
2239   - s->i2c[1] = pxa2xx_i2c_init(0x40f00100, s->pic[PXA2XX_PIC_PWRI2C], 0);
2240   -
2241   - s->pm_base = 0x40f00000;
2242   - iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn,
2243   - pxa2xx_pm_writefn, s);
2244   - cpu_register_physical_memory(s->pm_base, 0xfff, iomemtype);
2245   - register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
  2224 + s->i2c[0] = pxa2xx_i2c_init(0x40301600, s->pic[PXA2XX_PIC_I2C], 0xffff);
  2225 + s->i2c[1] = pxa2xx_i2c_init(0x40f00100, s->pic[PXA2XX_PIC_PWRI2C], 0xff);
2246 2226  
2247 2227 s->i2s = pxa2xx_i2s_init(0x40400000, s->pic[PXA2XX_PIC_I2S], s->dma);
2248 2228  
... ...