gwj / at91sam9263 · Commits

Commit 2814df28efc184dd327e15a2bb75119c1ef19564

Authored by Blue Swirl
1 parent 14ed7adc

esp: fix interrupt register read 

Read of interrupt register should clear it and also sequence step and status.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Showing 1 changed file with 9 additions and 4 deletions
hw/esp.c
  View file @2814df2
... ... @@ -422,7 +422,7 @@ static void parent_esp_reset(void *opaque, int irq, int level)
422 422 static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr)
423 423 {
424 424 ESPState *s = opaque;
425   - uint32_t saddr;
  425 + uint32_t saddr, old_val;
426 426  
427 427 saddr = addr >> s->it_shift;
428 428 DPRINTF("read reg[%d]: 0x%2.2x\n", saddr, s->rregs[saddr]);
... ... @@ -445,10 +445,15 @@ static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr)
445 445 }
446 446 break;
447 447 case ESP_RINTR:
448   - // Clear interrupt/error status bits
449   - s->rregs[ESP_RSTAT] &= ~(STAT_GE | STAT_PE);
  448 + /* Clear sequence step, interrupt register and all status bits
  449 + except TC */
  450 + old_val = s->rregs[ESP_RINTR];
  451 + s->rregs[ESP_RINTR] = 0;
  452 + s->rregs[ESP_RSTAT] &= ~STAT_TC;
  453 + s->rregs[ESP_RSEQ] = SEQ_CD;
450 454 esp_lower_irq(s);
451   - break;
  455 +
  456 + return old_val;
452 457 default:
453 458 break;
454 459 }
... ...