gwj / at91sam9263 · Commits

Commit 275033239681346347766ac3712e3af792a0304f

Authored by bellard
1 parent f115e911

Soundblaster 16 support (malc) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@455 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 6 changed files with 1679 additions and 2 deletions
Makefile.target
  View file @2750332
... ... @@ -176,7 +176,7 @@ ifeq ($(ARCH),alpha)
176 176 endif
177 177  
178 178 # must use static linking to avoid leaving stuff in virtual address space
179   -VL_OBJS=vl.o block.o ide.o vga.o
  179 +VL_OBJS=vl.o block.o ide.o vga.o sb16.o dma.o oss.o
180 180 ifdef CONFIG_SDL
181 181 VL_OBJS+=sdl.o
182 182 SDL_LIBS+=-L/usr/X11R6/lib -lX11 -lXext -lXv -ldl -lm
... ...
hw/dma.c 0 → 100644
  View file @2750332
  1 +/*
  2 + * QEMU DMA emulation
  3 + *
  4 + * Copyright (c) 2003 Vassili Karpov (malc)
  5 + *
  6 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  7 + * of this software and associated documentation files (the "Software"), to deal
  8 + * in the Software without restriction, including without limitation the rights
  9 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 + * copies of the Software, and to permit persons to whom the Software is
  11 + * furnished to do so, subject to the following conditions:
  12 + *
  13 + * The above copyright notice and this permission notice shall be included in
  14 + * all copies or substantial portions of the Software.
  15 + *
  16 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 + * THE SOFTWARE.
  23 + */
  24 +#include <stdio.h>
  25 +#include <stdlib.h>
  26 +#include <inttypes.h>
  27 +
  28 +#include "vl.h"
  29 +#include "cpu.h"
  30 +
  31 +#define log(...) fprintf (stderr, "dma: " __VA_ARGS__)
  32 +#ifdef DEBUG_DMA
  33 +#define lwarn(...) fprintf (stderr, "dma: " __VA_ARGS__)
  34 +#define linfo(...) fprintf (stderr, "dma: " __VA_ARGS__)
  35 +#define ldebug(...) fprintf (stderr, "dma: " __VA_ARGS__)
  36 +#else
  37 +#define lwarn(...)
  38 +#define linfo(...)
  39 +#define ldebug(...)
  40 +#endif
  41 +
  42 +#define MEM_REAL(addr) ((addr)+(uint32_t)(phys_ram_base))
  43 +#define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0])))
  44 +
  45 +struct dma_regs {
  46 + int now[2];
  47 + uint16_t base[2];
  48 + uint8_t mode;
  49 + uint8_t page;
  50 + uint8_t dack;
  51 + uint8_t eop;
  52 + DMA_read_handler read_handler;
  53 + DMA_misc_handler misc_handler;
  54 +};
  55 +
  56 +#define ADDR 0
  57 +#define COUNT 1
  58 +
  59 +static struct dma_cont {
  60 + uint8_t status;
  61 + uint8_t command;
  62 + uint8_t mask;
  63 + uint8_t flip_flop;
  64 + struct dma_regs regs[4];
  65 +} dma_controllers[2];
  66 +
  67 +enum {
  68 + CMD_MEMORY_TO_MEMORY = 0x01,
  69 + CMD_FIXED_ADDRESS = 0x02,
  70 + CMD_BLOCK_CONTROLLER = 0x04,
  71 + CMD_COMPRESSED_TIME = 0x08,
  72 + CMD_CYCLIC_PRIORITY = 0x10,
  73 + CMD_EXTENDED_WRITE = 0x20,
  74 + CMD_LOW_DREQ = 0x40,
  75 + CMD_LOW_DACK = 0x80,
  76 + CMD_NOT_SUPPORTED = CMD_MEMORY_TO_MEMORY | CMD_FIXED_ADDRESS
  77 + | CMD_COMPRESSED_TIME | CMD_CYCLIC_PRIORITY | CMD_EXTENDED_WRITE
  78 + | CMD_LOW_DREQ | CMD_LOW_DACK
  79 +
  80 +};
  81 +
  82 +static void write_page (struct CPUX86State *env, uint32_t nport, uint32_t data)
  83 +{
  84 + int ichan;
  85 + int ncont;
  86 + static int channels[8] = {-1, 2, 3, 1, -1, -1, -1, 0};
  87 +
  88 + ncont = nport > 0x87;
  89 + ichan = channels[nport - 0x80 - (ncont << 3)];
  90 +
  91 + if (-1 == ichan) {
  92 + log ("invalid channel %#x %#x\n", nport, data);
  93 + return;
  94 + }
  95 +
  96 + dma_controllers[ncont].regs[ichan].page = data;
  97 +}
  98 +
  99 +static void init_chan (int ncont, int ichan)
  100 +{
  101 + struct dma_regs *r;
  102 +
  103 + r = dma_controllers[ncont].regs + ichan;
  104 + r->now[ADDR] = r->base[0] << ncont;
  105 + r->now[COUNT] = 0;
  106 +}
  107 +
  108 +static inline int getff (int ncont)
  109 +{
  110 + int ff;
  111 +
  112 + ff = dma_controllers[ncont].flip_flop;
  113 + dma_controllers[ncont].flip_flop = !ff;
  114 + return ff;
  115 +}
  116 +
  117 +static uint32_t read_chan (struct CPUX86State *env, uint32_t nport)
  118 +{
  119 + int ff;
  120 + int ncont, ichan, nreg;
  121 + struct dma_regs *r;
  122 + int val;
  123 +
  124 + ncont = nport > 7;
  125 + ichan = (nport >> (1 + ncont)) & 3;
  126 + nreg = (nport >> ncont) & 1;
  127 + r = dma_controllers[ncont].regs + ichan;
  128 +
  129 + ff = getff (ncont);
  130 +
  131 + if (nreg)
  132 + val = (r->base[COUNT] << ncont) - r->now[COUNT];
  133 + else
  134 + val = r->now[ADDR] + r->now[COUNT];
  135 +
  136 + return (val >> (ncont + (ff << 3))) & 0xff;
  137 +}
  138 +
  139 +static void write_chan (uint32_t nport, int size, uint32_t data)
  140 +{
  141 + int ncont, ichan, nreg;
  142 + struct dma_regs *r;
  143 +
  144 + ncont = nport > 7;
  145 + ichan = (nport >> (1 + ncont)) & 3;
  146 + nreg = (nport >> ncont) & 1;
  147 + r = dma_controllers[ncont].regs + ichan;
  148 +
  149 + if (2 == size) {
  150 + r->base[nreg] = data;
  151 + init_chan (ncont, ichan);
  152 + }
  153 + else {
  154 + if (getff (ncont)) {
  155 + r->base[nreg] = (r->base[nreg] & 0xff) | ((data << 8) & 0xff00);
  156 + init_chan (ncont, ichan);
  157 + }
  158 + else {
  159 + r->base[nreg] = (r->base[nreg] & 0xff00) | (data & 0xff);
  160 + }
  161 + }
  162 +}
  163 +static void write_chanb (struct CPUX86State *env, uint32_t nport, uint32_t data)
  164 +{
  165 + write_chan (nport, 1, data);
  166 +}
  167 +
  168 +static void write_chanw (struct CPUX86State *env, uint32_t nport, uint32_t data)
  169 +{
  170 + write_chan (nport, 2, data);
  171 +}
  172 +
  173 +static void write_cont (struct CPUX86State *env, uint32_t nport, uint32_t data)
  174 +{
  175 + int iport, ichan, ncont;
  176 + struct dma_cont *d;
  177 +
  178 + ncont = nport > 0xf;
  179 + ichan = -1;
  180 +
  181 + d = dma_controllers + ncont;
  182 + if (ncont) {
  183 + iport = ((nport - 0xd0) >> 1) + 8;
  184 + }
  185 + else {
  186 + iport = nport;
  187 + }
  188 +
  189 + switch (iport) {
  190 + case 8: /* command */
  191 + if (data && (data | CMD_NOT_SUPPORTED)) {
  192 + log ("command %#x not supported\n", data);
  193 + goto error;
  194 + }
  195 + d->command = data;
  196 + break;
  197 +
  198 + case 9:
  199 + ichan = data & 3;
  200 + if (data & 4) {
  201 + d->status |= 1 << (ichan + 4);
  202 + }
  203 + else {
  204 + d->status &= ~(1 << (ichan + 4));
  205 + }
  206 + d->status &= ~(1 << ichan);
  207 + break;
  208 +
  209 + case 0xa: /* single mask */
  210 + if (data & 4)
  211 + d->mask |= 1 << (data & 3);
  212 + else
  213 + d->mask &= ~(1 << (data & 3));
  214 + break;
  215 +
  216 + case 0xb: /* mode */
  217 + {
  218 +#ifdef DMA_DEBUG
  219 + int op;
  220 + int ai;
  221 + int dir;
  222 + int opmode;
  223 +
  224 + ichan = val & 3;
  225 + op = (val >> 2) & 3;
  226 + ai = (val >> 4) & 1;
  227 + dir = (val >> 5) & 1;
  228 + opmode = (val >> 6) & 3;
  229 +
  230 + linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n",
  231 + ichan, op, ai, dir, opmode);
  232 +#endif
  233 +
  234 + d->regs[ichan].mode = data;
  235 + break;
  236 + }
  237 +
  238 + case 0xc: /* clear flip flop */
  239 + d->flip_flop = 0;
  240 + break;
  241 +
  242 + case 0xd: /* reset */
  243 + d->flip_flop = 0;
  244 + d->mask = ~0;
  245 + d->status = 0;
  246 + d->command = 0;
  247 + break;
  248 +
  249 + case 0xe: /* clear mask for all channels */
  250 + d->mask = 0;
  251 + break;
  252 +
  253 + case 0xf: /* write mask for all channels */
  254 + d->mask = data;
  255 + break;
  256 +
  257 + default:
  258 + log ("dma: unknown iport %#x\n", iport);
  259 + goto error;
  260 + }
  261 +
  262 +#ifdef DMA_DEBUG
  263 + if (0xc != iport) {
  264 + linfo ("nport %#06x, ncont %d, ichan % 2d, val %#06x\n",
  265 + nport, d != dma_controllers, ichan, data);
  266 + }
  267 +#endif
  268 + return;
  269 +
  270 + error:
  271 + abort ();
  272 +}
  273 +
  274 +int DMA_get_channel_mode (int nchan)
  275 +{
  276 + return dma_controllers[nchan > 3].regs[nchan & 3].mode;
  277 +}
  278 +
  279 +void DMA_hold_DREQ (int nchan)
  280 +{
  281 + int ncont, ichan;
  282 +
  283 + ncont = nchan > 3;
  284 + ichan = nchan & 3;
  285 + linfo ("held cont=%d chan=%d\n", ncont, ichan);
  286 + dma_controllers[ncont].status |= 1 << (ichan + 4);
  287 +}
  288 +
  289 +void DMA_release_DREQ (int nchan)
  290 +{
  291 + int ncont, ichan;
  292 +
  293 + ncont = nchan > 3;
  294 + ichan = nchan & 3;
  295 + linfo ("released cont=%d chan=%d\n", ncont, ichan);
  296 + dma_controllers[ncont].status &= ~(1 << (ichan + 4));
  297 +}
  298 +
  299 +static void channel_run (int ncont, int ichan)
  300 +{
  301 + struct dma_regs *r;
  302 + int n;
  303 + int irq;
  304 + uint32_t addr;
  305 +/* int ai, dir; */
  306 +
  307 + r = dma_controllers[ncont].regs + ichan;
  308 +/* ai = r->mode & 16; */
  309 +/* dir = r->mode & 32 ? -1 : 1; */
  310 +
  311 + addr = MEM_REAL ((r->page << 16) | r->now[ADDR]);
  312 +
  313 + irq = -1;
  314 + n = r->read_handler (addr, (r->base[COUNT] << ncont) + (1 << ncont), &irq);
  315 + r->now[COUNT] = n;
  316 +
  317 + ldebug ("dma_pos %d irq %d size %d\n",
  318 + n, irq, (r->base[1] << ncont) + (1 << ncont));
  319 +
  320 + if (-1 != irq) {
  321 + pic_set_irq (irq, 1);
  322 + }
  323 +}
  324 +
  325 +void DMA_run (void)
  326 +{
  327 + static int in_dma;
  328 + struct dma_cont *d;
  329 + int icont, ichan;
  330 +
  331 + if (in_dma) {
  332 + log ("attempt to re-enter dma\n");
  333 + return;
  334 + }
  335 +
  336 + in_dma = 1;
  337 + d = dma_controllers;
  338 +
  339 + for (icont = 0; icont < 2; icont++, d++) {
  340 + for (ichan = 0; ichan < 4; ichan++) {
  341 + int mask;
  342 +
  343 + mask = 1 << ichan;
  344 +
  345 + if ((0 == (d->mask & mask)) && (0 != (d->status & (mask << 4))))
  346 + channel_run (icont, ichan);
  347 + }
  348 + }
  349 + in_dma = 0;
  350 +}
  351 +
  352 +void DMA_register_channel (int nchan,
  353 + DMA_read_handler read_handler,
  354 + DMA_misc_handler misc_handler)
  355 +{
  356 + struct dma_regs *r;
  357 + int ichan, ncont;
  358 +
  359 + ncont = nchan > 3;
  360 + ichan = nchan & 3;
  361 +
  362 + r = dma_controllers[ncont].regs + ichan;
  363 + r->read_handler = read_handler;
  364 + r->misc_handler = misc_handler;
  365 +}
  366 +
  367 +void DMA_init (void)
  368 +{
  369 + int i;
  370 + int page_port_list[] = { 0x1, 0x2, 0x3, 0x7 };
  371 +
  372 + for (i = 0; i < 8; i++) {
  373 + register_ioport_write (i, 1, write_chanb, 1);
  374 + register_ioport_write (i, 1, write_chanw, 2);
  375 +
  376 + register_ioport_write (0xc0 + (i << 1), 1, write_chanb, 1);
  377 + register_ioport_write (0xc0 + (i << 1), 1, write_chanw, 2);
  378 +
  379 + register_ioport_read (i, 1, read_chan, 1);
  380 + register_ioport_read (0xc0 + (i << 1), 1, read_chan, 2);
  381 + }
  382 +
  383 + for (i = 0; i < LENOFA (page_port_list); i++) {
  384 + register_ioport_write (page_port_list[i] + 0x80, 1, write_page, 1);
  385 + register_ioport_write (page_port_list[i] + 0x88, 1, write_page, 1);
  386 + }
  387 +
  388 + for (i = 0; i < 8; i++) {
  389 + register_ioport_write (i + 8, 1, write_cont, 1);
  390 + register_ioport_write (0xd0 + (i << 1), 1, write_cont, 1);
  391 + }
  392 +
  393 + write_cont (NULL, 0xd, 0);
  394 + write_cont (NULL, 0xdd, 0);
  395 +}
... ...
hw/sb16.c 0 → 100644
  View file @2750332
  1 +/*
  2 + * QEMU Soundblaster 16 emulation
  3 + *
  4 + * Copyright (c) 2003 Vassili Karpov (malc)
  5 + *
  6 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  7 + * of this software and associated documentation files (the "Software"), to deal
  8 + * in the Software without restriction, including without limitation the rights
  9 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 + * copies of the Software, and to permit persons to whom the Software is
  11 + * furnished to do so, subject to the following conditions:
  12 + *
  13 + * The above copyright notice and this permission notice shall be included in
  14 + * all copies or substantial portions of the Software.
  15 + *
  16 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 + * THE SOFTWARE.
  23 + */
  24 +#include <stdio.h>
  25 +#include <stdlib.h>
  26 +#include <inttypes.h>
  27 +
  28 +#include "vl.h"
  29 +
  30 +#define MIN(a, b) ((a)>(b)?(b):(a))
  31 +#define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0])))
  32 +
  33 +#define DEREF(x) (void)x
  34 +#define log(...) fprintf (stderr, "sb16: " __VA_ARGS__)
  35 +#define Fail(...) do { \
  36 + fprintf (stderr, "sb16: " __VA_ARGS__); \
  37 + abort (); \
  38 +} while (0)
  39 +
  40 +#ifdef DEBUG_SB16
  41 +#define lwarn(...) fprintf (stderr, "sb16: " __VA_ARGS__)
  42 +#define linfo(...) fprintf (stderr, "sb16: " __VA_ARGS__)
  43 +#define ldebug(...) fprintf (stderr, "sb16: " __VA_ARGS__)
  44 +#else
  45 +#define lwarn(...)
  46 +#define linfo(...)
  47 +#define ldebug(...)
  48 +#endif
  49 +
  50 +#define IO_READ_PROTO(name) \
  51 + uint32_t name (struct CPUX86State *env, uint32_t nport)
  52 +#define IO_WRITE_PROTO(name) \
  53 + void name (struct CPUX86State *env, uint32_t nport, uint32_t val)
  54 +
  55 +static struct {
  56 + int ver_lo;
  57 + int ver_hi;
  58 + int irq;
  59 + int dma;
  60 + int hdma;
  61 + int port;
  62 + int mix_block;
  63 +} sb = {4, 5, 5, 1, 5, 0x220, -1};
  64 +
  65 +static int mix_block, noirq;
  66 +
  67 +static struct mixer {
  68 + int nreg;
  69 + uint8_t regs[0x83];
  70 +} mixer;
  71 +
  72 +static struct dsp {
  73 + int in_index;
  74 + int out_data_len;
  75 + int fmt_stereo;
  76 + int fmt_signed;
  77 + int fmt_bits;
  78 + int dma_auto;
  79 + int dma_buffer_size;
  80 + int fifo;
  81 + int freq;
  82 + int time_const;
  83 + int speaker;
  84 + int needed_bytes;
  85 + int cmd;
  86 + int dma_pos;
  87 + int use_hdma;
  88 +
  89 + int v2x6;
  90 +
  91 + uint8_t in_data[10];
  92 + uint8_t out_data[10];
  93 +
  94 + int left_till_irq;
  95 +} dsp;
  96 +
  97 +#define nocmd ~0
  98 +
  99 +static void log_dsp (const char *cap)
  100 +{
  101 + DEREF (cap);
  102 +
  103 + linfo ("%c:%c:%d:%c:dmabuf=%d:pos=%d:freq=%d:timeconst=%d:speaker=%d\n",
  104 + dsp.fmt_stereo ? 'S' : 'M',
  105 + dsp.fmt_signed ? 'S' : 'U',
  106 + dsp.fmt_bits,
  107 + dsp.dma_auto ? 'a' : 's',
  108 + dsp.dma_buffer_size,
  109 + dsp.dma_pos,
  110 + dsp.freq,
  111 + dsp.time_const,
  112 + dsp.speaker);
  113 +}
  114 +
  115 +static void control (int hold)
  116 +{
  117 + linfo ("%d high %d\n", hold, dsp.use_hdma);
  118 + if (hold) {
  119 + if (dsp.use_hdma)
  120 + DMA_hold_DREQ (sb.hdma);
  121 + else
  122 + DMA_hold_DREQ (sb.dma);
  123 + }
  124 + else {
  125 + if (dsp.use_hdma)
  126 + DMA_release_DREQ (sb.hdma);
  127 + else
  128 + DMA_release_DREQ (sb.dma);
  129 + }
  130 +}
  131 +
  132 +static void dma_cmd (uint8_t cmd, uint8_t d0, int dma_len)
  133 +{
  134 + int bps;
  135 + audfmt_e fmt;
  136 +
  137 + dsp.use_hdma = cmd < 0xc0;
  138 + dsp.fifo = (cmd >> 1) & 1;
  139 + dsp.dma_auto = (cmd >> 2) & 1;
  140 +
  141 + switch (cmd >> 4) {
  142 + case 11:
  143 + dsp.fmt_bits = 16;
  144 + break;
  145 +
  146 + case 12:
  147 + dsp.fmt_bits = 8;
  148 + break;
  149 + }
  150 +
  151 + dsp.fmt_signed = (d0 >> 4) & 1;
  152 + dsp.fmt_stereo = (d0 >> 5) & 1;
  153 +
  154 + if (-1 != dsp.time_const) {
  155 + int tmp;
  156 +
  157 + tmp = 256 - dsp.time_const;
  158 + dsp.freq = (1000000 + (tmp / 2)) / tmp;
  159 + }
  160 + bps = 1 << (16 == dsp.fmt_bits);
  161 +
  162 + if (-1 != dma_len)
  163 + dsp.dma_buffer_size = (dma_len + 1) * bps;
  164 +
  165 + linfo ("frequency %d, stereo %d, signed %d, bits %d, size %d, auto %d\n",
  166 + dsp.freq, dsp.fmt_stereo, dsp.fmt_signed, dsp.fmt_bits,
  167 + dsp.dma_buffer_size, dsp.dma_auto);
  168 +
  169 + if (16 == dsp.fmt_bits) {
  170 + if (dsp.fmt_signed) {
  171 + fmt = AUD_FMT_S16;
  172 + }
  173 + else {
  174 + fmt = AUD_FMT_U16;
  175 + }
  176 + }
  177 + else {
  178 + if (dsp.fmt_signed) {
  179 + fmt = AUD_FMT_S8;
  180 + }
  181 + else {
  182 + fmt = AUD_FMT_U8;
  183 + }
  184 + }
  185 +
  186 + dsp.dma_pos = 0;
  187 + dsp.left_till_irq = dsp.dma_buffer_size;
  188 +
  189 + if (sb.mix_block) {
  190 + mix_block = sb.mix_block;
  191 + }
  192 + else {
  193 + int align;
  194 +
  195 + align = bps << dsp.fmt_stereo;
  196 + mix_block = ((dsp.freq * align) / 100) & ~(align - 1);
  197 + }
  198 +
  199 + AUD_reset (dsp.freq, 1 << dsp.fmt_stereo, fmt);
  200 + control (1);
  201 + dsp.speaker = 1;
  202 +}
  203 +
  204 +static void command (uint8_t cmd)
  205 +{
  206 + char *msg;
  207 +
  208 + msg = (char *)-1;
  209 +
  210 + linfo ("%#x\n", cmd);
  211 +
  212 + if (cmd > 0xaf && cmd < 0xd0) {
  213 + if (cmd & 8)
  214 + goto error;
  215 +
  216 + switch (cmd >> 4) {
  217 + case 11:
  218 + case 12:
  219 + break;
  220 + default:
  221 + msg = "wrong bits";
  222 + goto error;
  223 + }
  224 + dsp.needed_bytes = 3;
  225 + }
  226 + else {
  227 + switch (cmd) {
  228 + case 0x10:
  229 + dsp.needed_bytes = 1;
  230 + break;
  231 +
  232 + case 0x14:
  233 + dsp.needed_bytes = 2;
  234 + dsp.dma_buffer_size = 0;
  235 + break;
  236 +
  237 + case 0x20:
  238 + dsp.out_data[dsp.out_data_len++] = 0xff;
  239 + break;
  240 +
  241 + case 0x35:
  242 + lwarn ("MIDI commands not implemented\n");
  243 + break;
  244 +
  245 + case 0x40:
  246 + dsp.freq = -1;
  247 + dsp.time_const = -1;
  248 + dsp.needed_bytes = 1;
  249 + break;
  250 +
  251 + case 0x41:
  252 + case 0x42:
  253 + dsp.freq = -1;
  254 + dsp.time_const = -1;
  255 + dsp.needed_bytes = 2;
  256 + break;
  257 +
  258 + case 0x47: /* Continue Auto-Initialize DMA 16bit */
  259 + break;
  260 +
  261 + case 0x48:
  262 + dsp.needed_bytes = 2;
  263 + break;
  264 +
  265 + case 0x27: /* ????????? */
  266 + case 0x4e:
  267 + return;
  268 +
  269 + case 0x80:
  270 + cmd = nocmd;
  271 + break;
  272 +
  273 + case 0x90:
  274 + case 0x91:
  275 + {
  276 + uint8_t d0;
  277 +
  278 + d0 = 4;
  279 + if (dsp.fmt_signed) d0 |= 16;
  280 + if (dsp.fmt_stereo) d0 |= 32;
  281 + dma_cmd (cmd == 0x90 ? 0xc4 : 0xc0, d0, -1);
  282 + cmd = nocmd;
  283 + break;
  284 + }
  285 +
  286 + case 0xd0: /* XXX */
  287 + control (0);
  288 + return;
  289 +
  290 + case 0xd1:
  291 + dsp.speaker = 1;
  292 + break;
  293 +
  294 + case 0xd3:
  295 + dsp.speaker = 0;
  296 + return;
  297 +
  298 + case 0xd4:
  299 + control (1);
  300 + break;
  301 +
  302 + case 0xd5:
  303 + control (0);
  304 + break;
  305 +
  306 + case 0xd6:
  307 + control (1);
  308 + break;
  309 +
  310 + case 0xd9:
  311 + control (0);
  312 + dsp.dma_auto = 0;
  313 + return;
  314 +
  315 + case 0xda:
  316 + control (0);
  317 + dsp.dma_auto = 0;
  318 + break;
  319 +
  320 + case 0xe0:
  321 + dsp.needed_bytes = 1;
  322 + break;
  323 +
  324 + case 0xe1:
  325 + dsp.out_data[dsp.out_data_len++] = sb.ver_lo;
  326 + dsp.out_data[dsp.out_data_len++] = sb.ver_hi;
  327 + return;
  328 +
  329 + case 0xf2:
  330 + dsp.out_data[dsp.out_data_len++] = 0xaa;
  331 + mixer.regs[0x82] |= 1;
  332 + pic_set_irq (sb.irq, 1);
  333 + return;
  334 +
  335 + default:
  336 + msg = "is unknown";
  337 + goto error;
  338 + }
  339 + }
  340 + dsp.cmd = cmd;
  341 + return;
  342 +
  343 + error:
  344 + Fail ("%#x %s", cmd, msg);
  345 + return;
  346 +}
  347 +
  348 +static void complete (void)
  349 +{
  350 + linfo ("complete command %#x, in_index %d, needed_bytes %d\n",
  351 + dsp.cmd, dsp.in_index, dsp.needed_bytes);
  352 +
  353 + if (dsp.cmd > 0xaf && dsp.cmd < 0xd0) {
  354 + int d0, d1, d2;
  355 +
  356 + d0 = dsp.in_data[0];
  357 + d1 = dsp.in_data[1];
  358 + d2 = dsp.in_data[2];
  359 +
  360 + ldebug ("d0 = %d, d1 = %d, d2 = %d\n",
  361 + d0, d1, d2);
  362 + dma_cmd (dsp.cmd, d0, d1 + (d2 << 8));
  363 + }
  364 + else {
  365 + switch (dsp.cmd) {
  366 +
  367 + case 0x10:
  368 + break;
  369 +
  370 + case 0x14:
  371 + {
  372 + int d0, d1;
  373 + int save_left;
  374 + int save_pos;
  375 +
  376 + d0 = dsp.in_data[0];
  377 + d1 = dsp.in_data[1];
  378 +
  379 + save_left = dsp.left_till_irq;
  380 + save_pos = dsp.dma_pos;
  381 + dma_cmd (0xc0, 0, d0 + (d1 << 8));
  382 + dsp.left_till_irq = save_left;
  383 + dsp.dma_pos = save_pos;
  384 +
  385 + linfo ("set buffer size data[%d, %d] %d pos %d\n",
  386 + d0, d1, dsp.dma_buffer_size, dsp.dma_pos);
  387 + break;
  388 + }
  389 +
  390 + case 0x40:
  391 + dsp.time_const = dsp.in_data[0];
  392 + linfo ("set time const %d\n", dsp.time_const);
  393 + break;
  394 +
  395 + case 0x41:
  396 + case 0x42:
  397 + dsp.freq = dsp.in_data[1] + (dsp.in_data[0] << 8);
  398 + linfo ("set freq %#x, %#x = %d\n",
  399 + dsp.in_data[1], dsp.in_data[0], dsp.freq);
  400 + break;
  401 +
  402 + case 0x48:
  403 + dsp.dma_buffer_size = dsp.in_data[1] + (dsp.in_data[0] << 8);
  404 + linfo ("set dma len %#x, %#x = %d\n",
  405 + dsp.in_data[1], dsp.in_data[0], dsp.dma_buffer_size);
  406 + break;
  407 +
  408 + case 0xe0:
  409 + dsp.out_data_len = 1;
  410 + linfo ("data = %#x\n", dsp.in_data[0]);
  411 + dsp.out_data[0] = dsp.in_data[0] ^ 0xff;
  412 + break;
  413 +
  414 + default:
  415 + goto error;
  416 + }
  417 + }
  418 +
  419 + dsp.cmd = -1;
  420 + return;
  421 +
  422 + error:
  423 + Fail ("unrecognized command %#x", dsp.cmd);
  424 +}
  425 +
  426 +static IO_WRITE_PROTO (dsp_write)
  427 +{
  428 + int iport;
  429 +
  430 + iport = nport - sb.port;
  431 +
  432 + switch (iport) {
  433 + case 0x6:
  434 + if (0 == val)
  435 + dsp.v2x6 = 0;
  436 + else if ((1 == val) && (0 == dsp.v2x6)) {
  437 + dsp.v2x6 = 1;
  438 + dsp.out_data[dsp.out_data_len++] = 0xaa;
  439 + }
  440 + else
  441 + dsp.v2x6 = ~0;
  442 + break;
  443 +
  444 + case 0xc: /* write data or command | write status */
  445 + if (0 == dsp.needed_bytes) {
  446 + command (val);
  447 + if (0 == dsp.needed_bytes) {
  448 + log_dsp (__func__);
  449 + }
  450 + }
  451 + else {
  452 + dsp.in_data[dsp.in_index++] = val;
  453 + if (dsp.in_index == dsp.needed_bytes) {
  454 + dsp.needed_bytes = 0;
  455 + dsp.in_index = 0;
  456 + complete ();
  457 + log_dsp (__func__);
  458 + }
  459 + }
  460 + break;
  461 +
  462 + default:
  463 + Fail ("(nport=%#x, val=%#x)", nport, val);
  464 + }
  465 +}
  466 +
  467 +static IO_READ_PROTO (dsp_read)
  468 +{
  469 + char *msg;
  470 + int iport, retval;
  471 +
  472 + msg = (char *) -1;
  473 + iport = nport - sb.port;
  474 +
  475 + switch (iport) {
  476 +
  477 + case 0x6: /* reset */
  478 + return 0;
  479 +
  480 + case 0xa: /* read data */
  481 + if (dsp.out_data_len) {
  482 + retval = dsp.out_data[--dsp.out_data_len];
  483 + }
  484 + else {
  485 +#if 1
  486 + lwarn ("empty output buffer\n");
  487 + retval = 0;
  488 +#else
  489 + msg = "empty output buffer";
  490 + goto error;
  491 +#endif
  492 + }
  493 + break;
  494 +
  495 + case 0xc: /* 0 can write */
  496 + retval = 0;
  497 + break;
  498 +
  499 + case 0xd: /* timer interrupt clear */
  500 + goto error;
  501 +
  502 + case 0xe: /* data available status | irq 8 ack */
  503 + retval = (0 == dsp.out_data_len) ? 0 : 0x80;
  504 + break;
  505 +
  506 + case 0xf: /* irq 16 ack */
  507 + retval = 0xff;
  508 + mixer.regs[0x82] &= ~2;
  509 + ldebug ("16 ack\n");
  510 + break;
  511 +
  512 + default:
  513 + goto error;
  514 + }
  515 +
  516 + if ((0xc != iport) && (0xe != iport)) {
  517 + ldebug ("(nport=%#x, size=%d) iport %#x = %#x\n",
  518 + nport, size, iport, retval);
  519 + }
  520 +
  521 + return retval;
  522 +
  523 + error:
  524 + Fail ("(nport=%#x) %s", nport, msg);
  525 +}
  526 +
  527 +static IO_WRITE_PROTO(mixer_write_indexb)
  528 +{
  529 + mixer.nreg = val & 0xff;
  530 +}
  531 +
  532 +static IO_WRITE_PROTO(mixer_write_datab)
  533 +{
  534 + mixer.regs[mixer.nreg] = val;
  535 +}
  536 +
  537 +static IO_WRITE_PROTO(mixer_write_indexw)
  538 +{
  539 + mixer_write_indexb (env, nport, val & 0xff);
  540 + mixer_write_datab (env, nport, (val >> 8) & 0xff);
  541 +}
  542 +
  543 +static IO_READ_PROTO(mixer_read)
  544 +{
  545 + return mixer.regs[mixer.nreg];
  546 +}
  547 +
  548 +void SB16_run (void)
  549 +{
  550 + if (0 == dsp.speaker)
  551 + return;
  552 +
  553 + AUD_run ();
  554 +}
  555 +
  556 +static int write_audio (uint32_t addr, int len, int size)
  557 +{
  558 + int temp, net;
  559 +
  560 + temp = size;
  561 +
  562 + net = 0;
  563 +
  564 + while (temp) {
  565 + int left_till_end;
  566 + int to_copy;
  567 + int copied;
  568 +
  569 + left_till_end = len - dsp.dma_pos;
  570 +
  571 + to_copy = MIN (temp, left_till_end);
  572 +
  573 + copied = AUD_write ((void *) (addr + dsp.dma_pos), to_copy);
  574 +
  575 + temp -= copied;
  576 + dsp.dma_pos += copied;
  577 +
  578 + if (dsp.dma_pos == len) {
  579 + dsp.dma_pos = 0;
  580 + }
  581 +
  582 + net += copied;
  583 +
  584 + if (copied != to_copy)
  585 + return net;
  586 + }
  587 +
  588 + return net;
  589 +}
  590 +
  591 +static int SB_read_DMA (uint32_t addr, int size, int *_irq)
  592 +{
  593 + int free, till, copy, written;
  594 +
  595 + if (0 == dsp.speaker)
  596 + return 0;
  597 +
  598 + if (dsp.left_till_irq < 0) {
  599 + dsp.left_till_irq += dsp.dma_buffer_size;
  600 + return dsp.dma_pos;
  601 + }
  602 +
  603 + free = AUD_get_free ();
  604 +
  605 + if ((free <= 0) || (0 == size)) {
  606 + return dsp.dma_pos;
  607 + }
  608 +
  609 + if (mix_block > 0) {
  610 + copy = MIN (free, mix_block);
  611 + }
  612 + else {
  613 + copy = free;
  614 + }
  615 +
  616 + till = dsp.left_till_irq;
  617 +
  618 + ldebug ("addr:%#010x free:%d till:%d size:%d\n",
  619 + addr, free, till, size);
  620 +/* linfo ("pos %d free %d size %d till %d copy %d auto %d noirq %d\n", */
  621 +/* dsp.dma_pos, free, size, till, copy, dsp.dma_auto, noirq); */
  622 + if (till <= copy) {
  623 + if (0 == dsp.dma_auto) {
  624 + copy = till;
  625 + }
  626 + }
  627 +
  628 + written = write_audio (addr, size, copy);
  629 + dsp.left_till_irq -= written;
  630 + AUD_adjust_estimate (free - written);
  631 +
  632 + if (dsp.left_till_irq <= 0) {
  633 + mixer.regs[0x82] |= mixer.regs[0x80];
  634 + if (0 == noirq)
  635 + *_irq = sb.irq;
  636 +
  637 + if (0 == dsp.dma_auto) {
  638 + control (0);
  639 + }
  640 + }
  641 +
  642 + ldebug ("pos %5d free %5d size %5d till % 5d copy %5d dma size %5d\n",
  643 + dsp.dma_pos, free, size, dsp.left_till_irq, copy,
  644 + dsp.dma_buffer_size);
  645 +
  646 + if (dsp.left_till_irq <= 0) {
  647 + dsp.left_till_irq += dsp.dma_buffer_size;
  648 + }
  649 +
  650 + return dsp.dma_pos;
  651 +}
  652 +
  653 +static int dma_misc_handler (int moo)
  654 +{
  655 + return -1;
  656 +}
  657 +
  658 +static int magic_of_irq (int irq)
  659 +{
  660 + switch (irq) {
  661 + case 2:
  662 + return 1;
  663 + case 5:
  664 + return 2;
  665 + case 7:
  666 + return 4;
  667 + case 10:
  668 + return 8;
  669 + default:
  670 + log ("bad irq %d\n", irq);
  671 + return 2;
  672 + }
  673 +}
  674 +
  675 +static int irq_of_magic (int magic)
  676 +{
  677 + switch (magic) {
  678 + case 1:
  679 + return 2;
  680 + case 2:
  681 + return 5;
  682 + case 4:
  683 + return 7;
  684 + case 8:
  685 + return 10;
  686 + default:
  687 + log ("bad irq magic %d\n", magic);
  688 + return 2;
  689 + }
  690 +}
  691 +
  692 +void SB16_init (void)
  693 +{
  694 + int i;
  695 + static const uint8_t dsp_write_ports[] = {0x6, 0xc};
  696 + static const uint8_t dsp_read_ports[] = {0x6, 0xa, 0xc, 0xd, 0xe, 0xf};
  697 +
  698 + mixer.regs[0x0e] = ~0;
  699 + mixer.regs[0x80] = magic_of_irq (sb.irq);
  700 + mixer.regs[0x81] = 0x20 | (sb.dma << 1);
  701 +
  702 + DEREF (irq_of_magic);
  703 +
  704 + for (i = 0x30; i < 0x48; i++) {
  705 + mixer.regs[i] = 0x20;
  706 + }
  707 +
  708 + for (i = 0; i < LENOFA (dsp_write_ports); i++) {
  709 + register_ioport_write (sb.port + dsp_write_ports[i], 1, dsp_write, 1);
  710 + }
  711 +
  712 + for (i = 0; i < LENOFA (dsp_read_ports); i++) {
  713 + register_ioport_read (sb.port + dsp_read_ports[i], 1, dsp_read, 1);
  714 + }
  715 +
  716 + register_ioport_write (sb.port + 0x4, 1, mixer_write_indexb, 1);
  717 + register_ioport_write (sb.port + 0x4, 1, mixer_write_indexw, 2);
  718 + register_ioport_read (sb.port + 0x5, 1, mixer_read, 1);
  719 + register_ioport_write (sb.port + 0x5, 1, mixer_write_datab, 1);
  720 +
  721 + DMA_register_channel (sb.hdma, SB_read_DMA, dma_misc_handler);
  722 + DMA_register_channel (sb.dma, SB_read_DMA, dma_misc_handler);
  723 +}
... ...
oss.c 0 → 100644
  View file @2750332
  1 +/*
  2 + * QEMU OSS Audio output driver
  3 + *
  4 + * Copyright (c) 2003 Vassili Karpov (malc)
  5 + *
  6 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  7 + * of this software and associated documentation files (the "Software"), to deal
  8 + * in the Software without restriction, including without limitation the rights
  9 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 + * copies of the Software, and to permit persons to whom the Software is
  11 + * furnished to do so, subject to the following conditions:
  12 + *
  13 + * The above copyright notice and this permission notice shall be included in
  14 + * all copies or substantial portions of the Software.
  15 + *
  16 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 + * THE SOFTWARE.
  23 + */
  24 +#include <fcntl.h>
  25 +#include <errno.h>
  26 +#include <stdio.h>
  27 +#include <unistd.h>
  28 +#include <string.h>
  29 +#include <stdlib.h>
  30 +#include <limits.h>
  31 +#include <inttypes.h>
  32 +#include <sys/types.h>
  33 +#include <sys/ioctl.h>
  34 +#include <sys/soundcard.h>
  35 +
  36 +#include "vl.h"
  37 +
  38 +/* http://www.df.lth.se/~john_e/gems/gem002d.html */
  39 +/* http://www.multi-platforms.com/Tips/PopCount.htm */
  40 +static inline uint32_t popcount (uint32_t u)
  41 +{
  42 + u = ((u&0x55555555) + ((u>>1)&0x55555555));
  43 + u = ((u&0x33333333) + ((u>>2)&0x33333333));
  44 + u = ((u&0x0f0f0f0f) + ((u>>4)&0x0f0f0f0f));
  45 + u = ((u&0x00ff00ff) + ((u>>8)&0x00ff00ff));
  46 + u = ( u&0x0000ffff) + (u>>16);
  47 + return u;
  48 +}
  49 +
  50 +static inline uint32_t lsbindex (uint32_t u)
  51 +{
  52 + return popcount ((u&-u)-1);
  53 +}
  54 +
  55 +#define MIN(a, b) ((a)>(b)?(b):(a))
  56 +#define MAX(a, b) ((a)<(b)?(b):(a))
  57 +
  58 +#define DEREF(x) (void)x
  59 +#define log(...) fprintf (stderr, "oss: " __VA_ARGS__)
  60 +#define ERRFail(...) do { \
  61 + int _errno = errno; \
  62 + fprintf (stderr, "oss: " __VA_ARGS__); \
  63 + fprintf (stderr, "system error: %s\n", strerror (_errno)); \
  64 + abort (); \
  65 +} while (0)
  66 +#define Fail(...) do { \
  67 + fprintf (stderr, "oss: " __VA_ARGS__); \
  68 + fprintf (stderr, "\n"); \
  69 + abort (); \
  70 +} while (0)
  71 +
  72 +#ifdef DEBUG_OSS
  73 +#define lwarn(...) fprintf (stderr, "oss: " __VA_ARGS__)
  74 +#define linfo(...) fprintf (stderr, "oss: " __VA_ARGS__)
  75 +#define ldebug(...) fprintf (stderr, "oss: " __VA_ARGS__)
  76 +#else
  77 +#define lwarn(...)
  78 +#define linfo(...)
  79 +#define ldebug(...)
  80 +#endif
  81 +
  82 +
  83 +#define IOCTL(args) do { \
  84 + int ret = ioctl args; \
  85 + if (-1 == ret) { \
  86 + ERRFail (#args); \
  87 + } \
  88 + ldebug ("ioctl " #args " = %d\n", ret); \
  89 +} while (0)
  90 +
  91 +static int audio_fd = -1;
  92 +static int freq;
  93 +static int conf_nfrags = 4;
  94 +static int conf_fragsize;
  95 +static int nfrags;
  96 +static int fragsize;
  97 +static int bufsize;
  98 +static int nchannels;
  99 +static int fmt;
  100 +static int rpos;
  101 +static int wpos;
  102 +static int atom;
  103 +static int live;
  104 +static int leftover;
  105 +static int bytes_per_second;
  106 +static void *buf;
  107 +static enum {DONT, DSP, TID} estimate = TID;
  108 +
  109 +static void (*copy_fn)(void *, void *, int);
  110 +
  111 +static void copy_no_conversion (void *dst, void *src, int size)
  112 +{
  113 + memcpy (dst, src, size);
  114 +}
  115 +
  116 +static void copy_u16_to_s16 (void *dst, void *src, int size)
  117 +{
  118 + int i;
  119 + uint16_t *out, *in;
  120 +
  121 + out = dst;
  122 + in = src;
  123 +
  124 + for (i = 0; i < size / 2; i++) {
  125 + out[i] = in[i] + 0x8000;
  126 + }
  127 +}
  128 +
  129 +static void pab (struct audio_buf_info *abinfo)
  130 +{
  131 + DEREF (abinfo);
  132 +
  133 + ldebug ("fragments %d, fragstotal %d, fragsize %d, bytes %d\n"
  134 + "rpos %d, wpos %d, live %d\n",
  135 + abinfo->fragments,
  136 + abinfo->fragstotal,
  137 + abinfo->fragsize,
  138 + abinfo->bytes,
  139 + rpos, wpos, live);
  140 +}
  141 +
  142 +void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt)
  143 +{
  144 + int fmt_;
  145 + int bits16;
  146 +
  147 + if (-1 == audio_fd) {
  148 + AUD_open (rfreq, rnchannels, rfmt);
  149 + return;
  150 + }
  151 +
  152 + switch (rfmt) {
  153 + case AUD_FMT_U8:
  154 + bits16 = 0;
  155 + fmt_ = AFMT_U8;
  156 + copy_fn = copy_no_conversion;
  157 + atom = 1;
  158 + break;
  159 +
  160 + case AUD_FMT_S8:
  161 + Fail ("can not play 8bit signed");
  162 +
  163 + case AUD_FMT_S16:
  164 + bits16 = 1;
  165 + fmt_ = AFMT_S16_LE;
  166 + copy_fn = copy_no_conversion;
  167 + atom = 2;
  168 + break;
  169 +
  170 + case AUD_FMT_U16:
  171 + bits16 = 1;
  172 + fmt_ = AFMT_S16_LE;
  173 + copy_fn = copy_u16_to_s16;
  174 + atom = 2;
  175 + break;
  176 +
  177 + default:
  178 + abort ();
  179 + }
  180 +
  181 + if ((fmt_ == fmt) && (bits16 + 1 == nchannels) && (rfreq == freq))
  182 + return;
  183 + else {
  184 + AUD_open (rfreq, rnchannels, rfmt);
  185 + }
  186 +}
  187 +
  188 +void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt)
  189 +{
  190 + int fmt_;
  191 + int mmmmssss;
  192 + struct audio_buf_info abinfo;
  193 + int _fmt;
  194 + int _freq;
  195 + int _nchannels;
  196 + int bits16;
  197 +
  198 + bits16 = 0;
  199 +
  200 + switch (rfmt) {
  201 + case AUD_FMT_U8:
  202 + bits16 = 0;
  203 + fmt_ = AFMT_U8;
  204 + copy_fn = copy_no_conversion;
  205 + atom = 1;
  206 + break;
  207 +
  208 + case AUD_FMT_S8:
  209 + Fail ("can not play 8bit signed");
  210 +
  211 + case AUD_FMT_S16:
  212 + bits16 = 1;
  213 + fmt_ = AFMT_S16_LE;
  214 + copy_fn = copy_no_conversion;
  215 + atom = 2;
  216 + break;
  217 +
  218 + case AUD_FMT_U16:
  219 + bits16 = 1;
  220 + fmt_ = AFMT_S16_LE;
  221 + copy_fn = copy_u16_to_s16;
  222 + atom = 2;
  223 + break;
  224 +
  225 + default:
  226 + abort ();
  227 + }
  228 +
  229 + if (buf) {
  230 + free (buf);
  231 + buf = 0;
  232 + }
  233 +
  234 + if (-1 != audio_fd)
  235 + close (audio_fd);
  236 +
  237 + audio_fd = open ("/dev/dsp", O_WRONLY | O_NONBLOCK);
  238 + if (-1 == audio_fd) {
  239 + ERRFail ("can not open /dev/dsp");
  240 + }
  241 +
  242 + _fmt = fmt_;
  243 + _freq = rfreq;
  244 + _nchannels = rnchannels;
  245 +
  246 + IOCTL ((audio_fd, SNDCTL_DSP_RESET, 1));
  247 + IOCTL ((audio_fd, SNDCTL_DSP_SAMPLESIZE, &_fmt));
  248 + IOCTL ((audio_fd, SNDCTL_DSP_CHANNELS, &_nchannels));
  249 + IOCTL ((audio_fd, SNDCTL_DSP_SPEED, &_freq));
  250 + IOCTL ((audio_fd, SNDCTL_DSP_NONBLOCK));
  251 +
  252 + /* from oss.pdf:
  253 +
  254 + The argument to this call is an integer encoded as 0xMMMMSSSS (in
  255 + hex). The 16 least significant bits determine the fragment
  256 + size. The size is 2^SSSS. For examp le SSSS=0008 gives fragment
  257 + size of 256 bytes (2^8). The minimum is 16 bytes (SSSS=4) and the
  258 + maximum is total_buffer_size/2. Some devices or processor
  259 + architectures may require larger fragments - in this case the
  260 + requested fragment size is automatically increased.
  261 +
  262 + So ahem... 4096 = 2^12, and grand total 0x0004000c
  263 + */
  264 +
  265 + mmmmssss = (conf_nfrags << 16) | conf_fragsize;
  266 + IOCTL ((audio_fd, SNDCTL_DSP_SETFRAGMENT, &mmmmssss));
  267 +
  268 + linfo ("_fmt = %d, fmt = %d\n"
  269 + "_channels = %d, rnchannels = %d\n"
  270 + "_freq = %d, freq = %d\n",
  271 + _fmt, fmt_,
  272 + _nchannels, rnchannels,
  273 + _freq, rfreq);
  274 +
  275 + if (_fmt != fmt_) {
  276 + Fail ("format %d != %d", _fmt, fmt_);
  277 + }
  278 +
  279 + if (_nchannels != rnchannels) {
  280 + Fail ("channels %d != %d", _nchannels, rnchannels);
  281 + }
  282 +
  283 + if (_freq != rfreq) {
  284 + Fail ("freq %d != %d", _freq, rfreq);
  285 + }
  286 +
  287 + IOCTL ((audio_fd, SNDCTL_DSP_GETOSPACE, &abinfo));
  288 +
  289 + nfrags = abinfo.fragstotal;
  290 + fragsize = abinfo.fragsize;
  291 + freq = _freq;
  292 + fmt = _fmt;
  293 + nchannels = rnchannels;
  294 + atom <<= nchannels >> 1;
  295 + bufsize = nfrags * fragsize;
  296 +
  297 + bytes_per_second = (freq << (nchannels >> 1)) << bits16;
  298 +
  299 + linfo ("bytes per second %d\n", bytes_per_second);
  300 +
  301 + linfo ("fragments %d, fragstotal %d, fragsize %d, bytes %d, bufsize %d\n",
  302 + abinfo.fragments,
  303 + abinfo.fragstotal,
  304 + abinfo.fragsize,
  305 + abinfo.bytes,
  306 + bufsize);
  307 +
  308 + if (NULL == buf) {
  309 + buf = malloc (bufsize);
  310 + if (NULL == buf) {
  311 + abort ();
  312 + }
  313 + }
  314 +
  315 + rpos = 0;
  316 + wpos = 0;
  317 + live = 0;
  318 +}
  319 +
  320 +int AUD_write (void *in_buf, int size)
  321 +{
  322 + int to_copy, temp;
  323 + uint8_t *in, *out;
  324 +
  325 + to_copy = MIN (bufsize - live, size);
  326 +
  327 + temp = to_copy;
  328 +
  329 + in = in_buf;
  330 + out = buf;
  331 +
  332 + while (temp) {
  333 + int copy;
  334 +
  335 + copy = MIN (temp, bufsize - wpos);
  336 + copy_fn (out + wpos, in, copy);
  337 +
  338 + wpos += copy;
  339 + if (wpos == bufsize) {
  340 + wpos = 0;
  341 + }
  342 +
  343 + temp -= copy;
  344 + in += copy;
  345 + live += copy;
  346 + }
  347 +
  348 + return to_copy;
  349 +}
  350 +
  351 +void AUD_run (void)
  352 +{
  353 + int res;
  354 + int bytes;
  355 + struct audio_buf_info abinfo;
  356 +
  357 + if (0 == live)
  358 + return;
  359 +
  360 + res = ioctl (audio_fd, SNDCTL_DSP_GETOSPACE, &abinfo);
  361 +
  362 + if (-1 == res) {
  363 + int err;
  364 +
  365 + err = errno;
  366 + lwarn ("SNDCTL_DSP_GETOSPACE failed with %s\n", strerror (err));
  367 + }
  368 +
  369 + bytes = abinfo.bytes;
  370 + bytes = MIN (live, bytes);
  371 +#if 0
  372 + bytes = (bytes / fragsize) * fragsize;
  373 +#endif
  374 +
  375 + while (bytes) {
  376 + int left, play, written;
  377 +
  378 + left = bufsize - rpos;
  379 + play = MIN (left, bytes);
  380 + written = write (audio_fd, (void *) ((uint32_t) buf + rpos), play);
  381 +
  382 + if (-1 == written) {
  383 + if (EAGAIN == errno || EINTR == errno) {
  384 + return;
  385 + }
  386 + else {
  387 + ERRFail ("write audio");
  388 + }
  389 + }
  390 +
  391 + play = written;
  392 + live -= play;
  393 + rpos += play;
  394 + bytes -= play;
  395 +
  396 + if (rpos == bufsize) {
  397 + rpos = 0;
  398 + }
  399 + }
  400 +}
  401 +
  402 +static int get_dsp_bytes (void)
  403 +{
  404 + int res;
  405 + struct count_info info;
  406 +
  407 + res = ioctl (audio_fd, SNDCTL_DSP_GETOPTR, &info);
  408 + if (-1 == res) {
  409 + int err;
  410 +
  411 + err = errno;
  412 + lwarn ("SNDCTL_DSP_GETOPTR failed with %s\n", strerror (err));
  413 + return -1;
  414 + }
  415 + else {
  416 + ldebug ("bytes %d\n", info.bytes);
  417 + return info.bytes;
  418 + }
  419 +}
  420 +
  421 +void AUD_adjust_estimate (int _leftover)
  422 +{
  423 + leftover = _leftover;
  424 +}
  425 +
  426 +int AUD_get_free (void)
  427 +{
  428 + int free, elapsed;
  429 +
  430 + free = bufsize - live;
  431 +
  432 + if (0 == free)
  433 + return 0;
  434 +
  435 + elapsed = free;
  436 + switch (estimate) {
  437 + case DONT:
  438 + break;
  439 +
  440 + case DSP:
  441 + {
  442 + static int old_bytes;
  443 + int bytes;
  444 +
  445 + bytes = get_dsp_bytes ();
  446 + if (bytes <= 0)
  447 + return free;
  448 +
  449 + elapsed = bytes - old_bytes;
  450 + old_bytes = bytes;
  451 + ldebug ("dsp elapsed %d bytes\n", elapsed);
  452 + break;
  453 + }
  454 +
  455 + case TID:
  456 + {
  457 + static uint64_t old_ticks;
  458 + uint64_t ticks, delta;
  459 + uint64_t ua_elapsed;
  460 + uint64_t al_elapsed;
  461 +
  462 + ticks = cpu_get_ticks ();
  463 + delta = ticks - old_ticks;
  464 + old_ticks = ticks;
  465 +
  466 + ua_elapsed = (delta * bytes_per_second) / ticks_per_sec;
  467 + al_elapsed = ua_elapsed & ~3ULL;
  468 +
  469 + ldebug ("tid elapsed %llu bytes\n", ua_elapsed);
  470 +
  471 + if (al_elapsed > (uint64_t) INT_MAX)
  472 + elapsed = INT_MAX;
  473 + else
  474 + elapsed = al_elapsed;
  475 +
  476 + elapsed += leftover;
  477 + }
  478 + }
  479 +
  480 + if (elapsed > free) {
  481 + lwarn ("audio can not keep up elapsed %d free %d\n", elapsed, free);
  482 + return free;
  483 + }
  484 + else {
  485 + return elapsed;
  486 + }
  487 +}
  488 +
  489 +int AUD_get_live (void)
  490 +{
  491 + return live;
  492 +}
  493 +
  494 +int AUD_get_buffer_size (void)
  495 +{
  496 + return bufsize;
  497 +}
  498 +
  499 +void AUD_init (void)
  500 +{
  501 + int fsp;
  502 + int _fragsize = 4096;
  503 +
  504 + DEREF (pab);
  505 +
  506 + fsp = _fragsize;
  507 + if (0 != (fsp & (fsp - 1))) {
  508 + Fail ("fragment size %d is not power of 2", fsp);
  509 + }
  510 +
  511 + conf_fragsize = lsbindex (fsp);
  512 +}
... ...
... ... @@ -2095,6 +2095,9 @@ void kbd_write_command(CPUX86State *env, uint32_t addr, uint32_t val)
2095 2095 reset_requested = 1;
2096 2096 cpu_x86_interrupt(global_env, CPU_INTERRUPT_EXIT);
2097 2097 break;
  2098 + case 0xff:
  2099 + /* ignore that - I don't know what is its use */
  2100 + break;
2098 2101 default:
2099 2102 fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
2100 2103 break;
... ... @@ -2598,6 +2601,10 @@ static void host_alarm_handler(int host_signum, siginfo_t *info,
2598 2601 gui_refresh_pending = 1;
2599 2602 }
2600 2603  
  2604 + /* XXX: seems dangerous to run that here. */
  2605 + DMA_run();
  2606 + SB16_run();
  2607 +
2601 2608 if (gui_refresh_pending || timer_irq_pending) {
2602 2609 /* just exit from the cpu to have a chance to handle timers */
2603 2610 cpu_x86_interrupt(global_env, CPU_INTERRUPT_EXIT);
... ... @@ -2746,7 +2753,7 @@ void help(void)
2746 2753 "-hda/-hdb file use 'file' as IDE hard disk 0/1 image\n"
2747 2754 "-hdc/-hdd file use 'file' as IDE hard disk 2/3 image\n"
2748 2755 "-cdrom file use 'file' as IDE cdrom 2 image\n"
2749   - "-boot [c|d] boot on hard disk or CD-ROM\n"
  2756 + "-boot [c|d] boot on hard disk (c) or CD-ROM (d)\n"
2750 2757 "-snapshot write to temporary files instead of disk image files\n"
2751 2758 "-m megs set virtual RAM size to megs MB\n"
2752 2759 "-n script set network init script [default=%s]\n"
... ... @@ -3148,6 +3155,9 @@ int main(int argc, char **argv)
3148 3155 ne2000_init();
3149 3156 ide_init();
3150 3157 kbd_init();
  3158 + AUD_init();
  3159 + DMA_init();
  3160 + SB16_init();
3151 3161  
3152 3162 /* setup cpu signal handlers for MMU / self modifying code handling */
3153 3163 sigfillset(&act.sa_mask);
... ...
... ... @@ -27,6 +27,7 @@
27 27 /* vl.c */
28 28 struct CPUX86State;
29 29 extern int reset_requested;
  30 +extern int64_t ticks_per_sec;
30 31  
31 32 typedef void (IOPortWriteFunc)(struct CPUX86State *env, uint32_t address, uint32_t data);
32 33 typedef uint32_t (IOPortReadFunc)(struct CPUX86State *env, uint32_t address);
... ... @@ -35,6 +36,7 @@ void *get_mmap_addr(unsigned long size);
35 36 int register_ioport_read(int start, int length, IOPortReadFunc *func, int size);
36 37 int register_ioport_write(int start, int length, IOPortWriteFunc *func, int size);
37 38 void pic_set_irq(int irq, int level);
  39 +int64_t cpu_get_ticks(void);
38 40  
39 41 void kbd_put_keycode(int keycode);
40 42  
... ... @@ -107,4 +109,39 @@ void ide_init(void);
107 109 void ide_set_geometry(int n, int cyls, int heads, int secs);
108 110 void ide_set_cdrom(int n, int is_cdrom);
109 111  
  112 +/* oss.c */
  113 +typedef enum {
  114 + AUD_FMT_U8,
  115 + AUD_FMT_S8,
  116 + AUD_FMT_U16,
  117 + AUD_FMT_S16
  118 +} audfmt_e;
  119 +
  120 +void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt);
  121 +void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt);
  122 +int AUD_write (void *in_buf, int size);
  123 +void AUD_run (void);
  124 +void AUD_adjust_estimate (int _leftover);
  125 +int AUD_get_free (void);
  126 +int AUD_get_live (void);
  127 +int AUD_get_buffer_size (void);
  128 +void AUD_init (void);
  129 +
  130 +/* dma.c */
  131 +typedef int (*DMA_read_handler) (uint32_t addr, int size, int *irq);
  132 +typedef int (*DMA_misc_handler) (int);
  133 +
  134 +int DMA_get_channel_mode (int nchan);
  135 +void DMA_hold_DREQ (int nchan);
  136 +void DMA_release_DREQ (int nchan);
  137 +void DMA_run (void);
  138 +void DMA_init (void);
  139 +void DMA_register_channel (int nchan,
  140 + DMA_read_handler read_handler,
  141 + DMA_misc_handler misc_handler);
  142 +
  143 +/* sb16.c */
  144 +void SB16_run (void);
  145 +void SB16_init (void);
  146 +
110 147 #endif /* VL_H */
... ...