gwj / at91sam9263 · Commits

Commit 274a9e70de095240c8013c9dd9980213d54198d0

Authored by aurel32
1 parent 833ed386

[sh4] delay slot bug fix 

Two bugs about delay slot handlings are fixed.

- After an exception occurred in delay slot, the branch instruction
  before delay slot should be executed again. To judge such re-execution
  is necessery or not, delay slot status is kept in SH4 CPU data structure.
- When a branch instruction is placed at the end of memory segment,
  the delay slot is placed at the start of next memory segment.
  It means delay slot comes to the start of a translation block.
  In such occasion, DELAY_SLOT_CLAREME flag is used to transmit status
  between translation blocks. When an exception occurs on this kind of
  delay slot, DELAY_SLOT_CLEARME flag cause a status confusion in exception
  handling. DELAY_SLOT_CLEARME flag should be cleared on exceptions.

And some items are added to CPU status dump.

(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5066 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 22 additions and 0 deletions
target-sh4/helper.c
  View file @274a9e7
@@ -157,6 +157,15 @@ void do_interrupt(CPUState * env) @@ -157,6 +157,15 @@ void do_interrupt(CPUState * env)
157 env->sgr = env->gregs[15]; 157 env->sgr = env->gregs[15];
158 env->sr |= SR_BL | SR_MD | SR_RB; 158 env->sr |= SR_BL | SR_MD | SR_RB;
159 159
  160 + if (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) {
  161 + /* Branch instruction should be executed again before delay slot. */
  162 + env->spc -= 2;
  163 + /* Clear flags for exception/interrupt routine. */
  164 + env->flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL | DELAY_SLOT_TRUE);
  165 + }
  166 + if (env->flags & DELAY_SLOT_CLEARME)
  167 + env->flags = 0;
  168 +
160 if (do_exp) { 169 if (do_exp) {
161 env->expevt = env->exception_index; 170 env->expevt = env->exception_index;
162 switch (env->exception_index) { 171 switch (env->exception_index) {
target-sh4/translate.c
  View file @274a9e7
@@ -115,6 +115,10 @@ void cpu_dump_state(CPUState * env, FILE * f, @@ -115,6 +115,10 @@ void cpu_dump_state(CPUState * env, FILE * f,
115 int i; 115 int i;
116 cpu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n", 116 cpu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n",
117 env->pc, env->sr, env->pr, env->fpscr); 117 env->pc, env->sr, env->pr, env->fpscr);
  118 + cpu_fprintf(f, "spc=0x%08x ssr=0x%08x gbr=0x%08x vbr=0x%08x\n",
  119 + env->spc, env->ssr, env->gbr, env->vbr);
  120 + cpu_fprintf(f, "sgr=0x%08x dbr=0x%08x delayed_pc=0x%08x fpul=0x%08x\n",
  121 + env->sgr, env->dbr, env->delayed_pc, env->fpul);
118 for (i = 0; i < 24; i += 4) { 122 for (i = 0; i < 24; i += 4) {
119 cpu_fprintf(f, "r%d=0x%08x r%d=0x%08x r%d=0x%08x r%d=0x%08x\n", 123 cpu_fprintf(f, "r%d=0x%08x r%d=0x%08x r%d=0x%08x r%d=0x%08x\n",
120 i, env->gregs[i], i + 1, env->gregs[i + 1], 124 i, env->gregs[i], i + 1, env->gregs[i + 1],
@@ -1188,6 +1192,11 @@ void decode_opc(DisasContext * ctx) @@ -1188,6 +1192,11 @@ void decode_opc(DisasContext * ctx)
1188 if (old_flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { 1192 if (old_flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) {
1189 if (ctx->flags & DELAY_SLOT_CLEARME) { 1193 if (ctx->flags & DELAY_SLOT_CLEARME) {
1190 gen_op_store_flags(0); 1194 gen_op_store_flags(0);
  1195 + } else {
  1196 + /* go out of the delay slot */
  1197 + uint32_t new_flags = ctx->flags;
  1198 + new_flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL);
  1199 + gen_op_store_flags(new_flags);
1191 } 1200 }
1192 ctx->flags = 0; 1201 ctx->flags = 0;
1193 ctx->bstate = BS_BRANCH; 1202 ctx->bstate = BS_BRANCH;
@@ -1198,6 +1207,10 @@ void decode_opc(DisasContext * ctx) @@ -1198,6 +1207,10 @@ void decode_opc(DisasContext * ctx)
1198 } 1207 }
1199 1208
1200 } 1209 }
  1210 +
  1211 + /* go into a delay slot */
  1212 + if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL))
  1213 + gen_op_store_flags(ctx->flags);
1201 } 1214 }
1202 1215
1203 static inline void 1216 static inline void