gwj / at91sam9263 · Commits

Commit 271dd5e09ee1d8ad4438471211ffbf6b5a377084

Authored by blueswir1
1 parent 95efd11c

Use the firmware configuration device 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6130 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 14 additions and 0 deletions
hw/ppc_oldworld.c
  View file @271dd5e
@@ -32,9 +32,17 @@ @@ -32,9 +32,17 @@
32 #include "isa.h" 32 #include "isa.h"
33 #include "pci.h" 33 #include "pci.h"
34 #include "boards.h" 34 #include "boards.h"
  35 +#include "fw_cfg.h"
35 36
36 #define MAX_IDE_BUS 2 37 #define MAX_IDE_BUS 2
37 #define VGA_BIOS_SIZE 65536 38 #define VGA_BIOS_SIZE 65536
  39 +#define CFG_ADDR 0xf0000510
  40 +
  41 +enum {
  42 + ARCH_PREP = 0,
  43 + ARCH_MAC99,
  44 + ARCH_HEATHROW,
  45 +};
38 46
39 /* temporary frame buffer OSI calls for the video.x driver. The right 47 /* temporary frame buffer OSI calls for the video.x driver. The right
40 solution is to modify the driver to use VGA PCI I/Os */ 48 solution is to modify the driver to use VGA PCI I/Os */
@@ -128,6 +136,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, @@ -128,6 +136,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
128 int ppc_boot_device; 136 int ppc_boot_device;
129 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 137 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
130 int index; 138 int index;
  139 + void *fw_cfg;
131 140
132 linux_boot = (kernel_filename != NULL); 141 linux_boot = (kernel_filename != NULL);
133 142
@@ -363,6 +372,11 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, @@ -363,6 +372,11 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
363 372
364 /* Special port to get debug messages from Open-Firmware */ 373 /* Special port to get debug messages from Open-Firmware */
365 register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL); 374 register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
  375 +
  376 + fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
  377 + fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
  378 + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
  379 + fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
366 } 380 }
367 381
368 QEMUMachine heathrow_machine = { 382 QEMUMachine heathrow_machine = {