Commit 271a916e8a4188b0ec94bafff18aa93de0047820
1 parent
3e4587d5
Fix invalid PowerPC 64 rldimi optimized case.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3638 c046a42c-6fe2-441c-8c8c-71466251a162
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3 additions
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5 deletions
target-ppc/translate.c
... | ... | @@ -1606,17 +1606,15 @@ GEN_PPC64_R2(rldcr, 0x1E, 0x09); |
1606 | 1606 | static always_inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) |
1607 | 1607 | { |
1608 | 1608 | uint64_t mask; |
1609 | - uint32_t sh, mb; | |
1609 | + uint32_t sh, mb, me; | |
1610 | 1610 | |
1611 | 1611 | sh = SH(ctx->opcode) | (shn << 5); |
1612 | 1612 | mb = MB(ctx->opcode) | (mbn << 5); |
1613 | + me = 63 - sh; | |
1613 | 1614 | if (likely(sh == 0)) { |
1614 | 1615 | if (likely(mb == 0)) { |
1615 | 1616 | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1616 | 1617 | goto do_store; |
1617 | - } else if (likely(mb == 63)) { | |
1618 | - gen_op_load_gpr_T0(rA(ctx->opcode)); | |
1619 | - goto do_store; | |
1620 | 1618 | } |
1621 | 1619 | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1622 | 1620 | gen_op_load_gpr_T1(rA(ctx->opcode)); |
... | ... | @@ -1626,7 +1624,7 @@ static always_inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) |
1626 | 1624 | gen_op_load_gpr_T1(rA(ctx->opcode)); |
1627 | 1625 | gen_op_rotli64_T0(sh); |
1628 | 1626 | do_mask: |
1629 | - mask = MASK(mb, 63 - sh); | |
1627 | + mask = MASK(mb, me); | |
1630 | 1628 | gen_andi_T0_64(ctx, mask); |
1631 | 1629 | gen_andi_T1_64(ctx, ~mask); |
1632 | 1630 | gen_op_or(); | ... | ... |