Commit 26ea091859c76d5e1b8a95148aa60b59dc8ee196
1 parent
f7cf7945
Support for simple YAMON output, by Alec Voropay.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2770 c046a42c-6fe2-441c-8c8c-71466251a162
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62 additions
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2 deletions
hw/mips_malta.c
| ... | ... | @@ -535,11 +535,27 @@ static void write_bootloader (CPUState *env, unsigned long bios_offset, int64_t |
| 535 | 535 | |
| 536 | 536 | /* Small bootloader */ |
| 537 | 537 | p = (uint32_t *) (phys_ram_base + bios_offset); |
| 538 | - stl_raw(p++, 0x0bf00006); /* j 0x1fc00018 */ | |
| 538 | + stl_raw(p++, 0x0bf00160); /* j 0x1fc00580 */ | |
| 539 | 539 | stl_raw(p++, 0x00000000); /* nop */ |
| 540 | 540 | |
| 541 | + /* YAMON service vector */ | |
| 542 | + stl_raw(phys_ram_base + bios_offset + 0x500, 0xbfc00580); /* start: */ | |
| 543 | + stl_raw(phys_ram_base + bios_offset + 0x504, 0xbfc0083c); /* print_count: */ | |
| 544 | + stl_raw(phys_ram_base + bios_offset + 0x520, 0xbfc00580); /* start: */ | |
| 545 | + stl_raw(phys_ram_base + bios_offset + 0x52c, 0xbfc00800); /* flush_cache: */ | |
| 546 | + stl_raw(phys_ram_base + bios_offset + 0x534, 0xbfc00808); /* print: */ | |
| 547 | + stl_raw(phys_ram_base + bios_offset + 0x538, 0xbfc00800); /* reg_cpu_isr: */ | |
| 548 | + stl_raw(phys_ram_base + bios_offset + 0x53c, 0xbfc00800); /* unred_cpu_isr: */ | |
| 549 | + stl_raw(phys_ram_base + bios_offset + 0x540, 0xbfc00800); /* reg_ic_isr: */ | |
| 550 | + stl_raw(phys_ram_base + bios_offset + 0x544, 0xbfc00800); /* unred_ic_isr: */ | |
| 551 | + stl_raw(phys_ram_base + bios_offset + 0x548, 0xbfc00800); /* reg_esr: */ | |
| 552 | + stl_raw(phys_ram_base + bios_offset + 0x54c, 0xbfc00800); /* unreg_esr: */ | |
| 553 | + stl_raw(phys_ram_base + bios_offset + 0x550, 0xbfc00800); /* getchar: */ | |
| 554 | + stl_raw(phys_ram_base + bios_offset + 0x554, 0xbfc00800); /* syscon_read: */ | |
| 555 | + | |
| 556 | + | |
| 541 | 557 | /* Second part of the bootloader */ |
| 542 | - p = (uint32_t *) (phys_ram_base + bios_offset + 0x018); | |
| 558 | + p = (uint32_t *) (phys_ram_base + bios_offset + 0x580); | |
| 543 | 559 | stl_raw(p++, 0x24040002); /* addiu a0, zero, 2 */ |
| 544 | 560 | stl_raw(p++, 0x3c1d0000 | (((ENVP_ADDR - 64) >> 16) & 0xffff)); /* lui sp, high(ENVP_ADDR) */ |
| 545 | 561 | stl_raw(p++, 0x37bd0000 | ((ENVP_ADDR - 64) & 0xffff)); /* ori sp, a0, low(ENVP_ADDR) */ |
| ... | ... | @@ -597,6 +613,50 @@ static void write_bootloader (CPUState *env, unsigned long bios_offset, int64_t |
| 597 | 613 | stl_raw(p++, 0x37ff0000 | (kernel_entry & 0xffff)); /* ori ra, ra, low(kernel_entry) */ |
| 598 | 614 | stl_raw(p++, 0x03e00008); /* jr ra */ |
| 599 | 615 | stl_raw(p++, 0x00000000); /* nop */ |
| 616 | + | |
| 617 | + /* YAMON subroutines */ | |
| 618 | + p = (uint32_t *) (phys_ram_base + bios_offset + 0x800); | |
| 619 | + stl_raw(p++, 0x03e00008); /* jr ra */ | |
| 620 | + stl_raw(p++, 0x24020000); /* li v0,0 */ | |
| 621 | + /* 808 YAMON print */ | |
| 622 | + stl_raw(p++, 0x03e06821); /* move t5,ra */ | |
| 623 | + stl_raw(p++, 0x00805821); /* move t3,a0 */ | |
| 624 | + stl_raw(p++, 0x00a05021); /* move t2,a1 */ | |
| 625 | + stl_raw(p++, 0x91440000); /* lbu a0,0(t2) */ | |
| 626 | + stl_raw(p++, 0x254a0001); /* addiu t2,t2,1 */ | |
| 627 | + stl_raw(p++, 0x10800005); /* beqz a0,834 */ | |
| 628 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 629 | + stl_raw(p++, 0x0ff0021c); /* jal 870 */ | |
| 630 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 631 | + stl_raw(p++, 0x08000205); /* j 814 */ | |
| 632 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 633 | + stl_raw(p++, 0x01a00008); /* jr t5 */ | |
| 634 | + stl_raw(p++, 0x01602021); /* move a0,t3 */ | |
| 635 | + /* 0x83c YAMON print_count */ | |
| 636 | + stl_raw(p++, 0x03e06821); /* move t5,ra */ | |
| 637 | + stl_raw(p++, 0x00805821); /* move t3,a0 */ | |
| 638 | + stl_raw(p++, 0x00a05021); /* move t2,a1 */ | |
| 639 | + stl_raw(p++, 0x00c06021); /* move t4,a2 */ | |
| 640 | + stl_raw(p++, 0x91440000); /* lbu a0,0(t2) */ | |
| 641 | + stl_raw(p++, 0x0ff0021c); /* jal 870 */ | |
| 642 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 643 | + stl_raw(p++, 0x254a0001); /* addiu t2,t2,1 */ | |
| 644 | + stl_raw(p++, 0x258cffff); /* addiu t4,t4,-1 */ | |
| 645 | + stl_raw(p++, 0x1580fffa); /* bnez t4,84c */ | |
| 646 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 647 | + stl_raw(p++, 0x01a00008); /* jr t5 */ | |
| 648 | + stl_raw(p++, 0x01602021); /* move a0,t3 */ | |
| 649 | + /* 0x870 */ | |
| 650 | + stl_raw(p++, 0x3c08b800); /* lui t0,0xb400 */ | |
| 651 | + stl_raw(p++, 0x350803f8); /* ori t0,t0,0x3f8 */ | |
| 652 | + stl_raw(p++, 0x91090005); /* lbu t1,5(t0) */ | |
| 653 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 654 | + stl_raw(p++, 0x31290040); /* andi t1,t1,0x40 */ | |
| 655 | + stl_raw(p++, 0x1120fffc); /* beqz t1,878 <outch+0x8> */ | |
| 656 | + stl_raw(p++, 0x00000000); /* nop */ | |
| 657 | + stl_raw(p++, 0x03e00008); /* jr ra */ | |
| 658 | + stl_raw(p++, 0xa1040000); /* sb a0,0(t0) */ | |
| 659 | + | |
| 600 | 660 | } |
| 601 | 661 | |
| 602 | 662 | static void prom_set(int index, const char *string, ...) | ... | ... |