Commit 26aa7d72cc3ff586ca4b5bd79f63b0066fe21b0f
1 parent
8e9c4afe
isa memory remapping support (aka PPC PREP VGA support)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@773 c046a42c-6fe2-441c-8c8c-71466251a162
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4 changed files
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38 additions
and
24 deletions
hw/ppc_prep.c
| @@ -896,7 +896,7 @@ void PPC_end_init (void) | @@ -896,7 +896,7 @@ void PPC_end_init (void) | ||
| 896 | VGA_init(); | 896 | VGA_init(); |
| 897 | } | 897 | } |
| 898 | 898 | ||
| 899 | -/* PC hardware initialisation */ | 899 | +/* PowerPC PREP hardware initialisation */ |
| 900 | void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, | 900 | void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, |
| 901 | DisplayState *ds, const char **fd_filename, int snapshot, | 901 | DisplayState *ds, const char **fd_filename, int snapshot, |
| 902 | const char *kernel_filename, const char *kernel_cmdline, | 902 | const char *kernel_filename, const char *kernel_cmdline, |
| @@ -911,6 +911,8 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, | @@ -911,6 +911,8 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, | ||
| 911 | /* allocate RAM */ | 911 | /* allocate RAM */ |
| 912 | cpu_register_physical_memory(0, ram_size, 0); | 912 | cpu_register_physical_memory(0, ram_size, 0); |
| 913 | 913 | ||
| 914 | + isa_mem_base = 0xc0000000; | ||
| 915 | + | ||
| 914 | if (linux_boot) { | 916 | if (linux_boot) { |
| 915 | /* now we can load the kernel */ | 917 | /* now we can load the kernel */ |
| 916 | ret = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); | 918 | ret = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); |
hw/vga.c
| @@ -549,7 +549,7 @@ static void vbe_ioport_write(void *opaque, uint32_t addr, uint32_t val) | @@ -549,7 +549,7 @@ static void vbe_ioport_write(void *opaque, uint32_t addr, uint32_t val) | ||
| 549 | case VBE_DISPI_INDEX_BANK: | 549 | case VBE_DISPI_INDEX_BANK: |
| 550 | val &= s->vbe_bank_mask; | 550 | val &= s->vbe_bank_mask; |
| 551 | s->vbe_regs[s->vbe_index] = val; | 551 | s->vbe_regs[s->vbe_index] = val; |
| 552 | - s->bank_offset = (val << 16) - 0xa0000; | 552 | + s->bank_offset = (val << 16); |
| 553 | break; | 553 | break; |
| 554 | case VBE_DISPI_INDEX_ENABLE: | 554 | case VBE_DISPI_INDEX_ENABLE: |
| 555 | if (val & VBE_DISPI_ENABLED) { | 555 | if (val & VBE_DISPI_ENABLED) { |
| @@ -603,7 +603,7 @@ static void vbe_ioport_write(void *opaque, uint32_t addr, uint32_t val) | @@ -603,7 +603,7 @@ static void vbe_ioport_write(void *opaque, uint32_t addr, uint32_t val) | ||
| 603 | s->vbe_regs[s->vbe_index] = val; | 603 | s->vbe_regs[s->vbe_index] = val; |
| 604 | } else { | 604 | } else { |
| 605 | /* XXX: the bios should do that */ | 605 | /* XXX: the bios should do that */ |
| 606 | - s->bank_offset = -0xa0000; | 606 | + s->bank_offset = 0; |
| 607 | } | 607 | } |
| 608 | break; | 608 | break; |
| 609 | case VBE_DISPI_INDEX_VIRT_WIDTH: | 609 | case VBE_DISPI_INDEX_VIRT_WIDTH: |
| @@ -656,23 +656,23 @@ static uint32_t vga_mem_readb(target_phys_addr_t addr) | @@ -656,23 +656,23 @@ static uint32_t vga_mem_readb(target_phys_addr_t addr) | ||
| 656 | 656 | ||
| 657 | /* convert to VGA memory offset */ | 657 | /* convert to VGA memory offset */ |
| 658 | memory_map_mode = (s->gr[6] >> 2) & 3; | 658 | memory_map_mode = (s->gr[6] >> 2) & 3; |
| 659 | + addr &= 0x1ffff; | ||
| 659 | switch(memory_map_mode) { | 660 | switch(memory_map_mode) { |
| 660 | case 0: | 661 | case 0: |
| 661 | - addr -= 0xa0000; | ||
| 662 | break; | 662 | break; |
| 663 | case 1: | 663 | case 1: |
| 664 | - if (addr >= 0xb0000) | 664 | + if (addr >= 0x10000) |
| 665 | return 0xff; | 665 | return 0xff; |
| 666 | addr += s->bank_offset; | 666 | addr += s->bank_offset; |
| 667 | break; | 667 | break; |
| 668 | case 2: | 668 | case 2: |
| 669 | - addr -= 0xb0000; | 669 | + addr -= 0x10000; |
| 670 | if (addr >= 0x8000) | 670 | if (addr >= 0x8000) |
| 671 | return 0xff; | 671 | return 0xff; |
| 672 | break; | 672 | break; |
| 673 | default: | 673 | default: |
| 674 | case 3: | 674 | case 3: |
| 675 | - addr -= 0xb8000; | 675 | + addr -= 0x18000; |
| 676 | if (addr >= 0x8000) | 676 | if (addr >= 0x8000) |
| 677 | return 0xff; | 677 | return 0xff; |
| 678 | break; | 678 | break; |
| @@ -734,23 +734,23 @@ static void vga_mem_writeb(target_phys_addr_t addr, uint32_t val) | @@ -734,23 +734,23 @@ static void vga_mem_writeb(target_phys_addr_t addr, uint32_t val) | ||
| 734 | #endif | 734 | #endif |
| 735 | /* convert to VGA memory offset */ | 735 | /* convert to VGA memory offset */ |
| 736 | memory_map_mode = (s->gr[6] >> 2) & 3; | 736 | memory_map_mode = (s->gr[6] >> 2) & 3; |
| 737 | + addr &= 0x1ffff; | ||
| 737 | switch(memory_map_mode) { | 738 | switch(memory_map_mode) { |
| 738 | case 0: | 739 | case 0: |
| 739 | - addr -= 0xa0000; | ||
| 740 | break; | 740 | break; |
| 741 | case 1: | 741 | case 1: |
| 742 | - if (addr >= 0xb0000) | 742 | + if (addr >= 0x10000) |
| 743 | return; | 743 | return; |
| 744 | addr += s->bank_offset; | 744 | addr += s->bank_offset; |
| 745 | break; | 745 | break; |
| 746 | case 2: | 746 | case 2: |
| 747 | - addr -= 0xb0000; | 747 | + addr -= 0x10000; |
| 748 | if (addr >= 0x8000) | 748 | if (addr >= 0x8000) |
| 749 | return; | 749 | return; |
| 750 | break; | 750 | break; |
| 751 | default: | 751 | default: |
| 752 | case 3: | 752 | case 3: |
| 753 | - addr -= 0xb8000; | 753 | + addr -= 0x18000; |
| 754 | if (addr >= 0x8000) | 754 | if (addr >= 0x8000) |
| 755 | return; | 755 | return; |
| 756 | break; | 756 | break; |
| @@ -1758,7 +1758,7 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, | @@ -1758,7 +1758,7 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, | ||
| 1758 | register_ioport_read(0x3d4, 2, 1, vga_ioport_read, s); | 1758 | register_ioport_read(0x3d4, 2, 1, vga_ioport_read, s); |
| 1759 | register_ioport_read(0x3ba, 1, 1, vga_ioport_read, s); | 1759 | register_ioport_read(0x3ba, 1, 1, vga_ioport_read, s); |
| 1760 | register_ioport_read(0x3da, 1, 1, vga_ioport_read, s); | 1760 | register_ioport_read(0x3da, 1, 1, vga_ioport_read, s); |
| 1761 | - s->bank_offset = -0xa0000; | 1761 | + s->bank_offset = 0; |
| 1762 | 1762 | ||
| 1763 | #ifdef CONFIG_BOCHS_VBE | 1763 | #ifdef CONFIG_BOCHS_VBE |
| 1764 | s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID0; | 1764 | s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID0; |
| @@ -1771,15 +1771,14 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, | @@ -1771,15 +1771,14 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, | ||
| 1771 | #endif | 1771 | #endif |
| 1772 | 1772 | ||
| 1773 | vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write); | 1773 | vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write); |
| 1774 | -#if defined (TARGET_I386) | ||
| 1775 | - cpu_register_physical_memory(0x000a0000, 0x20000, vga_io_memory); | 1774 | + cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000, |
| 1775 | + vga_io_memory); | ||
| 1776 | #ifdef CONFIG_BOCHS_VBE | 1776 | #ifdef CONFIG_BOCHS_VBE |
| 1777 | +#if defined (TARGET_I386) | ||
| 1777 | /* XXX: use optimized standard vga accesses */ | 1778 | /* XXX: use optimized standard vga accesses */ |
| 1778 | cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, | 1779 | cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, |
| 1779 | vga_ram_size, vga_ram_offset); | 1780 | vga_ram_size, vga_ram_offset); |
| 1780 | #endif | 1781 | #endif |
| 1781 | -#elif defined (TARGET_PPC) | ||
| 1782 | - cpu_register_physical_memory(0xf00a0000, 0x20000, vga_io_memory); | ||
| 1783 | #endif | 1782 | #endif |
| 1784 | return 0; | 1783 | return 0; |
| 1785 | } | 1784 | } |
vl.c
| @@ -114,7 +114,9 @@ int vm_running; | @@ -114,7 +114,9 @@ int vm_running; | ||
| 114 | int audio_enabled = 0; | 114 | int audio_enabled = 0; |
| 115 | 115 | ||
| 116 | /***********************************************************/ | 116 | /***********************************************************/ |
| 117 | -/* x86 io ports */ | 117 | +/* x86 ISA bus support */ |
| 118 | + | ||
| 119 | +target_phys_addr_t isa_mem_base = 0; | ||
| 118 | 120 | ||
| 119 | uint32_t default_ioport_readb(void *opaque, uint32_t address) | 121 | uint32_t default_ioport_readb(void *opaque, uint32_t address) |
| 120 | { | 122 | { |
vl.h
| @@ -144,13 +144,6 @@ static inline uint16_t cpu_to_le16(uint16_t v) | @@ -144,13 +144,6 @@ static inline uint16_t cpu_to_le16(uint16_t v) | ||
| 144 | /* vl.c */ | 144 | /* vl.c */ |
| 145 | extern int reset_requested; | 145 | extern int reset_requested; |
| 146 | 146 | ||
| 147 | -typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | ||
| 148 | -typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | ||
| 149 | - | ||
| 150 | -int register_ioport_read(int start, int length, int size, | ||
| 151 | - IOPortReadFunc *func, void *opaque); | ||
| 152 | -int register_ioport_write(int start, int length, int size, | ||
| 153 | - IOPortWriteFunc *func, void *opaque); | ||
| 154 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); | 147 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
| 155 | 148 | ||
| 156 | void hw_error(const char *fmt, ...); | 149 | void hw_error(const char *fmt, ...); |
| @@ -348,6 +341,18 @@ void bdrv_set_change_cb(BlockDriverState *bs, | @@ -348,6 +341,18 @@ void bdrv_set_change_cb(BlockDriverState *bs, | ||
| 348 | void bdrv_info(void); | 341 | void bdrv_info(void); |
| 349 | BlockDriverState *bdrv_find(const char *name); | 342 | BlockDriverState *bdrv_find(const char *name); |
| 350 | 343 | ||
| 344 | +/* ISA bus */ | ||
| 345 | + | ||
| 346 | +extern target_phys_addr_t isa_mem_base; | ||
| 347 | + | ||
| 348 | +typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | ||
| 349 | +typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | ||
| 350 | + | ||
| 351 | +int register_ioport_read(int start, int length, int size, | ||
| 352 | + IOPortReadFunc *func, void *opaque); | ||
| 353 | +int register_ioport_write(int start, int length, int size, | ||
| 354 | + IOPortWriteFunc *func, void *opaque); | ||
| 355 | + | ||
| 351 | /* vga.c */ | 356 | /* vga.c */ |
| 352 | 357 | ||
| 353 | #define VGA_RAM_SIZE (4096 * 1024) | 358 | #define VGA_RAM_SIZE (4096 * 1024) |
| @@ -503,6 +508,12 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device, | @@ -503,6 +508,12 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device, | ||
| 503 | const char *kernel_filename, const char *kernel_cmdline, | 508 | const char *kernel_filename, const char *kernel_cmdline, |
| 504 | const char *initrd_filename); | 509 | const char *initrd_filename); |
| 505 | 510 | ||
| 511 | +/* ppc.c */ | ||
| 512 | +void ppc_init (int ram_size, int vga_ram_size, int boot_device, | ||
| 513 | + DisplayState *ds, const char **fd_filename, int snapshot, | ||
| 514 | + const char *kernel_filename, const char *kernel_cmdline, | ||
| 515 | + const char *initrd_filename); | ||
| 516 | + | ||
| 506 | /* monitor.c */ | 517 | /* monitor.c */ |
| 507 | void monitor_init(void); | 518 | void monitor_init(void); |
| 508 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); | 519 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |