Commit 22548760ca36e3c9c716bf725194a846d1073855

Authored by blueswir1
1 parent 9800ee26

Fix compiler warnings

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
hw/esp.c
@@ -41,7 +41,7 @@ @@ -41,7 +41,7 @@
41 #define DPRINTF(fmt, args...) \ 41 #define DPRINTF(fmt, args...) \
42 do { printf("ESP: " fmt , ##args); } while (0) 42 do { printf("ESP: " fmt , ##args); } while (0)
43 #else 43 #else
44 -#define DPRINTF(fmt, args...) 44 +#define DPRINTF(fmt, args...) do {} while (0)
45 #endif 45 #endif
46 46
47 #define ESP_REGS 16 47 #define ESP_REGS 16
@@ -57,13 +57,13 @@ struct ESPState { @@ -57,13 +57,13 @@ struct ESPState {
57 int32_t ti_size; 57 int32_t ti_size;
58 uint32_t ti_rptr, ti_wptr; 58 uint32_t ti_rptr, ti_wptr;
59 uint8_t ti_buf[TI_BUFSZ]; 59 uint8_t ti_buf[TI_BUFSZ];
60 - int sense;  
61 - int dma; 60 + uint32_t sense;
  61 + uint32_t dma;
62 SCSIDevice *scsi_dev[ESP_MAX_DEVS]; 62 SCSIDevice *scsi_dev[ESP_MAX_DEVS];
63 SCSIDevice *current_dev; 63 SCSIDevice *current_dev;
64 uint8_t cmdbuf[TI_BUFSZ]; 64 uint8_t cmdbuf[TI_BUFSZ];
65 - int cmdlen;  
66 - int do_cmd; 65 + uint32_t cmdlen;
  66 + uint32_t do_cmd;
67 67
68 /* The amount of data left in the current DMA transfer. */ 68 /* The amount of data left in the current DMA transfer. */
69 uint32_t dma_left; 69 uint32_t dma_left;
@@ -159,7 +159,7 @@ static void esp_lower_irq(ESPState *s) @@ -159,7 +159,7 @@ static void esp_lower_irq(ESPState *s)
159 } 159 }
160 } 160 }
161 161
162 -static int get_cmd(ESPState *s, uint8_t *buf) 162 +static uint32_t get_cmd(ESPState *s, uint8_t *buf)
163 { 163 {
164 uint32_t dmalen; 164 uint32_t dmalen;
165 int target; 165 int target;
hw/iommu.c
@@ -252,8 +252,7 @@ static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr) @@ -252,8 +252,7 @@ static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr)
252 return ret; 252 return ret;
253 } 253 }
254 254
255 -static target_phys_addr_t iommu_translate_pa(IOMMUState *s,  
256 - target_phys_addr_t addr, 255 +static target_phys_addr_t iommu_translate_pa(target_phys_addr_t addr,
257 uint32_t pte) 256 uint32_t pte)
258 { 257 {
259 uint32_t tmppte; 258 uint32_t tmppte;
@@ -296,7 +295,7 @@ void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, @@ -296,7 +295,7 @@ void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
296 iommu_bad_addr(opaque, page, is_write); 295 iommu_bad_addr(opaque, page, is_write);
297 return; 296 return;
298 } 297 }
299 - phys_addr = iommu_translate_pa(opaque, addr, flags); 298 + phys_addr = iommu_translate_pa(addr, flags);
300 if (is_write) { 299 if (is_write) {
301 if (!(flags & IOPTE_WRITE)) { 300 if (!(flags & IOPTE_WRITE)) {
302 iommu_bad_addr(opaque, page, is_write); 301 iommu_bad_addr(opaque, page, is_write);
hw/slavio_misc.c
@@ -381,10 +381,9 @@ static CPUWriteMemoryFunc *slavio_led_mem_write[3] = { @@ -381,10 +381,9 @@ static CPUWriteMemoryFunc *slavio_led_mem_write[3] = {
381 static void slavio_misc_save(QEMUFile *f, void *opaque) 381 static void slavio_misc_save(QEMUFile *f, void *opaque)
382 { 382 {
383 MiscState *s = opaque; 383 MiscState *s = opaque;
384 - int tmp; 384 + uint32_t tmp = 0;
385 uint8_t tmp8; 385 uint8_t tmp8;
386 386
387 - tmp = 0;  
388 qemu_put_be32s(f, &tmp); /* ignored, was IRQ. */ 387 qemu_put_be32s(f, &tmp); /* ignored, was IRQ. */
389 qemu_put_8s(f, &s->config); 388 qemu_put_8s(f, &s->config);
390 qemu_put_8s(f, &s->aux1); 389 qemu_put_8s(f, &s->aux1);
@@ -398,7 +397,7 @@ static void slavio_misc_save(QEMUFile *f, void *opaque) @@ -398,7 +397,7 @@ static void slavio_misc_save(QEMUFile *f, void *opaque)
398 static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id) 397 static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
399 { 398 {
400 MiscState *s = opaque; 399 MiscState *s = opaque;
401 - int tmp; 400 + uint32_t tmp;
402 uint8_t tmp8; 401 uint8_t tmp8;
403 402
404 if (version_id != 1) 403 if (version_id != 1)
hw/slavio_serial.c
@@ -92,8 +92,8 @@ typedef struct { @@ -92,8 +92,8 @@ typedef struct {
92 #define SERIAL_REGS 16 92 #define SERIAL_REGS 16
93 typedef struct ChannelState { 93 typedef struct ChannelState {
94 qemu_irq irq; 94 qemu_irq irq;
95 - int reg;  
96 - int rxint, txint, rxint_under_svc, txint_under_svc; 95 + uint32_t reg;
  96 + uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
97 chn_id_t chn; // this channel, A (base+4) or B (base+0) 97 chn_id_t chn; // this channel, A (base+4) or B (base+0)
98 chn_type_t type; 98 chn_type_t type;
99 struct ChannelState *otherchn; 99 struct ChannelState *otherchn;
@@ -656,8 +656,8 @@ static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = { @@ -656,8 +656,8 @@ static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = {
656 656
657 static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s) 657 static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s)
658 { 658 {
659 - int tmp;  
660 - tmp = 0; 659 + uint32_t tmp = 0;
  660 +
661 qemu_put_be32s(f, &tmp); /* unused, was IRQ. */ 661 qemu_put_be32s(f, &tmp); /* unused, was IRQ. */
662 qemu_put_be32s(f, &s->reg); 662 qemu_put_be32s(f, &s->reg);
663 qemu_put_be32s(f, &s->rxint); 663 qemu_put_be32s(f, &s->rxint);
@@ -680,7 +680,7 @@ static void slavio_serial_save(QEMUFile *f, void *opaque) @@ -680,7 +680,7 @@ static void slavio_serial_save(QEMUFile *f, void *opaque)
680 680
681 static int slavio_serial_load_chn(QEMUFile *f, ChannelState *s, int version_id) 681 static int slavio_serial_load_chn(QEMUFile *f, ChannelState *s, int version_id)
682 { 682 {
683 - int tmp; 683 + uint32_t tmp;
684 684
685 if (version_id > 2) 685 if (version_id > 2)
686 return -EINVAL; 686 return -EINVAL;
hw/slavio_timer.c
@@ -31,7 +31,7 @@ @@ -31,7 +31,7 @@
31 #define DPRINTF(fmt, args...) \ 31 #define DPRINTF(fmt, args...) \
32 do { printf("TIMER: " fmt , ##args); } while (0) 32 do { printf("TIMER: " fmt , ##args); } while (0)
33 #else 33 #else
34 -#define DPRINTF(fmt, args...) 34 +#define DPRINTF(fmt, args...) do {} while (0)
35 #endif 35 #endif
36 36
37 /* 37 /*
@@ -57,11 +57,11 @@ typedef struct SLAVIO_TIMERState { @@ -57,11 +57,11 @@ typedef struct SLAVIO_TIMERState {
57 uint32_t count, counthigh, reached; 57 uint32_t count, counthigh, reached;
58 uint64_t limit; 58 uint64_t limit;
59 // processor only 59 // processor only
60 - int running; 60 + uint32_t running;
61 struct SLAVIO_TIMERState *master; 61 struct SLAVIO_TIMERState *master;
62 - int slave_index; 62 + uint32_t slave_index;
63 // system only 63 // system only
64 - unsigned int num_slaves; 64 + uint32_t num_slaves;
65 struct SLAVIO_TIMERState *slave[MAX_CPUS]; 65 struct SLAVIO_TIMERState *slave[MAX_CPUS];
66 uint32_t slave_mode; 66 uint32_t slave_mode;
67 } SLAVIO_TIMERState; 67 } SLAVIO_TIMERState;
@@ -363,7 +363,7 @@ static void slavio_timer_reset(void *opaque) @@ -363,7 +363,7 @@ static void slavio_timer_reset(void *opaque)
363 static SLAVIO_TIMERState *slavio_timer_init(target_phys_addr_t addr, 363 static SLAVIO_TIMERState *slavio_timer_init(target_phys_addr_t addr,
364 qemu_irq irq, 364 qemu_irq irq,
365 SLAVIO_TIMERState *master, 365 SLAVIO_TIMERState *master,
366 - int slave_index) 366 + uint32_t slave_index)
367 { 367 {
368 int slavio_timer_io_memory; 368 int slavio_timer_io_memory;
369 SLAVIO_TIMERState *s; 369 SLAVIO_TIMERState *s;
hw/sun4m.c
@@ -32,6 +32,8 @@ @@ -32,6 +32,8 @@
32 #include "boards.h" 32 #include "boards.h"
33 #include "firmware_abi.h" 33 #include "firmware_abi.h"
34 #include "scsi.h" 34 #include "scsi.h"
  35 +#include "pc.h"
  36 +#include "isa.h"
35 37
36 //#define DEBUG_IRQ 38 //#define DEBUG_IRQ
37 39
@@ -123,13 +125,6 @@ struct sun4d_hwdef { @@ -123,13 +125,6 @@ struct sun4d_hwdef {
123 const char * const default_cpu_model; 125 const char * const default_cpu_model;
124 }; 126 };
125 127
126 -/* TSC handling */  
127 -  
128 -uint64_t cpu_get_tsc()  
129 -{  
130 - return qemu_get_clock(vm_clock);  
131 -}  
132 -  
133 int DMA_get_channel_mode (int nchan) 128 int DMA_get_channel_mode (int nchan)
134 { 129 {
135 return 0; 130 return 0;
@@ -238,13 +233,13 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline, @@ -238,13 +233,13 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
238 233
239 static void *slavio_intctl; 234 static void *slavio_intctl;
240 235
241 -void pic_info() 236 +void pic_info(void)
242 { 237 {
243 if (slavio_intctl) 238 if (slavio_intctl)
244 slavio_pic_info(slavio_intctl); 239 slavio_pic_info(slavio_intctl);
245 } 240 }
246 241
247 -void irq_info() 242 +void irq_info(void)
248 { 243 {
249 if (slavio_intctl) 244 if (slavio_intctl)
250 slavio_irq_info(slavio_intctl); 245 slavio_irq_info(slavio_intctl);
@@ -319,7 +314,6 @@ static void secondary_cpu_reset(void *opaque) @@ -319,7 +314,6 @@ static void secondary_cpu_reset(void *opaque)
319 } 314 }
320 315
321 static unsigned long sun4m_load_kernel(const char *kernel_filename, 316 static unsigned long sun4m_load_kernel(const char *kernel_filename,
322 - const char *kernel_cmdline,  
323 const char *initrd_filename) 317 const char *initrd_filename)
324 { 318 {
325 int linux_boot; 319 int linux_boot;
@@ -384,7 +378,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, @@ -384,7 +378,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
384 int ret; 378 int ret;
385 char buf[1024]; 379 char buf[1024];
386 BlockDriverState *fd[MAX_FD]; 380 BlockDriverState *fd[MAX_FD];
387 - int index; 381 + int drive_index;
388 382
389 /* init CPUs */ 383 /* init CPUs */
390 if (!cpu_model) 384 if (!cpu_model)
@@ -506,9 +500,9 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, @@ -506,9 +500,9 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
506 if (hwdef->fd_base != (target_phys_addr_t)-1) { 500 if (hwdef->fd_base != (target_phys_addr_t)-1) {
507 /* there is zero or one floppy drive */ 501 /* there is zero or one floppy drive */
508 memset(fd, 0, sizeof(fd)); 502 memset(fd, 0, sizeof(fd));
509 - index = drive_get_index(IF_FLOPPY, 0, 0);  
510 - if (index != -1)  
511 - fd[0] = drives_table[index].bdrv; 503 + drive_index = drive_get_index(IF_FLOPPY, 0, 0);
  504 + if (drive_index != -1)
  505 + fd[0] = drives_table[drive_index].bdrv;
512 506
513 sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, 507 sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
514 fdc_tc); 508 fdc_tc);
@@ -524,17 +518,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, @@ -524,17 +518,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
524 espdma, *espdma_irq, esp_reset); 518 espdma, *espdma_irq, esp_reset);
525 519
526 for (i = 0; i < ESP_MAX_DEVS; i++) { 520 for (i = 0; i < ESP_MAX_DEVS; i++) {
527 - index = drive_get_index(IF_SCSI, 0, i);  
528 - if (index == -1) 521 + drive_index = drive_get_index(IF_SCSI, 0, i);
  522 + if (drive_index == -1)
529 continue; 523 continue;
530 - esp_scsi_attach(main_esp, drives_table[index].bdrv, i); 524 + esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
531 } 525 }
532 526
533 if (hwdef->cs_base != (target_phys_addr_t)-1) 527 if (hwdef->cs_base != (target_phys_addr_t)-1)
534 cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); 528 cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
535 529
536 - kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline,  
537 - initrd_filename); 530 + kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename);
538 531
539 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline, 532 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
540 boot_device, RAM_size, kernel_size, graphic_width, 533 boot_device, RAM_size, kernel_size, graphic_width,
@@ -561,7 +554,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, @@ -561,7 +554,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
561 int ret; 554 int ret;
562 char buf[1024]; 555 char buf[1024];
563 BlockDriverState *fd[MAX_FD]; 556 BlockDriverState *fd[MAX_FD];
564 - int index; 557 + int drive_index;
565 558
566 /* init CPU */ 559 /* init CPU */
567 if (!cpu_model) 560 if (!cpu_model)
@@ -658,9 +651,9 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, @@ -658,9 +651,9 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
658 if (hwdef->fd_base != (target_phys_addr_t)-1) { 651 if (hwdef->fd_base != (target_phys_addr_t)-1) {
659 /* there is zero or one floppy drive */ 652 /* there is zero or one floppy drive */
660 fd[1] = fd[0] = NULL; 653 fd[1] = fd[0] = NULL;
661 - index = drive_get_index(IF_FLOPPY, 0, 0);  
662 - if (index != -1)  
663 - fd[0] = drives_table[index].bdrv; 654 + drive_index = drive_get_index(IF_FLOPPY, 0, 0);
  655 + if (drive_index != -1)
  656 + fd[0] = drives_table[drive_index].bdrv;
664 657
665 sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, 658 sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
666 fdc_tc); 659 fdc_tc);
@@ -676,14 +669,13 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, @@ -676,14 +669,13 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
676 espdma, *espdma_irq, esp_reset); 669 espdma, *espdma_irq, esp_reset);
677 670
678 for (i = 0; i < ESP_MAX_DEVS; i++) { 671 for (i = 0; i < ESP_MAX_DEVS; i++) {
679 - index = drive_get_index(IF_SCSI, 0, i);  
680 - if (index == -1) 672 + drive_index = drive_get_index(IF_SCSI, 0, i);
  673 + if (drive_index == -1)
681 continue; 674 continue;
682 - esp_scsi_attach(main_esp, drives_table[index].bdrv, i); 675 + esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
683 } 676 }
684 677
685 - kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline,  
686 - initrd_filename); 678 + kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename);
687 679
688 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline, 680 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
689 boot_device, RAM_size, kernel_size, graphic_width, 681 boot_device, RAM_size, kernel_size, graphic_width,
@@ -1366,7 +1358,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size, @@ -1366,7 +1358,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1366 unsigned long prom_offset, kernel_size; 1358 unsigned long prom_offset, kernel_size;
1367 int ret; 1359 int ret;
1368 char buf[1024]; 1360 char buf[1024];
1369 - int index; 1361 + int drive_index;
1370 1362
1371 /* init CPUs */ 1363 /* init CPUs */
1372 if (!cpu_model) 1364 if (!cpu_model)
@@ -1478,14 +1470,13 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size, @@ -1478,14 +1470,13 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1478 espdma, *espdma_irq, esp_reset); 1470 espdma, *espdma_irq, esp_reset);
1479 1471
1480 for (i = 0; i < ESP_MAX_DEVS; i++) { 1472 for (i = 0; i < ESP_MAX_DEVS; i++) {
1481 - index = drive_get_index(IF_SCSI, 0, i);  
1482 - if (index == -1) 1473 + drive_index = drive_get_index(IF_SCSI, 0, i);
  1474 + if (drive_index == -1)
1483 continue; 1475 continue;
1484 - esp_scsi_attach(main_esp, drives_table[index].bdrv, i); 1476 + esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
1485 } 1477 }
1486 1478
1487 - kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline,  
1488 - initrd_filename); 1479 + kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename);
1489 1480
1490 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline, 1481 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
1491 boot_device, RAM_size, kernel_size, graphic_width, 1482 boot_device, RAM_size, kernel_size, graphic_width,
hw/sun4m.h
@@ -41,6 +41,8 @@ void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq, @@ -41,6 +41,8 @@ void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,
41 /* sun4c_intctl.c */ 41 /* sun4c_intctl.c */
42 void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq, 42 void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq,
43 qemu_irq *parent_irq); 43 qemu_irq *parent_irq);
  44 +void sun4c_pic_info(void *opaque);
  45 +void sun4c_irq_info(void *opaque);
44 46
45 /* slavio_timer.c */ 47 /* slavio_timer.c */
46 void slavio_timer_init_all(target_phys_addr_t base, qemu_irq master_irq, 48 void slavio_timer_init_all(target_phys_addr_t base, qemu_irq master_irq,
hw/sun4u.c
@@ -45,13 +45,6 @@ @@ -45,13 +45,6 @@
45 #define NVRAM_SIZE 0x2000 45 #define NVRAM_SIZE 0x2000
46 #define MAX_IDE_BUS 2 46 #define MAX_IDE_BUS 2
47 47
48 -/* TSC handling */  
49 -  
50 -uint64_t cpu_get_tsc()  
51 -{  
52 - return qemu_get_clock(vm_clock);  
53 -}  
54 -  
55 int DMA_get_channel_mode (int nchan) 48 int DMA_get_channel_mode (int nchan)
56 { 49 {
57 return 0; 50 return 0;
@@ -164,11 +157,11 @@ static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, @@ -164,11 +157,11 @@ static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
164 return 0; 157 return 0;
165 } 158 }
166 159
167 -void pic_info() 160 +void pic_info(void)
168 { 161 {
169 } 162 }
170 163
171 -void irq_info() 164 +void irq_info(void)
172 { 165 {
173 } 166 }
174 167
@@ -189,21 +182,21 @@ static void main_cpu_reset(void *opaque) @@ -189,21 +182,21 @@ static void main_cpu_reset(void *opaque)
189 ptimer_run(env->hstick, 0); 182 ptimer_run(env->hstick, 0);
190 } 183 }
191 184
192 -void tick_irq(void *opaque) 185 +static void tick_irq(void *opaque)
193 { 186 {
194 CPUState *env = opaque; 187 CPUState *env = opaque;
195 188
196 cpu_interrupt(env, CPU_INTERRUPT_TIMER); 189 cpu_interrupt(env, CPU_INTERRUPT_TIMER);
197 } 190 }
198 191
199 -void stick_irq(void *opaque) 192 +static void stick_irq(void *opaque)
200 { 193 {
201 CPUState *env = opaque; 194 CPUState *env = opaque;
202 195
203 cpu_interrupt(env, CPU_INTERRUPT_TIMER); 196 cpu_interrupt(env, CPU_INTERRUPT_TIMER);
204 } 197 }
205 198
206 -void hstick_irq(void *opaque) 199 +static void hstick_irq(void *opaque)
207 { 200 {
208 CPUState *env = opaque; 201 CPUState *env = opaque;
209 202
@@ -227,7 +220,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; @@ -227,7 +220,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
227 static fdctrl_t *floppy_controller; 220 static fdctrl_t *floppy_controller;
228 221
229 /* Sun4u hardware initialisation */ 222 /* Sun4u hardware initialisation */
230 -static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, 223 +static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
231 const char *boot_devices, DisplayState *ds, 224 const char *boot_devices, DisplayState *ds,
232 const char *kernel_filename, const char *kernel_cmdline, 225 const char *kernel_filename, const char *kernel_cmdline,
233 const char *initrd_filename, const char *cpu_model) 226 const char *initrd_filename, const char *cpu_model)
@@ -241,7 +234,7 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, @@ -241,7 +234,7 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
241 PCIBus *pci_bus; 234 PCIBus *pci_bus;
242 QEMUBH *bh; 235 QEMUBH *bh;
243 qemu_irq *irq; 236 qemu_irq *irq;
244 - int index; 237 + int drive_index;
245 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 238 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
246 BlockDriverState *fd[MAX_FD]; 239 BlockDriverState *fd[MAX_FD];
247 240
@@ -271,9 +264,9 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, @@ -271,9 +264,9 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
271 main_cpu_reset(env); 264 main_cpu_reset(env);
272 265
273 /* allocate RAM */ 266 /* allocate RAM */
274 - cpu_register_physical_memory(0, ram_size, 0); 267 + cpu_register_physical_memory(0, RAM_size, 0);
275 268
276 - prom_offset = ram_size + vga_ram_size; 269 + prom_offset = RAM_size + vga_ram_size;
277 cpu_register_physical_memory(PROM_ADDR, 270 cpu_register_physical_memory(PROM_ADDR,
278 (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK, 271 (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK,
279 prom_offset | IO_MEM_ROM); 272 prom_offset | IO_MEM_ROM);
@@ -325,7 +318,7 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, @@ -325,7 +318,7 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
325 } 318 }
326 pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL); 319 pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
327 isa_mem_base = VGA_BASE; 320 isa_mem_base = VGA_BASE;
328 - pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + ram_size, ram_size, vga_ram_size); 321 + pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size, vga_ram_size);
329 322
330 for(i = 0; i < MAX_SERIAL_PORTS; i++) { 323 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
331 if (serial_hds[i]) { 324 if (serial_hds[i]) {
@@ -352,9 +345,10 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, @@ -352,9 +345,10 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
352 exit(1); 345 exit(1);
353 } 346 }
354 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { 347 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
355 - index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);  
356 - if (index != -1)  
357 - hd[i] = drives_table[index].bdrv; 348 + drive_index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS,
  349 + i % MAX_IDE_DEVS);
  350 + if (drive_index != -1)
  351 + hd[i] = drives_table[drive_index].bdrv;
358 else 352 else
359 hd[i] = NULL; 353 hd[i] = NULL;
360 } 354 }
@@ -364,15 +358,15 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, @@ -364,15 +358,15 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
364 /* FIXME: wire up interrupts. */ 358 /* FIXME: wire up interrupts. */
365 i8042_init(NULL/*1*/, NULL/*12*/, 0x60); 359 i8042_init(NULL/*1*/, NULL/*12*/, 0x60);
366 for(i = 0; i < MAX_FD; i++) { 360 for(i = 0; i < MAX_FD; i++) {
367 - index = drive_get_index(IF_FLOPPY, 0, i);  
368 - if (index != -1)  
369 - fd[i] = drives_table[index].bdrv; 361 + drive_index = drive_get_index(IF_FLOPPY, 0, i);
  362 + if (drive_index != -1)
  363 + fd[i] = drives_table[drive_index].bdrv;
370 else 364 else
371 fd[i] = NULL; 365 fd[i] = NULL;
372 } 366 }
373 floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd); 367 floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd);
374 nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59); 368 nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59);
375 - sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_devices, 369 + sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", RAM_size, boot_devices,
376 KERNEL_LOAD_ADDR, kernel_size, 370 KERNEL_LOAD_ADDR, kernel_size,
377 kernel_cmdline, 371 kernel_cmdline,
378 INITRD_LOAD_ADDR, initrd_size, 372 INITRD_LOAD_ADDR, initrd_size,
hw/tcx.c
@@ -144,7 +144,7 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d, @@ -144,7 +144,7 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
144 } 144 }
145 } 145 }
146 146
147 -static inline int check_dirty(TCXState *ts, ram_addr_t page, ram_addr_t page24, 147 +static inline int check_dirty(ram_addr_t page, ram_addr_t page24,
148 ram_addr_t cpage) 148 ram_addr_t cpage)
149 { 149 {
150 int ret; 150 int ret;
@@ -279,7 +279,7 @@ static void tcx24_update_display(void *opaque) @@ -279,7 +279,7 @@ static void tcx24_update_display(void *opaque)
279 279
280 for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE, 280 for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE,
281 page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) { 281 page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) {
282 - if (check_dirty(ts, page, page24, cpage)) { 282 + if (check_dirty(page, page24, cpage)) {
283 if (y_start < 0) 283 if (y_start < 0)
284 y_start = y; 284 y_start = y;
285 if (page < page_min) 285 if (page < page_min)
target-sparc/cpu.h
@@ -376,30 +376,30 @@ void cpu_check_irqs(CPUSPARCState *env); @@ -376,30 +376,30 @@ void cpu_check_irqs(CPUSPARCState *env);
376 #define MMU_KERNEL_IDX 1 376 #define MMU_KERNEL_IDX 1
377 #define MMU_HYPV_IDX 2 377 #define MMU_HYPV_IDX 2
378 378
379 -static inline int cpu_mmu_index (CPUState *env) 379 +static inline int cpu_mmu_index(CPUState *env1)
380 { 380 {
381 #if defined(CONFIG_USER_ONLY) 381 #if defined(CONFIG_USER_ONLY)
382 return MMU_USER_IDX; 382 return MMU_USER_IDX;
383 #elif !defined(TARGET_SPARC64) 383 #elif !defined(TARGET_SPARC64)
384 - return env->psrs; 384 + return env1->psrs;
385 #else 385 #else
386 - if (!env->psrs) 386 + if (!env1->psrs)
387 return MMU_USER_IDX; 387 return MMU_USER_IDX;
388 - else if ((env->hpstate & HS_PRIV) == 0) 388 + else if ((env1->hpstate & HS_PRIV) == 0)
389 return MMU_KERNEL_IDX; 389 return MMU_KERNEL_IDX;
390 else 390 else
391 return MMU_HYPV_IDX; 391 return MMU_HYPV_IDX;
392 #endif 392 #endif
393 } 393 }
394 394
395 -static inline int cpu_fpu_enabled(CPUState *env) 395 +static inline int cpu_fpu_enabled(CPUState *env1)
396 { 396 {
397 #if defined(CONFIG_USER_ONLY) 397 #if defined(CONFIG_USER_ONLY)
398 return 1; 398 return 1;
399 #elif !defined(TARGET_SPARC64) 399 #elif !defined(TARGET_SPARC64)
400 - return env->psref; 400 + return env1->psref;
401 #else 401 #else
402 - return ((env->pstate & PS_PEF) != 0) && ((env->fprs & FPRS_FEF) != 0); 402 + return ((env1->pstate & PS_PEF) != 0) && ((env1->fprs & FPRS_FEF) != 0);
403 #endif 403 #endif
404 } 404 }
405 405
target-sparc/exec.h
@@ -45,15 +45,6 @@ register uint32_t T2 asm(AREG3); @@ -45,15 +45,6 @@ register uint32_t T2 asm(AREG3);
45 #include "cpu.h" 45 #include "cpu.h"
46 #include "exec-all.h" 46 #include "exec-all.h"
47 47
48 -void cpu_lock(void);  
49 -void cpu_unlock(void);  
50 -void cpu_loop_exit(void);  
51 -void set_cwp(int new_cwp);  
52 -void do_interrupt(int intno);  
53 -void memcpy32(target_ulong *dst, const target_ulong *src);  
54 -target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);  
55 -void dump_mmu(CPUState *env);  
56 -  
57 static inline void env_to_regs(void) 48 static inline void env_to_regs(void)
58 { 49 {
59 #if defined(reg_REGWPTR) 50 #if defined(reg_REGWPTR)
@@ -66,14 +57,14 @@ static inline void regs_to_env(void) @@ -66,14 +57,14 @@ static inline void regs_to_env(void)
66 { 57 {
67 } 58 }
68 59
69 -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, 60 +int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
70 int mmu_idx, int is_softmmu); 61 int mmu_idx, int is_softmmu);
71 62
72 -static inline int cpu_halted(CPUState *env) {  
73 - if (!env->halted) 63 +static inline int cpu_halted(CPUState *env1) {
  64 + if (!env1->halted)
74 return 0; 65 return 0;
75 - if ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->psret != 0)) {  
76 - env->halted = 0; 66 + if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) {
  67 + env1->halted = 0;
77 return 0; 68 return 0;
78 } 69 }
79 return EXCP_HALTED; 70 return EXCP_HALTED;
target-sparc/helper.c
@@ -28,6 +28,7 @@ @@ -28,6 +28,7 @@
28 #include "cpu.h" 28 #include "cpu.h"
29 #include "exec-all.h" 29 #include "exec-all.h"
30 #include "qemu-common.h" 30 #include "qemu-common.h"
  31 +#include "helper.h"
31 32
32 //#define DEBUG_MMU 33 //#define DEBUG_MMU
33 //#define DEBUG_FEATURES 34 //#define DEBUG_FEATURES
@@ -35,7 +36,7 @@ @@ -35,7 +36,7 @@
35 typedef struct sparc_def_t sparc_def_t; 36 typedef struct sparc_def_t sparc_def_t;
36 37
37 struct sparc_def_t { 38 struct sparc_def_t {
38 - const unsigned char *name; 39 + const char *name;
39 target_ulong iu_version; 40 target_ulong iu_version;
40 uint32_t fpu_version; 41 uint32_t fpu_version;
41 uint32_t mmu_version; 42 uint32_t mmu_version;
@@ -47,7 +48,7 @@ struct sparc_def_t { @@ -47,7 +48,7 @@ struct sparc_def_t {
47 uint32_t features; 48 uint32_t features;
48 }; 49 };
49 50
50 -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model); 51 +static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
51 52
52 /* Sparc MMU emulation */ 53 /* Sparc MMU emulation */
53 54
@@ -67,13 +68,13 @@ void cpu_unlock(void) @@ -67,13 +68,13 @@ void cpu_unlock(void)
67 68
68 #if defined(CONFIG_USER_ONLY) 69 #if defined(CONFIG_USER_ONLY)
69 70
70 -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, 71 +int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
71 int mmu_idx, int is_softmmu) 72 int mmu_idx, int is_softmmu)
72 { 73 {
73 if (rw & 2) 74 if (rw & 2)
74 - env->exception_index = TT_TFAULT; 75 + env1->exception_index = TT_TFAULT;
75 else 76 else
76 - env->exception_index = TT_DFAULT; 77 + env1->exception_index = TT_DFAULT;
77 return 1; 78 return 1;
78 } 79 }
79 80
@@ -387,8 +388,7 @@ void dump_mmu(CPUState *env) @@ -387,8 +388,7 @@ void dump_mmu(CPUState *env)
387 * UltraSparc IIi I/DMMUs 388 * UltraSparc IIi I/DMMUs
388 */ 389 */
389 static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical, int *prot, 390 static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical, int *prot,
390 - int *access_index, target_ulong address, int rw,  
391 - int is_user) 391 + target_ulong address, int rw, int is_user)
392 { 392 {
393 target_ulong mask; 393 target_ulong mask;
394 unsigned int i; 394 unsigned int i;
@@ -447,8 +447,7 @@ static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical @@ -447,8 +447,7 @@ static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical
447 } 447 }
448 448
449 static int get_physical_address_code(CPUState *env, target_phys_addr_t *physical, int *prot, 449 static int get_physical_address_code(CPUState *env, target_phys_addr_t *physical, int *prot,
450 - int *access_index, target_ulong address, int rw,  
451 - int is_user) 450 + target_ulong address, int is_user)
452 { 451 {
453 target_ulong mask; 452 target_ulong mask;
454 unsigned int i; 453 unsigned int i;
@@ -509,9 +508,11 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, @@ -509,9 +508,11 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical,
509 int is_user = mmu_idx == MMU_USER_IDX; 508 int is_user = mmu_idx == MMU_USER_IDX;
510 509
511 if (rw == 2) 510 if (rw == 2)
512 - return get_physical_address_code(env, physical, prot, access_index, address, rw, is_user); 511 + return get_physical_address_code(env, physical, prot, address,
  512 + is_user);
513 else 513 else
514 - return get_physical_address_data(env, physical, prot, access_index, address, rw, is_user); 514 + return get_physical_address_data(env, physical, prot, address, rw,
  515 + is_user);
515 } 516 }
516 517
517 /* Perform address translation */ 518 /* Perform address translation */
@@ -1134,7 +1135,7 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features) @@ -1134,7 +1135,7 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
1134 fprintf(stderr, "CPU feature %s not found\n", flagname); 1135 fprintf(stderr, "CPU feature %s not found\n", flagname);
1135 } 1136 }
1136 1137
1137 -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model) 1138 +static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
1138 { 1139 {
1139 unsigned int i; 1140 unsigned int i;
1140 const sparc_def_t *def = NULL; 1141 const sparc_def_t *def = NULL;
target-sparc/helper.h
@@ -175,3 +175,12 @@ VIS_CMPHELPER(cmpne); @@ -175,3 +175,12 @@ VIS_CMPHELPER(cmpne);
175 #undef F_HELPER_SDQ_0_0 175 #undef F_HELPER_SDQ_0_0
176 #undef VIS_HELPER 176 #undef VIS_HELPER
177 #undef VIS_CMPHELPER 177 #undef VIS_CMPHELPER
  178 +
  179 +void cpu_lock(void);
  180 +void cpu_unlock(void);
  181 +void cpu_loop_exit(void);
  182 +void set_cwp(int new_cwp);
  183 +void do_interrupt(int intno);
  184 +void memcpy32(target_ulong *dst, const target_ulong *src);
  185 +target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
  186 +void dump_mmu(CPUState *env);
target-sparc/op_helper.c
@@ -16,21 +16,21 @@ @@ -16,21 +16,21 @@
16 #define DPRINTF_MMU(fmt, args...) \ 16 #define DPRINTF_MMU(fmt, args...) \
17 do { printf("MMU: " fmt , ##args); } while (0) 17 do { printf("MMU: " fmt , ##args); } while (0)
18 #else 18 #else
19 -#define DPRINTF_MMU(fmt, args...) 19 +#define DPRINTF_MMU(fmt, args...) do {} while (0)
20 #endif 20 #endif
21 21
22 #ifdef DEBUG_MXCC 22 #ifdef DEBUG_MXCC
23 #define DPRINTF_MXCC(fmt, args...) \ 23 #define DPRINTF_MXCC(fmt, args...) \
24 do { printf("MXCC: " fmt , ##args); } while (0) 24 do { printf("MXCC: " fmt , ##args); } while (0)
25 #else 25 #else
26 -#define DPRINTF_MXCC(fmt, args...) 26 +#define DPRINTF_MXCC(fmt, args...) do {} while (0)
27 #endif 27 #endif
28 28
29 #ifdef DEBUG_ASI 29 #ifdef DEBUG_ASI
30 #define DPRINTF_ASI(fmt, args...) \ 30 #define DPRINTF_ASI(fmt, args...) \
31 do { printf("ASI: " fmt , ##args); } while (0) 31 do { printf("ASI: " fmt , ##args); } while (0)
32 #else 32 #else
33 -#define DPRINTF_ASI(fmt, args...) 33 +#define DPRINTF_ASI(fmt, args...) do {} while (0)
34 #endif 34 #endif
35 35
36 void raise_exception(int tt) 36 void raise_exception(int tt)
target-sparc/translate.c
@@ -66,9 +66,6 @@ typedef struct DisasContext { @@ -66,9 +66,6 @@ typedef struct DisasContext {
66 uint32_t features; 66 uint32_t features;
67 } DisasContext; 67 } DisasContext;
68 68
69 -extern FILE *logfile;  
70 -extern int loglevel;  
71 -  
72 // This function uses non-native bit order 69 // This function uses non-native bit order
73 #define GET_FIELD(X, FROM, TO) \ 70 #define GET_FIELD(X, FROM, TO) \
74 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) 71 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))