Commit 2054396a044c86521d08e666e5b0c1d20446cf3b
1 parent
039de852
fixed include macro pb
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@249 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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31 additions
and
8 deletions
linux-user/qemu.h
| @@ -6,8 +6,15 @@ | @@ -6,8 +6,15 @@ | ||
| 6 | #include <signal.h> | 6 | #include <signal.h> |
| 7 | #include "syscall_defs.h" | 7 | #include "syscall_defs.h" |
| 8 | 8 | ||
| 9 | -#include "cpu-" TARGET_ARCH ".h" | ||
| 10 | -#include "syscall-" TARGET_ARCH ".h" | 9 | +#if defined(TARGET_I386) |
| 10 | +#include "cpu-i386.h" | ||
| 11 | +#include "syscall-i386.h" | ||
| 12 | +#elif defined(TARGET_ARM) | ||
| 13 | +#include "cpu-arm.h" | ||
| 14 | +#include "syscall-arm.h" | ||
| 15 | +#else | ||
| 16 | +#error unsupported target CPU | ||
| 17 | +#endif | ||
| 11 | 18 | ||
| 12 | /* This struct is used to hold certain information about the image. | 19 | /* This struct is used to hold certain information about the image. |
| 13 | * Basically, it replicates in user space what would be certain | 20 | * Basically, it replicates in user space what would be certain |
translate.c
| @@ -24,20 +24,36 @@ | @@ -24,20 +24,36 @@ | ||
| 24 | #include <inttypes.h> | 24 | #include <inttypes.h> |
| 25 | 25 | ||
| 26 | #include "config.h" | 26 | #include "config.h" |
| 27 | + | ||
| 27 | #define IN_OP_I386 | 28 | #define IN_OP_I386 |
| 28 | -#include "cpu-" TARGET_ARCH ".h" | 29 | +#if defined(TARGET_I386) |
| 30 | +#include "cpu-i386.h" | ||
| 31 | +#define OPC_CPU_H "opc-i386.h" | ||
| 32 | +#elif defined(TARGET_ARM) | ||
| 33 | +#include "cpu-arm.h" | ||
| 34 | +#define OPC_CPU_H "opc-arm.h" | ||
| 35 | +#else | ||
| 36 | +#error unsupported target CPU | ||
| 37 | +#endif | ||
| 38 | + | ||
| 29 | #include "exec.h" | 39 | #include "exec.h" |
| 30 | #include "disas.h" | 40 | #include "disas.h" |
| 31 | 41 | ||
| 32 | enum { | 42 | enum { |
| 33 | #define DEF(s, n, copy_size) INDEX_op_ ## s, | 43 | #define DEF(s, n, copy_size) INDEX_op_ ## s, |
| 34 | -#include "opc-" TARGET_ARCH ".h" | 44 | +#include OPC_CPU_H |
| 35 | #undef DEF | 45 | #undef DEF |
| 36 | NB_OPS, | 46 | NB_OPS, |
| 37 | }; | 47 | }; |
| 38 | 48 | ||
| 39 | #include "dyngen.h" | 49 | #include "dyngen.h" |
| 40 | -#include "op-" TARGET_ARCH ".h" | 50 | +#if defined(TARGET_I386) |
| 51 | +#include "op-i386.h" | ||
| 52 | +#elif defined(TARGET_ARM) | ||
| 53 | +#include "op-arm.h" | ||
| 54 | +#else | ||
| 55 | +#error unsupported target CPU | ||
| 56 | +#endif | ||
| 41 | 57 | ||
| 42 | uint16_t gen_opc_buf[OPC_BUF_SIZE]; | 58 | uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
| 43 | uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE]; | 59 | uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE]; |
| @@ -48,13 +64,13 @@ uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; | @@ -48,13 +64,13 @@ uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; | ||
| 48 | #ifdef DEBUG_DISAS | 64 | #ifdef DEBUG_DISAS |
| 49 | static const char *op_str[] = { | 65 | static const char *op_str[] = { |
| 50 | #define DEF(s, n, copy_size) #s, | 66 | #define DEF(s, n, copy_size) #s, |
| 51 | -#include "opc-" TARGET_ARCH ".h" | 67 | +#include OPC_CPU_H |
| 52 | #undef DEF | 68 | #undef DEF |
| 53 | }; | 69 | }; |
| 54 | 70 | ||
| 55 | static uint8_t op_nb_args[] = { | 71 | static uint8_t op_nb_args[] = { |
| 56 | #define DEF(s, n, copy_size) n, | 72 | #define DEF(s, n, copy_size) n, |
| 57 | -#include "opc-" TARGET_ARCH ".h" | 73 | +#include OPC_CPU_H |
| 58 | #undef DEF | 74 | #undef DEF |
| 59 | }; | 75 | }; |
| 60 | 76 | ||
| @@ -123,7 +139,7 @@ int cpu_gen_code(TranslationBlock *tb, | @@ -123,7 +139,7 @@ int cpu_gen_code(TranslationBlock *tb, | ||
| 123 | 139 | ||
| 124 | static const unsigned short opc_copy_size[] = { | 140 | static const unsigned short opc_copy_size[] = { |
| 125 | #define DEF(s, n, copy_size) copy_size, | 141 | #define DEF(s, n, copy_size) copy_size, |
| 126 | -#include "opc-" TARGET_ARCH ".h" | 142 | +#include OPC_CPU_H |
| 127 | #undef DEF | 143 | #undef DEF |
| 128 | }; | 144 | }; |
| 129 | 145 |