Commit 1f163b149345225f234216289a958b8ae691de61

Authored by balrog
1 parent 86660795

scoop: GPRR reports the state of GPIO lines (Dmitry Baryshkov).

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5615 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 6 additions and 9 deletions
hw/zaurus.c
@@ -46,7 +46,6 @@ struct scoop_info_s { @@ -46,7 +46,6 @@ struct scoop_info_s {
46 uint16_t irr; 46 uint16_t irr;
47 uint16_t imr; 47 uint16_t imr;
48 uint16_t isr; 48 uint16_t isr;
49 - uint16_t gprr;  
50 }; 49 };
51 50
52 #define SCOOP_MCR 0x00 51 #define SCOOP_MCR 0x00
@@ -99,9 +98,8 @@ static uint32_t scoop_readb(void *opaque, target_phys_addr_t addr) @@ -99,9 +98,8 @@ static uint32_t scoop_readb(void *opaque, target_phys_addr_t addr)
99 case SCOOP_GPCR: 98 case SCOOP_GPCR:
100 return s->gpio_dir; 99 return s->gpio_dir;
101 case SCOOP_GPWR: 100 case SCOOP_GPWR:
102 - return s->gpio_level;  
103 case SCOOP_GPRR: 101 case SCOOP_GPRR:
104 - return s->gprr; 102 + return s->gpio_level;
105 default: 103 default:
106 zaurus_printf("Bad register offset " REG_FMT "\n", addr); 104 zaurus_printf("Bad register offset " REG_FMT "\n", addr);
107 } 105 }
@@ -144,12 +142,10 @@ static void scoop_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) @@ -144,12 +142,10 @@ static void scoop_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
144 scoop_gpio_handler_update(s); 142 scoop_gpio_handler_update(s);
145 break; 143 break;
146 case SCOOP_GPWR: 144 case SCOOP_GPWR:
  145 + case SCOOP_GPRR: /* GPRR is probably R/O in real HW */
147 s->gpio_level = value & s->gpio_dir; 146 s->gpio_level = value & s->gpio_dir;
148 scoop_gpio_handler_update(s); 147 scoop_gpio_handler_update(s);
149 break; 148 break;
150 - case SCOOP_GPRR:  
151 - s->gprr = value;  
152 - break;  
153 default: 149 default:
154 zaurus_printf("Bad register offset " REG_FMT "\n", addr); 150 zaurus_printf("Bad register offset " REG_FMT "\n", addr);
155 } 151 }
@@ -205,11 +201,11 @@ static void scoop_save(QEMUFile *f, void *opaque) @@ -205,11 +201,11 @@ static void scoop_save(QEMUFile *f, void *opaque)
205 qemu_put_be16s(f, &s->irr); 201 qemu_put_be16s(f, &s->irr);
206 qemu_put_be16s(f, &s->imr); 202 qemu_put_be16s(f, &s->imr);
207 qemu_put_be16s(f, &s->isr); 203 qemu_put_be16s(f, &s->isr);
208 - qemu_put_be16s(f, &s->gprr);  
209 } 204 }
210 205
211 static int scoop_load(QEMUFile *f, void *opaque, int version_id) 206 static int scoop_load(QEMUFile *f, void *opaque, int version_id)
212 { 207 {
  208 + uint16_t dummy;
213 struct scoop_info_s *s = (struct scoop_info_s *) opaque; 209 struct scoop_info_s *s = (struct scoop_info_s *) opaque;
214 qemu_get_be16s(f, &s->status); 210 qemu_get_be16s(f, &s->status);
215 qemu_get_be16s(f, &s->power); 211 qemu_get_be16s(f, &s->power);
@@ -222,7 +218,8 @@ static int scoop_load(QEMUFile *f, void *opaque, int version_id) @@ -222,7 +218,8 @@ static int scoop_load(QEMUFile *f, void *opaque, int version_id)
222 qemu_get_be16s(f, &s->irr); 218 qemu_get_be16s(f, &s->irr);
223 qemu_get_be16s(f, &s->imr); 219 qemu_get_be16s(f, &s->imr);
224 qemu_get_be16s(f, &s->isr); 220 qemu_get_be16s(f, &s->isr);
225 - qemu_get_be16s(f, &s->gprr); 221 + if (version_id < 1)
  222 + qemu_get_be16s(f, &dummy);
226 223
227 return 0; 224 return 0;
228 } 225 }
@@ -243,7 +240,7 @@ struct scoop_info_s *scoop_init(struct pxa2xx_state_s *cpu, @@ -243,7 +240,7 @@ struct scoop_info_s *scoop_init(struct pxa2xx_state_s *cpu,
243 iomemtype = cpu_register_io_memory(0, scoop_readfn, 240 iomemtype = cpu_register_io_memory(0, scoop_readfn,
244 scoop_writefn, s); 241 scoop_writefn, s);
245 cpu_register_physical_memory(s->target_base, 0x1000, iomemtype); 242 cpu_register_physical_memory(s->target_base, 0x1000, iomemtype);
246 - register_savevm("scoop", instance, 0, scoop_save, scoop_load, s); 243 + register_savevm("scoop", instance, 1, scoop_save, scoop_load, s);
247 244
248 return s; 245 return s;
249 } 246 }