gwj / at91sam9263 · Commits

Commit 1f07fd1f859c8e10417e746bd2ac1c35bf87cdd9

Authored by Edgar E. Iglesias
1 parent afeeceb0

microblaze: Add CPU interrupt wrapper logic. 

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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hw/microblaze_pic_cpu.c 0 → 100644
  View file @1f07fd1
  1 +/*
  2 + * QEMU MicroBlaze CPU interrupt wrapper logic.
  3 + *
  4 + * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
  5 + *
  6 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  7 + * of this software and associated documentation files (the "Software"), to deal
  8 + * in the Software without restriction, including without limitation the rights
  9 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 + * copies of the Software, and to permit persons to whom the Software is
  11 + * furnished to do so, subject to the following conditions:
  12 + *
  13 + * The above copyright notice and this permission notice shall be included in
  14 + * all copies or substantial portions of the Software.
  15 + *
  16 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 + * THE SOFTWARE.
  23 + */
  24 +
  25 +#include "hw.h"
  26 +#include "pc.h"
  27 +
  28 +#define D(x)
  29 +
  30 +void pic_info(Monitor *mon)
  31 +{}
  32 +void irq_info(Monitor *mon)
  33 +{}
  34 +
  35 +static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
  36 +{
  37 + CPUState *env = (CPUState *)opaque;
  38 + int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
  39 +
  40 + if (level)
  41 + cpu_interrupt(env, type);
  42 + else
  43 + cpu_reset_interrupt(env, type);
  44 +}
  45 +
  46 +qemu_irq *microblaze_pic_init_cpu(CPUState *env);
  47 +qemu_irq *microblaze_pic_init_cpu(CPUState *env)
  48 +{
  49 + return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
  50 +}
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