Commit 1ef59d0acf7c71e9b863bff904ceac74ce9bd107
1 parent
7fd7b91f
ppc fixes (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@765 c046a42c-6fe2-441c-8c8c-71466251a162
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5 changed files
with
30 additions
and
13 deletions
target-ppc/exec.h
| @@ -139,6 +139,8 @@ void do_sraw(void); | @@ -139,6 +139,8 @@ void do_sraw(void); | ||
| 139 | 139 | ||
| 140 | void do_fctiw (void); | 140 | void do_fctiw (void); |
| 141 | void do_fctiwz (void); | 141 | void do_fctiwz (void); |
| 142 | +void do_fnmadds (void); | ||
| 143 | +void do_fnmsubs (void); | ||
| 142 | void do_fsqrt (void); | 144 | void do_fsqrt (void); |
| 143 | void do_fsqrts (void); | 145 | void do_fsqrts (void); |
| 144 | void do_fres (void); | 146 | void do_fres (void); |
target-ppc/helper.c
| @@ -163,7 +163,6 @@ static int get_bat (CPUState *env, uint32_t *real, int *prot, | @@ -163,7 +163,6 @@ static int get_bat (CPUState *env, uint32_t *real, int *prot, | ||
| 163 | *BATu, *BATl, BEPIu, BEPIl, bl); | 163 | *BATu, *BATl, BEPIu, BEPIl, bl); |
| 164 | } | 164 | } |
| 165 | #endif | 165 | #endif |
| 166 | - env->spr[DAR] = virtual; | ||
| 167 | } | 166 | } |
| 168 | /* No hit */ | 167 | /* No hit */ |
| 169 | return ret; | 168 | return ret; |
| @@ -543,12 +542,12 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, | @@ -543,12 +542,12 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, | ||
| 543 | access_type = env->access_type; | 542 | access_type = env->access_type; |
| 544 | if (env->user_mode_only) { | 543 | if (env->user_mode_only) { |
| 545 | /* user mode only emulation */ | 544 | /* user mode only emulation */ |
| 546 | - ret = -1; | 545 | + ret = -2; |
| 547 | goto do_fault; | 546 | goto do_fault; |
| 548 | } | 547 | } |
| 549 | /* NASTY BUG workaround */ | 548 | /* NASTY BUG workaround */ |
| 550 | if (access_type == ACCESS_CODE && rw) { | 549 | if (access_type == ACCESS_CODE && rw) { |
| 551 | - // printf("%s: ERROR WRITE CODE ACCESS\n", __func__); | 550 | + printf("%s: ERROR WRITE CODE ACCESS\n", __func__); |
| 552 | access_type = ACCESS_INT; | 551 | access_type = ACCESS_INT; |
| 553 | } | 552 | } |
| 554 | ret = get_physical_address(env, &physical, &prot, | 553 | ret = get_physical_address(env, &physical, &prot, |
| @@ -674,10 +673,10 @@ uint32_t _load_msr (CPUState *env) | @@ -674,10 +673,10 @@ uint32_t _load_msr (CPUState *env) | ||
| 674 | 673 | ||
| 675 | void _store_msr (CPUState *env, uint32_t value) | 674 | void _store_msr (CPUState *env, uint32_t value) |
| 676 | { | 675 | { |
| 677 | - if (((T0 >> MSR_IR) & 0x01) != msr_ir || | ||
| 678 | - ((T0 >> MSR_DR) & 0x01) != msr_dr) { | 676 | + if (((value >> MSR_IR) & 0x01) != msr_ir || |
| 677 | + ((value >> MSR_DR) & 0x01) != msr_dr) { | ||
| 679 | /* Flush all tlb when changing translation mode or privilege level */ | 678 | /* Flush all tlb when changing translation mode or privilege level */ |
| 680 | - do_tlbia(); | 679 | + tlb_flush(env, 1); |
| 681 | } | 680 | } |
| 682 | msr_pow = (value >> MSR_POW) & 0x03; | 681 | msr_pow = (value >> MSR_POW) & 0x03; |
| 683 | msr_ile = (value >> MSR_ILE) & 0x01; | 682 | msr_ile = (value >> MSR_ILE) & 0x01; |
| @@ -931,7 +930,7 @@ void do_interrupt (CPUState *env) | @@ -931,7 +930,7 @@ void do_interrupt (CPUState *env) | ||
| 931 | env->nip = excp << 8; | 930 | env->nip = excp << 8; |
| 932 | env->exception_index = EXCP_NONE; | 931 | env->exception_index = EXCP_NONE; |
| 933 | /* Invalidate all TLB as we may have changed translation mode */ | 932 | /* Invalidate all TLB as we may have changed translation mode */ |
| 934 | - do_tlbia(); | 933 | + tlb_flush(env, 1); |
| 935 | /* ensure that no TB jump will be modified as | 934 | /* ensure that no TB jump will be modified as |
| 936 | the program flow was changed */ | 935 | the program flow was changed */ |
| 937 | #ifdef __sparc__ | 936 | #ifdef __sparc__ |
target-ppc/op.c
| @@ -1368,28 +1368,32 @@ PPC_OP(fmsubs) | @@ -1368,28 +1368,32 @@ PPC_OP(fmsubs) | ||
| 1368 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ | 1368 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ |
| 1369 | PPC_OP(fnmadd) | 1369 | PPC_OP(fnmadd) |
| 1370 | { | 1370 | { |
| 1371 | - FT0 = -((FT0 * FT1) + FT2); | 1371 | + FT0 *= FT1; |
| 1372 | + FT0 += FT2; | ||
| 1373 | + FT0 = -FT0; | ||
| 1372 | RETURN(); | 1374 | RETURN(); |
| 1373 | } | 1375 | } |
| 1374 | 1376 | ||
| 1375 | /* fnmadds - fnmadds. */ | 1377 | /* fnmadds - fnmadds. */ |
| 1376 | PPC_OP(fnmadds) | 1378 | PPC_OP(fnmadds) |
| 1377 | { | 1379 | { |
| 1378 | - FTS0 = -((FTS0 * FTS1) + FTS2); | 1380 | + do_fnmadds(); |
| 1379 | RETURN(); | 1381 | RETURN(); |
| 1380 | } | 1382 | } |
| 1381 | 1383 | ||
| 1382 | /* fnmsub - fnmsub. */ | 1384 | /* fnmsub - fnmsub. */ |
| 1383 | PPC_OP(fnmsub) | 1385 | PPC_OP(fnmsub) |
| 1384 | { | 1386 | { |
| 1385 | - FT0 = -((FT0 * FT1) - FT2); | 1387 | + FT0 *= FT1; |
| 1388 | + FT0 -= FT2; | ||
| 1389 | + FT0 = -FT0; | ||
| 1386 | RETURN(); | 1390 | RETURN(); |
| 1387 | } | 1391 | } |
| 1388 | 1392 | ||
| 1389 | /* fnmsubs - fnmsubs. */ | 1393 | /* fnmsubs - fnmsubs. */ |
| 1390 | PPC_OP(fnmsubs) | 1394 | PPC_OP(fnmsubs) |
| 1391 | { | 1395 | { |
| 1392 | - FTS0 = -((FTS0 * FTS1) - FTS2); | 1396 | + do_fnmsubs(); |
| 1393 | RETURN(); | 1397 | RETURN(); |
| 1394 | } | 1398 | } |
| 1395 | 1399 |
target-ppc/op_helper.c
| @@ -267,6 +267,16 @@ void do_fctiwz (void) | @@ -267,6 +267,16 @@ void do_fctiwz (void) | ||
| 267 | fesetround(cround); | 267 | fesetround(cround); |
| 268 | } | 268 | } |
| 269 | 269 | ||
| 270 | +void do_fnmadds (void) | ||
| 271 | +{ | ||
| 272 | + FTS0 = -((FTS0 * FTS1) + FTS2); | ||
| 273 | +} | ||
| 274 | + | ||
| 275 | +void do_fnmsubs (void) | ||
| 276 | +{ | ||
| 277 | + FTS0 = -((FTS0 * FTS1) - FTS2); | ||
| 278 | +} | ||
| 279 | + | ||
| 270 | void do_fsqrt (void) | 280 | void do_fsqrt (void) |
| 271 | { | 281 | { |
| 272 | FT0 = sqrt(FT0); | 282 | FT0 = sqrt(FT0); |
target-ppc/translate.c
| @@ -276,7 +276,7 @@ static inline uint32_t MASK (uint32_t start, uint32_t end) | @@ -276,7 +276,7 @@ static inline uint32_t MASK (uint32_t start, uint32_t end) | ||
| 276 | } | 276 | } |
| 277 | 277 | ||
| 278 | #define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \ | 278 | #define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \ |
| 279 | -__attribute__ ((section(".opcodes"), unused)) \ | 279 | +__attribute__ ((section(".opcodes"), unused, aligned (8) )) \ |
| 280 | static opcode_t opc_##name = { \ | 280 | static opcode_t opc_##name = { \ |
| 281 | .opc1 = op1, \ | 281 | .opc1 = op1, \ |
| 282 | .opc2 = op2, \ | 282 | .opc2 = op2, \ |
| @@ -289,7 +289,7 @@ static opcode_t opc_##name = { \ | @@ -289,7 +289,7 @@ static opcode_t opc_##name = { \ | ||
| 289 | } | 289 | } |
| 290 | 290 | ||
| 291 | #define GEN_OPCODE_MARK(name) \ | 291 | #define GEN_OPCODE_MARK(name) \ |
| 292 | -__attribute__ ((section(".opcodes"), unused)) \ | 292 | +__attribute__ ((section(".opcodes"), unused, aligned (8) )) \ |
| 293 | static opcode_t opc_##name = { \ | 293 | static opcode_t opc_##name = { \ |
| 294 | .opc1 = 0xFF, \ | 294 | .opc1 = 0xFF, \ |
| 295 | .opc2 = 0xFF, \ | 295 | .opc2 = 0xFF, \ |
| @@ -3144,7 +3144,9 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, | @@ -3144,7 +3144,9 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, | ||
| 3144 | fprintf(logfile, "---------------- excp: %04x\n", ctx.exception); | 3144 | fprintf(logfile, "---------------- excp: %04x\n", ctx.exception); |
| 3145 | cpu_ppc_dump_state(env, logfile, 0); | 3145 | cpu_ppc_dump_state(env, logfile, 0); |
| 3146 | fprintf(logfile, "IN: %s\n", lookup_symbol((void *)pc_start)); | 3146 | fprintf(logfile, "IN: %s\n", lookup_symbol((void *)pc_start)); |
| 3147 | +#if defined(CONFIG_USER_ONLY) | ||
| 3147 | disas(logfile, (void *)pc_start, ctx.nip - pc_start, 0, 0); | 3148 | disas(logfile, (void *)pc_start, ctx.nip - pc_start, 0, 0); |
| 3149 | +#endif | ||
| 3148 | fprintf(logfile, "\n"); | 3150 | fprintf(logfile, "\n"); |
| 3149 | 3151 | ||
| 3150 | fprintf(logfile, "OP:\n"); | 3152 | fprintf(logfile, "OP:\n"); |