gwj / at91sam9263 · Commits

Commit 1e4c090f7d204a65c6f0a851255b3f48192f08a4

Authored by aurel32
1 parent bdc4e053

target-ppc: optimize mullw and make the code more readable 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5657 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 1 additions and 12 deletions
target-ppc/translate.c
  View file @1e4c090
@@ -1234,20 +1234,9 @@ GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER) @@ -1234,20 +1234,9 @@ GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER)
1234 /* mullw mullw. */ 1234 /* mullw mullw. */
1235 GEN_HANDLER(mullw, 0x1F, 0x0B, 0x07, 0x00000000, PPC_INTEGER) 1235 GEN_HANDLER(mullw, 0x1F, 0x0B, 0x07, 0x00000000, PPC_INTEGER)
1236 { 1236 {
1237 -#if defined(TARGET_PPC64)  
1238 - TCGv t0, t1;  
1239 - t0 = tcg_temp_new(TCG_TYPE_TL);  
1240 - t1 = tcg_temp_new(TCG_TYPE_TL);  
1241 - tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]);  
1242 - tcg_gen_ext32s_tl(t1, cpu_gpr[rB(ctx->opcode)]);  
1243 - tcg_gen_mul_tl(t0, t0, t1);  
1244 - tcg_temp_free(t0);  
1245 - tcg_gen_ext32s_tl(cpu_gpr[rD(ctx->opcode)], t0);  
1246 - tcg_temp_free(t1);  
1247 -#else  
1248 tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1237 tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1249 cpu_gpr[rB(ctx->opcode)]); 1238 cpu_gpr[rB(ctx->opcode)]);
1250 -#endif 1239 + tcg_gen_ext32s_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)]);
1251 if (unlikely(Rc(ctx->opcode) != 0)) 1240 if (unlikely(Rc(ctx->opcode) != 0))
1252 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); 1241 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
1253 } 1242 }