Commit 1b9eb036b9cd2d8b671f59030e8522c64ccea703

Authored by j_mayer
1 parent e397ee33

Fix debug printf: we need different macros for target_ulong prints

and GPR ones, as the lengths can be different.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2529 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/cpu.h
@@ -35,17 +35,20 @@ typedef uint64_t ppc_gpr_t; @@ -35,17 +35,20 @@ typedef uint64_t ppc_gpr_t;
35 #define TARGET_LONG_BITS 64 35 #define TARGET_LONG_BITS 64
36 #define TARGET_GPR_BITS 64 36 #define TARGET_GPR_BITS 64
37 #define REGX "%016" PRIx64 37 #define REGX "%016" PRIx64
  38 +#define ADDRX "%016" PRIx64
38 #elif defined(TARGET_PPCSPE) 39 #elif defined(TARGET_PPCSPE)
39 /* GPR are 64 bits: used by vector extension */ 40 /* GPR are 64 bits: used by vector extension */
40 typedef uint64_t ppc_gpr_t; 41 typedef uint64_t ppc_gpr_t;
41 #define TARGET_LONG_BITS 32 42 #define TARGET_LONG_BITS 32
42 #define TARGET_GPR_BITS 64 43 #define TARGET_GPR_BITS 64
43 -#define REGX "%08" PRIx32 44 +#define REGX "%016" PRIx64
  45 +#define ADDRX "%08" PRIx32
44 #else 46 #else
45 typedef uint32_t ppc_gpr_t; 47 typedef uint32_t ppc_gpr_t;
46 #define TARGET_LONG_BITS 32 48 #define TARGET_LONG_BITS 32
47 #define TARGET_GPR_BITS 32 49 #define TARGET_GPR_BITS 32
48 #define REGX "%08" PRIx32 50 #define REGX "%08" PRIx32
  51 +#define ADDRX "%08" PRIx32
49 #endif 52 #endif
50 53
51 #include "cpu-defs.h" 54 #include "cpu-defs.h"
target-ppc/helper.c
@@ -225,7 +225,7 @@ static inline void __ppc6xx_tlb_invalidate_virt (CPUState *env, @@ -225,7 +225,7 @@ static inline void __ppc6xx_tlb_invalidate_virt (CPUState *env,
225 if (pte_is_valid(tlb->pte0) && (match_epn == 0 || eaddr == tlb->EPN)) { 225 if (pte_is_valid(tlb->pte0) && (match_epn == 0 || eaddr == tlb->EPN)) {
226 #if defined (DEBUG_SOFTWARE_TLB) 226 #if defined (DEBUG_SOFTWARE_TLB)
227 if (loglevel != 0) { 227 if (loglevel != 0) {
228 - fprintf(logfile, "TLB invalidate %d/%d %08x\n", 228 + fprintf(logfile, "TLB invalidate %d/%d " ADDRX "\n",
229 nr, env->nb_tlb, eaddr); 229 nr, env->nb_tlb, eaddr);
230 } 230 }
231 #endif 231 #endif
@@ -255,9 +255,8 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code, @@ -255,9 +255,8 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
255 tlb = &env->tlb[nr]; 255 tlb = &env->tlb[nr];
256 #if defined (DEBUG_SOFTWARE_TLB) 256 #if defined (DEBUG_SOFTWARE_TLB)
257 if (loglevel != 0) { 257 if (loglevel != 0) {
258 - fprintf(logfile, "Set TLB %d/%d EPN %08lx PTE0 %08lx PTE1 %08lx\n",  
259 - nr, env->nb_tlb, (unsigned long)EPN,  
260 - (unsigned long)pte0, (unsigned long)pte1); 258 + fprintf(logfile, "Set TLB %d/%d EPN " ADDRX " PTE0 " ADDRX
  259 + " PTE1 " ADDRX "\n", nr, env->nb_tlb, EPN, pte0, pte1);
261 } 260 }
262 #endif 261 #endif
263 /* Invalidate any pending reference in Qemu for this virtual address */ 262 /* Invalidate any pending reference in Qemu for this virtual address */
@@ -288,7 +287,8 @@ static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, @@ -288,7 +287,8 @@ static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
288 if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) { 287 if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) {
289 #if defined (DEBUG_SOFTWARE_TLB) 288 #if defined (DEBUG_SOFTWARE_TLB)
290 if (loglevel != 0) { 289 if (loglevel != 0) {
291 - fprintf(logfile, "TLB %d/%d %s [%08x %08x] <> %08x\n", 290 + fprintf(logfile, "TLB %d/%d %s [" ADDRX " " ADDRX
  291 + "] <> " ADDRX "\n",
292 nr, env->nb_tlb, 292 nr, env->nb_tlb,
293 pte_is_valid(tlb->pte0) ? "valid" : "inval", 293 pte_is_valid(tlb->pte0) ? "valid" : "inval",
294 tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr); 294 tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr);
@@ -298,7 +298,8 @@ static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, @@ -298,7 +298,8 @@ static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
298 } 298 }
299 #if defined (DEBUG_SOFTWARE_TLB) 299 #if defined (DEBUG_SOFTWARE_TLB)
300 if (loglevel != 0) { 300 if (loglevel != 0) {
301 - fprintf(logfile, "TLB %d/%d %s %08x <> %08x %08x %c %c\n", 301 + fprintf(logfile, "TLB %d/%d %s " ADDRX " <> " ADDRX " " ADDRX
  302 + " %c %c\n",
302 nr, env->nb_tlb, 303 nr, env->nb_tlb,
303 pte_is_valid(tlb->pte0) ? "valid" : "inval", 304 pte_is_valid(tlb->pte0) ? "valid" : "inval",
304 tlb->EPN, eaddr, tlb->pte1, 305 tlb->EPN, eaddr, tlb->pte1,
@@ -355,7 +356,7 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx, @@ -355,7 +356,7 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx,
355 356
356 #if defined (DEBUG_BATS) 357 #if defined (DEBUG_BATS)
357 if (loglevel > 0) { 358 if (loglevel > 0) {
358 - fprintf(logfile, "%s: %cBAT v 0x%08x\n", __func__, 359 + fprintf(logfile, "%s: %cBAT v 0x" ADDRX "\n", __func__,
359 type == ACCESS_CODE ? 'I' : 'D', virtual); 360 type == ACCESS_CODE ? 'I' : 'D', virtual);
360 } 361 }
361 #endif 362 #endif
@@ -371,7 +372,7 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx, @@ -371,7 +372,7 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx,
371 } 372 }
372 #if defined (DEBUG_BATS) 373 #if defined (DEBUG_BATS)
373 if (loglevel > 0) { 374 if (loglevel > 0) {
374 - fprintf(logfile, "%s...: %cBAT v 0x%08x\n", __func__, 375 + fprintf(logfile, "%s...: %cBAT v 0x" ADDRX "\n", __func__,
375 type == ACCESS_CODE ? 'I' : 'D', virtual); 376 type == ACCESS_CODE ? 'I' : 'D', virtual);
376 } 377 }
377 #endif 378 #endif
@@ -384,7 +385,8 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx, @@ -384,7 +385,8 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx,
384 bl = (*BATu & 0x00001FFC) << 15; 385 bl = (*BATu & 0x00001FFC) << 15;
385 #if defined (DEBUG_BATS) 386 #if defined (DEBUG_BATS)
386 if (loglevel > 0) { 387 if (loglevel > 0) {
387 - fprintf(logfile, "%s: %cBAT%d v 0x%08x BATu 0x%08x BATl 0x%08x\n", 388 + fprintf(logfile, "%s: %cBAT%d v 0x" ADDRX " BATu 0x" ADDRX
  389 + " BATl 0x" ADDRX "\n",
388 __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, 390 __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
389 *BATu, *BATl); 391 *BATu, *BATl);
390 } 392 }
@@ -404,7 +406,8 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx, @@ -404,7 +406,8 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx,
404 ctx->prot = PAGE_WRITE | PAGE_READ; 406 ctx->prot = PAGE_WRITE | PAGE_READ;
405 #if defined (DEBUG_BATS) 407 #if defined (DEBUG_BATS)
406 if (loglevel > 0) { 408 if (loglevel > 0) {
407 - fprintf(logfile, "BAT %d match: r 0x%08x prot=%c%c\n", 409 + fprintf(logfile, "BAT %d match: r 0x" ADDRX
  410 + " prot=%c%c\n",
408 i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', 411 i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
409 ctx->prot & PAGE_WRITE ? 'W' : '-'); 412 ctx->prot & PAGE_WRITE ? 'W' : '-');
410 } 413 }
@@ -416,15 +419,16 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx, @@ -416,15 +419,16 @@ static int get_bat (CPUState *env, mmu_ctx_t *ctx,
416 } 419 }
417 if (ret < 0) { 420 if (ret < 0) {
418 #if defined (DEBUG_BATS) 421 #if defined (DEBUG_BATS)
419 - printf("no BAT match for 0x%08x:\n", virtual); 422 + printf("no BAT match for 0x" ADDRX ":\n", virtual);
420 for (i = 0; i < 4; i++) { 423 for (i = 0; i < 4; i++) {
421 BATu = &BATut[i]; 424 BATu = &BATut[i];
422 BATl = &BATlt[i]; 425 BATl = &BATlt[i];
423 BEPIu = *BATu & 0xF0000000; 426 BEPIu = *BATu & 0xF0000000;
424 BEPIl = *BATu & 0x0FFE0000; 427 BEPIl = *BATu & 0x0FFE0000;
425 bl = (*BATu & 0x00001FFC) << 15; 428 bl = (*BATu & 0x00001FFC) << 15;
426 - printf("%s: %cBAT%d v 0x%08x BATu 0x%08x BATl 0x%08x \n\t"  
427 - "0x%08x 0x%08x 0x%08x\n", 429 + printf("%s: %cBAT%d v 0x" ADDRX " BATu 0x" ADDRX
  430 + " BATl 0x" ADDRX " \n\t"
  431 + "0x" ADDRX " 0x" ADDRX " 0x" ADDRX "\n",
428 __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, 432 __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
429 *BATu, *BATl, BEPIu, BEPIl, bl); 433 *BATu, *BATl, BEPIu, BEPIl, bl);
430 } 434 }
@@ -448,8 +452,9 @@ static int find_pte (mmu_ctx_t *ctx, int h, int rw) @@ -448,8 +452,9 @@ static int find_pte (mmu_ctx_t *ctx, int h, int rw)
448 pte1 = ldl_phys(base + (i * 8) + 4); 452 pte1 = ldl_phys(base + (i * 8) + 4);
449 #if defined (DEBUG_MMU) 453 #if defined (DEBUG_MMU)
450 if (loglevel > 0) { 454 if (loglevel > 0) {
451 - fprintf(logfile, "Load pte from 0x%08x => 0x%08x 0x%08x "  
452 - "%d %d %d 0x%08x\n", base + (i * 8), pte0, pte1, 455 + fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX
  456 + " 0x" ADDRX " %d %d %d 0x" ADDRX "\n",
  457 + base + (i * 8), pte0, pte1,
453 pte0 >> 31, h, (pte0 >> 6) & 1, ctx->ptem); 458 pte0 >> 31, h, (pte0 >> 6) & 1, ctx->ptem);
454 } 459 }
455 #endif 460 #endif
@@ -481,7 +486,8 @@ static int find_pte (mmu_ctx_t *ctx, int h, int rw) @@ -481,7 +486,8 @@ static int find_pte (mmu_ctx_t *ctx, int h, int rw)
481 done: 486 done:
482 #if defined (DEBUG_MMU) 487 #if defined (DEBUG_MMU)
483 if (loglevel > 0) { 488 if (loglevel > 0) {
484 - fprintf(logfile, "found PTE at addr 0x%08x prot=0x%01x ret=%d\n", 489 + fprintf(logfile, "found PTE at addr 0x" ADDRX " prot=0x%01x "
  490 + "ret=%d\n",
485 ctx->raddr, ctx->prot, ret); 491 ctx->raddr, ctx->prot, ret);
486 } 492 }
487 #endif 493 #endif
@@ -512,8 +518,8 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx, @@ -512,8 +518,8 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
512 sr = env->sr[eaddr >> 28]; 518 sr = env->sr[eaddr >> 28];
513 #if defined (DEBUG_MMU) 519 #if defined (DEBUG_MMU)
514 if (loglevel > 0) { 520 if (loglevel > 0) {
515 - fprintf(logfile, "Check segment v=0x%08x %d 0x%08x nip=0x%08x "  
516 - "lr=0x%08x ir=%d dr=%d pr=%d %d t=%d\n", 521 + fprintf(logfile, "Check segment v=0x" ADDRX " %d 0x" ADDRX " nip=0x"
  522 + ADDRX " lr=0x" ADDRX " ir=%d dr=%d pr=%d %d t=%d\n",
517 eaddr, eaddr >> 28, sr, env->nip, 523 eaddr, eaddr >> 28, sr, env->nip,
518 env->lr, msr_ir, msr_dr, msr_pr, rw, type); 524 env->lr, msr_ir, msr_dr, msr_pr, rw, type);
519 } 525 }
@@ -523,7 +529,7 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx, @@ -523,7 +529,7 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
523 if ((sr & 0x80000000) == 0) { 529 if ((sr & 0x80000000) == 0) {
524 #if defined (DEBUG_MMU) 530 #if defined (DEBUG_MMU)
525 if (loglevel > 0) 531 if (loglevel > 0)
526 - fprintf(logfile, "pte segment: key=%d n=0x%08x\n", 532 + fprintf(logfile, "pte segment: key=%d n=0x" ADDRX "\n",
527 ctx->key, sr & 0x10000000); 533 ctx->key, sr & 0x10000000);
528 #endif 534 #endif
529 /* Check if instruction fetch is allowed, if needed */ 535 /* Check if instruction fetch is allowed, if needed */
@@ -550,9 +556,9 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx, @@ -550,9 +556,9 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
550 } else { 556 } else {
551 #if defined (DEBUG_MMU) 557 #if defined (DEBUG_MMU)
552 if (loglevel > 0) { 558 if (loglevel > 0) {
553 - fprintf(logfile, "0 sdr1=0x%08x vsid=0x%06x api=0x%04x "  
554 - "hash=0x%07x pg_addr=0x%08x\n", sdr, vsid, pgidx,  
555 - hash, ctx->pg_addr[0]); 559 + fprintf(logfile, "0 sdr1=0x" ADDRX " vsid=0x%06x "
  560 + "api=0x%04x hash=0x%07x pg_addr=0x" ADDRX "\n",
  561 + sdr, vsid, pgidx, hash, ctx->pg_addr[0]);
556 } 562 }
557 #endif 563 #endif
558 /* Primary table lookup */ 564 /* Primary table lookup */
@@ -562,9 +568,9 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx, @@ -562,9 +568,9 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
562 #if defined (DEBUG_MMU) 568 #if defined (DEBUG_MMU)
563 if (eaddr != 0xEFFFFFFF && loglevel > 0) { 569 if (eaddr != 0xEFFFFFFF && loglevel > 0) {
564 fprintf(logfile, 570 fprintf(logfile,
565 - "1 sdr1=0x%08x vsid=0x%06x api=0x%04x "  
566 - "hash=0x%05x pg_addr=0x%08x\n", sdr, vsid,  
567 - pgidx, hash, ctx->pg_addr[1]); 571 + "1 sdr1=0x" ADDRX " vsid=0x%06x api=0x%04x "
  572 + "hash=0x%05x pg_addr=0x" ADDRX "\n",
  573 + sdr, vsid, pgidx, hash, ctx->pg_addr[1]);
568 } 574 }
569 #endif 575 #endif
570 ret2 = find_pte(ctx, 1, rw); 576 ret2 = find_pte(ctx, 1, rw);
@@ -689,7 +695,7 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, @@ -689,7 +695,7 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
689 } 695 }
690 #if 0 696 #if 0
691 if (loglevel > 0) { 697 if (loglevel > 0) {
692 - fprintf(logfile, "%s address %08x => %08lx\n", 698 + fprintf(logfile, "%s address " ADDRX " => " ADDRX "\n",
693 __func__, eaddr, ctx->raddr); 699 __func__, eaddr, ctx->raddr);
694 } 700 }
695 #endif 701 #endif
@@ -864,7 +870,7 @@ static inline void do_invalidate_BAT (CPUPPCState *env, @@ -864,7 +870,7 @@ static inline void do_invalidate_BAT (CPUPPCState *env,
864 end = base + mask + 0x00020000; 870 end = base + mask + 0x00020000;
865 #if defined (DEBUG_BATS) 871 #if defined (DEBUG_BATS)
866 if (loglevel != 0) { 872 if (loglevel != 0) {
867 - fprintf(logfile, "Flush BAT from %08x to %08x (%08x)\n", 873 + fprintf(logfile, "Flush BAT from " ADDRX " to " ADDRX " (" ADDRX ")\n",
868 base, end, mask); 874 base, end, mask);
869 } 875 }
870 #endif 876 #endif
@@ -882,9 +888,8 @@ static inline void dump_store_bat (CPUPPCState *env, char ID, int ul, int nr, @@ -882,9 +888,8 @@ static inline void dump_store_bat (CPUPPCState *env, char ID, int ul, int nr,
882 { 888 {
883 #if defined (DEBUG_BATS) 889 #if defined (DEBUG_BATS)
884 if (loglevel != 0) { 890 if (loglevel != 0) {
885 - fprintf(logfile, "Set %cBAT%d%c to 0x%08lx (0x%08lx)\n",  
886 - ID, nr, ul == 0 ? 'u' : 'l', (unsigned long)value,  
887 - (unsigned long)env->nip); 891 + fprintf(logfile, "Set %cBAT%d%c to 0x" ADDRX " (0x" ADDRX ")\n",
  892 + ID, nr, ul == 0 ? 'u' : 'l', value, env->nip);
888 } 893 }
889 #endif 894 #endif
890 } 895 }
@@ -999,7 +1004,7 @@ void do_store_sdr1 (CPUPPCState *env, target_ulong value) @@ -999,7 +1004,7 @@ void do_store_sdr1 (CPUPPCState *env, target_ulong value)
999 { 1004 {
1000 #if defined (DEBUG_MMU) 1005 #if defined (DEBUG_MMU)
1001 if (loglevel != 0) { 1006 if (loglevel != 0) {
1002 - fprintf(logfile, "%s: 0x%08lx\n", __func__, (unsigned long)value); 1007 + fprintf(logfile, "%s: 0x" ADDRX "\n", __func__, value);
1003 } 1008 }
1004 #endif 1009 #endif
1005 if (env->sdr1 != value) { 1010 if (env->sdr1 != value) {
@@ -1017,8 +1022,8 @@ void do_store_sr (CPUPPCState *env, int srnum, target_ulong value) @@ -1017,8 +1022,8 @@ void do_store_sr (CPUPPCState *env, int srnum, target_ulong value)
1017 { 1022 {
1018 #if defined (DEBUG_MMU) 1023 #if defined (DEBUG_MMU)
1019 if (loglevel != 0) { 1024 if (loglevel != 0) {
1020 - fprintf(logfile, "%s: reg=%d 0x%08lx %08lx\n",  
1021 - __func__, srnum, (unsigned long)value, env->sr[srnum]); 1025 + fprintf(logfile, "%s: reg=%d 0x" ADDRX " " ADDRX "\n",
  1026 + __func__, srnum, value, env->sr[srnum]);
1022 } 1027 }
1023 #endif 1028 #endif
1024 if (env->sr[srnum] != value) { 1029 if (env->sr[srnum] != value) {
@@ -1227,7 +1232,7 @@ void do_interrupt (CPUState *env) @@ -1227,7 +1232,7 @@ void do_interrupt (CPUState *env)
1227 static void dump_syscall(CPUState *env) 1232 static void dump_syscall(CPUState *env)
1228 { 1233 {
1229 fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX 1234 fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX
1230 - " r5=0x" REGX " r6=0x" REGX " nip=0x" REGX "\n", 1235 + " r5=0x" REGX " r6=0x" REGX " nip=0x" ADDRX "\n",
1231 env->gpr[0], env->gpr[3], env->gpr[4], 1236 env->gpr[0], env->gpr[3], env->gpr[4],
1232 env->gpr[5], env->gpr[6], env->nip); 1237 env->gpr[5], env->gpr[6], env->nip);
1233 } 1238 }
@@ -1245,15 +1250,16 @@ void do_interrupt (CPUState *env) @@ -1245,15 +1250,16 @@ void do_interrupt (CPUState *env)
1245 #if defined (DEBUG_EXCEPTIONS) 1250 #if defined (DEBUG_EXCEPTIONS)
1246 if ((excp == EXCP_PROGRAM || excp == EXCP_DSI) && msr_pr == 1) { 1251 if ((excp == EXCP_PROGRAM || excp == EXCP_DSI) && msr_pr == 1) {
1247 if (loglevel != 0) { 1252 if (loglevel != 0) {
1248 - fprintf(logfile, "Raise exception at 0x%08lx => 0x%08x (%02x)\n",  
1249 - (unsigned long)env->nip, excp, env->error_code); 1253 + fprintf(logfile,
  1254 + "Raise exception at 0x" ADDRX " => 0x%08x (%02x)\n",
  1255 + env->nip, excp, env->error_code);
1250 cpu_dump_state(env, logfile, fprintf, 0); 1256 cpu_dump_state(env, logfile, fprintf, 0);
1251 } 1257 }
1252 } 1258 }
1253 #endif 1259 #endif
1254 if (loglevel & CPU_LOG_INT) { 1260 if (loglevel & CPU_LOG_INT) {
1255 - fprintf(logfile, "Raise exception at 0x%08lx => 0x%08x (%02x)\n",  
1256 - (unsigned long)env->nip, excp, env->error_code); 1261 + fprintf(logfile, "Raise exception at 0x" ADDRX " => 0x%08x (%02x)\n",
  1262 + env->nip, excp, env->error_code);
1257 } 1263 }
1258 msr_pow = 0; 1264 msr_pow = 0;
1259 /* Generate informations in save/restore registers */ 1265 /* Generate informations in save/restore registers */
@@ -1287,10 +1293,10 @@ void do_interrupt (CPUState *env) @@ -1287,10 +1293,10 @@ void do_interrupt (CPUState *env)
1287 msr &= ~0xFFFF0000; 1293 msr &= ~0xFFFF0000;
1288 #if defined (DEBUG_EXCEPTIONS) 1294 #if defined (DEBUG_EXCEPTIONS)
1289 if (loglevel) { 1295 if (loglevel) {
1290 - fprintf(logfile, "DSI exception: DSISR=0x%08x, DAR=0x%08x\n",  
1291 - env->spr[SPR_DSISR], env->spr[SPR_DAR]); 1296 + fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX
  1297 + "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]);
1292 } else { 1298 } else {
1293 - printf("DSI exception: DSISR=0x%08x, DAR=0x%08x\n", 1299 + printf("DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX "\n",
1294 env->spr[SPR_DSISR], env->spr[SPR_DAR]); 1300 env->spr[SPR_DSISR], env->spr[SPR_DAR]);
1295 } 1301 }
1296 #endif 1302 #endif
@@ -1301,8 +1307,8 @@ void do_interrupt (CPUState *env) @@ -1301,8 +1307,8 @@ void do_interrupt (CPUState *env)
1301 msr |= env->error_code; 1307 msr |= env->error_code;
1302 #if defined (DEBUG_EXCEPTIONS) 1308 #if defined (DEBUG_EXCEPTIONS)
1303 if (loglevel != 0) { 1309 if (loglevel != 0) {
1304 - fprintf(logfile, "ISI exception: msr=0x%08x, nip=0x%08x\n",  
1305 - msr, env->nip); 1310 + fprintf(logfile, "ISI exception: msr=0x" ADDRX ", nip=0x" ADDRX
  1311 + "\n", msr, env->nip);
1306 } 1312 }
1307 #endif 1313 #endif
1308 goto store_next; 1314 goto store_next;
@@ -1353,7 +1359,7 @@ void do_interrupt (CPUState *env) @@ -1353,7 +1359,7 @@ void do_interrupt (CPUState *env)
1353 env->fpscr[7] |= 0x4; 1359 env->fpscr[7] |= 0x4;
1354 break; 1360 break;
1355 case EXCP_INVAL: 1361 case EXCP_INVAL:
1356 - // printf("Invalid instruction at 0x%08x\n", env->nip); 1362 + // printf("Invalid instruction at 0x" ADDRX "\n", env->nip);
1357 msr |= 0x00080000; 1363 msr |= 0x00080000;
1358 break; 1364 break;
1359 case EXCP_PRIV: 1365 case EXCP_PRIV:
@@ -1556,8 +1562,9 @@ void do_interrupt (CPUState *env) @@ -1556,8 +1562,9 @@ void do_interrupt (CPUState *env)
1556 miss = &env->spr[SPR_DMISS]; 1562 miss = &env->spr[SPR_DMISS];
1557 cmp = &env->spr[SPR_DCMP]; 1563 cmp = &env->spr[SPR_DCMP];
1558 } 1564 }
1559 - fprintf(logfile, "6xx %sTLB miss: %cM %08x %cC %08x "  
1560 - "H1 %08x H2 %08x %08x\n", es, en, *miss, en, *cmp, 1565 + fprintf(logfile, "6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
  1566 + " H1 " ADDRX " H2 " ADDRX " " ADDRX "\n",
  1567 + es, en, *miss, en, *cmp,
1561 env->spr[SPR_HASH1], env->spr[SPR_HASH2], 1568 env->spr[SPR_HASH1], env->spr[SPR_HASH2],
1562 env->error_code); 1569 env->error_code);
1563 } 1570 }
target-ppc/translate.c
@@ -5374,7 +5374,7 @@ void cpu_dump_state(CPUState *env, FILE *f, @@ -5374,7 +5374,7 @@ void cpu_dump_state(CPUState *env, FILE *f,
5374 5374
5375 int i; 5375 int i;
5376 5376
5377 - cpu_fprintf(f, "NIP " REGX " LR " REGX " CTR " REGX "\n", 5377 + cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX "\n",
5378 env->nip, env->lr, env->ctr); 5378 env->nip, env->lr, env->ctr);
5379 cpu_fprintf(f, "MSR " REGX FILL " XER %08x " 5379 cpu_fprintf(f, "MSR " REGX FILL " XER %08x "
5380 #if !defined(NO_TIMER_DUMP) 5380 #if !defined(NO_TIMER_DUMP)
@@ -5545,7 +5545,7 @@ static inline int gen_intermediate_code_internal (CPUState *env, @@ -5545,7 +5545,7 @@ static inline int gen_intermediate_code_internal (CPUState *env,
5545 #if defined PPC_DEBUG_DISAS 5545 #if defined PPC_DEBUG_DISAS
5546 if (loglevel & CPU_LOG_TB_IN_ASM) { 5546 if (loglevel & CPU_LOG_TB_IN_ASM) {
5547 fprintf(logfile, "----------------\n"); 5547 fprintf(logfile, "----------------\n");
5548 - fprintf(logfile, "nip=%08x super=%d ir=%d\n", 5548 + fprintf(logfile, "nip=" ADDRX " super=%d ir=%d\n",
5549 ctx.nip, 1 - msr_pr, msr_ir); 5549 ctx.nip, 1 - msr_pr, msr_ir);
5550 } 5550 }
5551 #endif 5551 #endif
@@ -5578,12 +5578,12 @@ static inline int gen_intermediate_code_internal (CPUState *env, @@ -5578,12 +5578,12 @@ static inline int gen_intermediate_code_internal (CPUState *env,
5578 if (unlikely(handler->handler == &gen_invalid)) { 5578 if (unlikely(handler->handler == &gen_invalid)) {
5579 if (loglevel > 0) { 5579 if (loglevel > 0) {
5580 fprintf(logfile, "invalid/unsupported opcode: " 5580 fprintf(logfile, "invalid/unsupported opcode: "
5581 - "%02x - %02x - %02x (%08x) 0x" REGX " %d\n", 5581 + "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
5582 opc1(ctx.opcode), opc2(ctx.opcode), 5582 opc1(ctx.opcode), opc2(ctx.opcode),
5583 opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, msr_ir); 5583 opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, msr_ir);
5584 } else { 5584 } else {
5585 printf("invalid/unsupported opcode: " 5585 printf("invalid/unsupported opcode: "
5586 - "%02x - %02x - %02x (%08x) 0x" REGX " %d\n", 5586 + "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
5587 opc1(ctx.opcode), opc2(ctx.opcode), 5587 opc1(ctx.opcode), opc2(ctx.opcode),
5588 opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, msr_ir); 5588 opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, msr_ir);
5589 } 5589 }
@@ -5591,13 +5591,13 @@ static inline int gen_intermediate_code_internal (CPUState *env, @@ -5591,13 +5591,13 @@ static inline int gen_intermediate_code_internal (CPUState *env,
5591 if (unlikely((ctx.opcode & handler->inval) != 0)) { 5591 if (unlikely((ctx.opcode & handler->inval) != 0)) {
5592 if (loglevel > 0) { 5592 if (loglevel > 0) {
5593 fprintf(logfile, "invalid bits: %08x for opcode: " 5593 fprintf(logfile, "invalid bits: %08x for opcode: "
5594 - "%02x -%02x - %02x (%08x) " REGX "\n", 5594 + "%02x -%02x - %02x (%08x) 0x" ADDRX "\n",
5595 ctx.opcode & handler->inval, opc1(ctx.opcode), 5595 ctx.opcode & handler->inval, opc1(ctx.opcode),
5596 opc2(ctx.opcode), opc3(ctx.opcode), 5596 opc2(ctx.opcode), opc3(ctx.opcode),
5597 ctx.opcode, ctx.nip - 4); 5597 ctx.opcode, ctx.nip - 4);
5598 } else { 5598 } else {
5599 printf("invalid bits: %08x for opcode: " 5599 printf("invalid bits: %08x for opcode: "
5600 - "%02x -%02x - %02x (%08x) " REGX "\n", 5600 + "%02x -%02x - %02x (%08x) 0x" ADDRX "\n",
5601 ctx.opcode & handler->inval, opc1(ctx.opcode), 5601 ctx.opcode & handler->inval, opc1(ctx.opcode),
5602 opc2(ctx.opcode), opc3(ctx.opcode), 5602 opc2(ctx.opcode), opc3(ctx.opcode),
5603 ctx.opcode, ctx.nip - 4); 5603 ctx.opcode, ctx.nip - 4);
target-ppc/translate_init.c
@@ -378,7 +378,7 @@ static inline void spr_register (CPUPPCState *env, int num, @@ -378,7 +378,7 @@ static inline void spr_register (CPUPPCState *env, int num,
378 exit(1); 378 exit(1);
379 } 379 }
380 #if defined(PPC_DEBUG_SPR) 380 #if defined(PPC_DEBUG_SPR)
381 - printf("*** register spr %d (%03x) %s val " REGX "\n", num, num, name, 381 + printf("*** register spr %d (%03x) %s val " ADDRX "\n", num, num, name,
382 initial_value); 382 initial_value);
383 #endif 383 #endif
384 spr->name = name; 384 spr->name = name;
@@ -2424,7 +2424,7 @@ static int create_ppc_opcodes (CPUPPCState *env, ppc_def_t *def) @@ -2424,7 +2424,7 @@ static int create_ppc_opcodes (CPUPPCState *env, ppc_def_t *def)
2424 2424
2425 fill_new_table(env->opcodes, 0x40); 2425 fill_new_table(env->opcodes, 0x40);
2426 #if defined(PPC_DUMP_CPU) 2426 #if defined(PPC_DUMP_CPU)
2427 - printf("* PowerPC instructions for PVR %08x: %s flags %016 " PRIx64 2427 + printf("* PowerPC instructions for PVR %08x: %s flags %016" PRIx64
2428 " %08x\n", 2428 " %08x\n",
2429 def->pvr, def->name, def->insns_flags, def->flags); 2429 def->pvr, def->name, def->insns_flags, def->flags);
2430 #endif 2430 #endif