Commit 1b581c440b0545afd5143cc38f86383c23cc8d48
1 parent
f24cb33e
target-alpha: use the new TCG logical operations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5502 c046a42c-6fe2-441c-8c8c-71466251a162
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1 changed file
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6 additions
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18 deletions
target-alpha/translate.c
| @@ -940,12 +940,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) | @@ -940,12 +940,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) | ||
| 940 | if (ra != 31) { | 940 | if (ra != 31) { |
| 941 | if (islit) | 941 | if (islit) |
| 942 | tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[ra], ~lit); | 942 | tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[ra], ~lit); |
| 943 | - else { | ||
| 944 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | ||
| 945 | - tcg_gen_not_i64(tmp, cpu_ir[rb]); | ||
| 946 | - tcg_gen_and_i64(cpu_ir[rc], cpu_ir[ra], tmp); | ||
| 947 | - tcg_temp_free(tmp); | ||
| 948 | - } | 943 | + else |
| 944 | + tcg_gen_andc_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | ||
| 949 | } else | 945 | } else |
| 950 | tcg_gen_movi_i64(cpu_ir[rc], 0); | 946 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
| 951 | } | 947 | } |
| @@ -988,12 +984,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) | @@ -988,12 +984,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) | ||
| 988 | if (ra != 31) { | 984 | if (ra != 31) { |
| 989 | if (islit) | 985 | if (islit) |
| 990 | tcg_gen_ori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); | 986 | tcg_gen_ori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); |
| 991 | - else { | ||
| 992 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | ||
| 993 | - tcg_gen_not_i64(tmp, cpu_ir[rb]); | ||
| 994 | - tcg_gen_or_i64(cpu_ir[rc], cpu_ir[ra], tmp); | ||
| 995 | - tcg_temp_free(tmp); | ||
| 996 | - } | 987 | + else |
| 988 | + tcg_gen_orc_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | ||
| 997 | } else { | 989 | } else { |
| 998 | if (islit) | 990 | if (islit) |
| 999 | tcg_gen_movi_i64(cpu_ir[rc], ~lit); | 991 | tcg_gen_movi_i64(cpu_ir[rc], ~lit); |
| @@ -1032,12 +1024,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) | @@ -1032,12 +1024,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) | ||
| 1032 | if (ra != 31) { | 1024 | if (ra != 31) { |
| 1033 | if (islit) | 1025 | if (islit) |
| 1034 | tcg_gen_xori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); | 1026 | tcg_gen_xori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); |
| 1035 | - else { | ||
| 1036 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | ||
| 1037 | - tcg_gen_not_i64(tmp, cpu_ir[rb]); | ||
| 1038 | - tcg_gen_xor_i64(cpu_ir[rc], cpu_ir[ra], tmp); | ||
| 1039 | - tcg_temp_free(tmp); | ||
| 1040 | - } | 1027 | + else |
| 1028 | + tcg_gen_eqv_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | ||
| 1041 | } else { | 1029 | } else { |
| 1042 | if (islit) | 1030 | if (islit) |
| 1043 | tcg_gen_movi_i64(cpu_ir[rc], ~lit); | 1031 | tcg_gen_movi_i64(cpu_ir[rc], ~lit); |