gwj / at91sam9263 · Commits

Commit 1b1a38b0aaf3a24b9b8162d8aef9e700a42f8d43

Authored by edgar_igl
1 parent 5bf8f1ab

CRIS: Emulate NMIs. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4719 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 28 additions and 16 deletions
cpu-exec.c
  View file @1b1a38b
... ... @@ -501,7 +501,15 @@ int cpu_exec(CPUState *env1)
501 501 next_tb = 0;
502 502 }
503 503 #elif defined(TARGET_CRIS)
504   - if (interrupt_request & CPU_INTERRUPT_HARD) {
  504 + if (interrupt_request & CPU_INTERRUPT_HARD
  505 + && (env->pregs[PR_CCS] & I_FLAG)) {
  506 + env->exception_index = EXCP_IRQ;
  507 + do_interrupt(env);
  508 + next_tb = 0;
  509 + }
  510 + if (interrupt_request & CPU_INTERRUPT_NMI
  511 + && (env->pregs[PR_CCS] & M_FLAG)) {
  512 + env->exception_index = EXCP_NMI;
505 513 do_interrupt(env);
506 514 next_tb = 0;
507 515 }
... ...
target-cris/cpu.h
  View file @1b1a38b
... ... @@ -29,12 +29,11 @@
29 29  
30 30 #define ELF_MACHINE EM_CRIS
31 31  
32   -#define EXCP_MMU_EXEC 0
33   -#define EXCP_MMU_READ 1
34   -#define EXCP_MMU_WRITE 2
35   -#define EXCP_MMU_FLUSH 3
36   -#define EXCP_MMU_FAULT 4
37   -#define EXCP_BREAK 16 /* trap. */
  32 +#define EXCP_NMI 1
  33 +#define EXCP_GURU 2
  34 +#define EXCP_BUSFAULT 3
  35 +#define EXCP_IRQ 4
  36 +#define EXCP_BREAK 5
38 37  
39 38 /* Register aliases. R0 - R15 */
40 39 #define R_FP 8
... ... @@ -54,11 +53,14 @@
54 53 #define PR_EBP 9
55 54 #define PR_ERP 10
56 55 #define PR_SRP 11
  56 +#define PR_NRP 12
57 57 #define PR_CCS 13
58 58 #define PR_USP 14
59 59 #define PR_SPC 15
60 60  
61 61 /* CPU flags. */
  62 +#define Q_FLAG 0x80000000
  63 +#define M_FLAG 0x40000000
62 64 #define S_FLAG 0x200
63 65 #define R_FLAG 0x100
64 66 #define P_FLAG 0x80
... ... @@ -154,7 +156,6 @@ typedef struct CPUCRISState {
154 156 uint32_t lo;
155 157 } tlbsets[2][4][16];
156 158  
157   - int features;
158 159 int user_mode_only;
159 160  
160 161 CPU_COMMON
... ...
target-cris/helper.c
  View file @1b1a38b
... ... @@ -78,13 +78,13 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
78 78 miss = cris_mmu_translate(&res, env, address, rw, mmu_idx);
79 79 if (miss)
80 80 {
81   - if (env->exception_index == EXCP_MMU_FAULT)
  81 + if (env->exception_index == EXCP_BUSFAULT)
82 82 cpu_abort(env,
83 83 "CRIS: Illegal recursive bus fault."
84 84 "addr=%x rw=%d\n",
85 85 address, rw);
86 86  
87   - env->exception_index = EXCP_MMU_FAULT;
  87 + env->exception_index = EXCP_BUSFAULT;
88 88 env->fault_vector = res.bf_vec;
89 89 r = 1;
90 90 }
... ... @@ -120,17 +120,20 @@ void do_interrupt(CPUState *env)
120 120 env->pregs[PR_ERP] = env->pc + 2;
121 121 break;
122 122  
123   - case EXCP_MMU_FAULT:
  123 + case EXCP_NMI:
  124 + /* NMI is hardwired to vector zero. */
  125 + ex_vec = 0;
  126 + env->pregs[PR_CCS] &= ~M_FLAG;
  127 + env->pregs[PR_NRP] = env->pc;
  128 + break;
  129 +
  130 + case EXCP_BUSFAULT:
124 131 ex_vec = env->fault_vector;
125 132 env->pregs[PR_ERP] = env->pc;
126 133 break;
127 134  
128 135 default:
129   - /* Is the core accepting interrupts? */
130   - if (!(env->pregs[PR_CCS] & I_FLAG))
131   - return;
132   - /* The interrupt controller gives us the
133   - vector. */
  136 + /* The interrupt controller gives us the vector. */
134 137 ex_vec = env->interrupt_vector;
135 138 /* Normal interrupts are taken between
136 139 TB's. env->pc is valid here. */
... ...