gwj / at91sam9263 · Commits

Commit 1ade1de2237ca43c101117130ec41b5bdfbeeeab

Authored by bellard
1 parent b0bda528

pmac macio based ide support 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@952 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 139 additions and 0 deletions
hw/ide.c
  View file @1ade1de
... ... @@ -297,6 +297,7 @@ typedef struct IDEState {
297 297 int64_t nb_sectors;
298 298 int mult_sectors;
299 299 int irq;
  300 + openpic_t *openpic;
300 301 PCIDevice *pci_dev;
301 302 int drive_serial;
302 303 /* ide regs */
... ... @@ -464,6 +465,11 @@ static inline void ide_abort_command(IDEState *s)
464 465 static inline void ide_set_irq(IDEState *s)
465 466 {
466 467 if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
  468 +#ifdef TARGET_PPC
  469 + if (s->openpic)
  470 + openpic_set_irq(s->openpic, s->irq, 1);
  471 + else
  472 +#endif
467 473 if (s->irq == 16)
468 474 pci_set_irq(s->pci_dev, 0, 1);
469 475 else
... ... @@ -1281,6 +1287,11 @@ static uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
1281 1287 ret = 0;
1282 1288 else
1283 1289 ret = s->status;
  1290 +#ifdef TARGET_PPC
  1291 + if (s->openpic)
  1292 + openpic_set_irq(s->openpic, s->irq, 0);
  1293 + else
  1294 +#endif
1284 1295 if (s->irq == 16)
1285 1296 pci_set_irq(s->pci_dev, 0, 0);
1286 1297 else
... ... @@ -1635,3 +1646,131 @@ void pci_piix3_ide_init(BlockDriverState **hd_table)
1635 1646 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
1636 1647 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
1637 1648 }
  1649 +
  1650 +/***********************************************************/
  1651 +/* MacIO based PowerPC IDE */
  1652 +
  1653 +/* PowerMac IDE memory IO */
  1654 +static void pmac_ide_writeb (void *opaque,
  1655 + target_phys_addr_t addr, uint32_t val)
  1656 +{
  1657 + addr = (addr & 0xFFF) >> 4;
  1658 + switch (addr) {
  1659 + case 1 ... 7:
  1660 + ide_ioport_write(opaque, addr, val);
  1661 + break;
  1662 + case 8:
  1663 + case 22:
  1664 + ide_cmd_write(opaque, 0, val);
  1665 + break;
  1666 + default:
  1667 + break;
  1668 + }
  1669 +}
  1670 +
  1671 +static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr)
  1672 +{
  1673 + uint8_t retval;
  1674 +
  1675 + addr = (addr & 0xFFF) >> 4;
  1676 + switch (addr) {
  1677 + case 1 ... 7:
  1678 + retval = ide_ioport_read(opaque, addr);
  1679 + break;
  1680 + case 8:
  1681 + case 22:
  1682 + retval = ide_status_read(opaque, 0);
  1683 + break;
  1684 + default:
  1685 + retval = 0xFF;
  1686 + break;
  1687 + }
  1688 + return retval;
  1689 +}
  1690 +
  1691 +static void pmac_ide_writew (void *opaque,
  1692 + target_phys_addr_t addr, uint32_t val)
  1693 +{
  1694 + addr = (addr & 0xFFF) >> 4;
  1695 +#ifdef TARGET_WORDS_BIGENDIAN
  1696 + val = bswap16(val);
  1697 +#endif
  1698 + if (addr == 0) {
  1699 + ide_data_writew(opaque, 0, val);
  1700 + }
  1701 +}
  1702 +
  1703 +static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)
  1704 +{
  1705 + uint16_t retval;
  1706 +
  1707 + addr = (addr & 0xFFF) >> 4;
  1708 + if (addr == 0) {
  1709 + retval = ide_data_readw(opaque, 0);
  1710 + } else {
  1711 + retval = 0xFFFF;
  1712 + }
  1713 +#ifdef TARGET_WORDS_BIGENDIAN
  1714 + retval = bswap16(retval);
  1715 +#endif
  1716 + return retval;
  1717 +}
  1718 +
  1719 +static void pmac_ide_writel (void *opaque,
  1720 + target_phys_addr_t addr, uint32_t val)
  1721 +{
  1722 + addr = (addr & 0xFFF) >> 4;
  1723 +#ifdef TARGET_WORDS_BIGENDIAN
  1724 + val = bswap32(val);
  1725 +#endif
  1726 + if (addr == 0) {
  1727 + ide_data_writel(opaque, 0, val);
  1728 + }
  1729 +}
  1730 +
  1731 +static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
  1732 +{
  1733 + uint32_t retval;
  1734 +
  1735 + addr = (addr & 0xFFF) >> 4;
  1736 + if (addr == 0) {
  1737 + retval = ide_data_readl(opaque, 0);
  1738 + } else {
  1739 + retval = 0xFFFFFFFF;
  1740 + }
  1741 +#ifdef TARGET_WORDS_BIGENDIAN
  1742 + retval = bswap32(retval);
  1743 +#endif
  1744 + return retval;
  1745 +}
  1746 +
  1747 +static CPUWriteMemoryFunc *pmac_ide_write[] = {
  1748 + pmac_ide_writeb,
  1749 + pmac_ide_writew,
  1750 + pmac_ide_writel,
  1751 +};
  1752 +
  1753 +static CPUReadMemoryFunc *pmac_ide_read[] = {
  1754 + pmac_ide_readb,
  1755 + pmac_ide_readw,
  1756 + pmac_ide_readl,
  1757 +};
  1758 +
  1759 +/* hd_table must contain 4 block drivers */
  1760 +/* PowerMac uses memory mapped registers, not I/O. Return the memory
  1761 + I/O index to access the ide. */
  1762 +int pmac_ide_init (BlockDriverState **hd_table,
  1763 + openpic_t *openpic, int irq)
  1764 +{
  1765 + IDEState *ide_if;
  1766 + int pmac_ide_memory;
  1767 +
  1768 + ide_if = qemu_mallocz(sizeof(IDEState) * 2);
  1769 + ide_init2(&ide_if[0], irq, hd_table[0], hd_table[1]);
  1770 + ide_if[0].openpic = openpic;
  1771 + ide_if[1].openpic = openpic;
  1772 +
  1773 + pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
  1774 + pmac_ide_write, &ide_if[0]);
  1775 + return pmac_ide_memory;
  1776 +}
... ...