Commit 1ad2134f914dfd4c8f92307c94c9a5a1e28f0059
1 parent
8a637d44
Hardware convenience library
The only target dependency for most hardware is sizeof(target_phys_addr_t). Build these files into a convenience library, and use that instead of building for every target. Remove and poison various target specific macros to avoid bogus target dependencies creeping back in. Big/Little endian is not handled because devices should not know or care about this to start with. Signed-off-by: Paul Brook <paul@codesourcery.com>
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18 changed files
with
248 additions
and
133 deletions
.gitignore
Makefile
| 1 | 1 | # Makefile for QEMU. |
| 2 | 2 | |
| 3 | 3 | ifneq ($(wildcard config-host.mak),) |
| 4 | +# Put the all: rule here so that config-host.mak can contain dependencies. | |
| 5 | +all: build-all | |
| 4 | 6 | include config-host.mak |
| 5 | 7 | include $(SRC_PATH)/rules.mak |
| 6 | 8 | else |
| ... | ... | @@ -41,7 +43,7 @@ ifdef CONFIG_WIN32 |
| 41 | 43 | LIBS+=-lwinmm -lws2_32 -liphlpapi |
| 42 | 44 | endif |
| 43 | 45 | |
| 44 | -all: $(TOOLS) $(DOCS) recurse-all | |
| 46 | +build-all: $(TOOLS) $(DOCS) recurse-all | |
| 45 | 47 | |
| 46 | 48 | config-host.mak: configure |
| 47 | 49 | ifneq ($(wildcard config-host.mak),) |
| ... | ... | @@ -237,14 +239,14 @@ clean: |
| 237 | 239 | rm -f *.o *.d *.a $(TOOLS) TAGS cscope.* *.pod *~ */*~ |
| 238 | 240 | rm -f slirp/*.o slirp/*.d audio/*.o audio/*.d block/*.o block/*.d |
| 239 | 241 | $(MAKE) -C tests clean |
| 240 | - for d in $(TARGET_DIRS); do \ | |
| 242 | + for d in $(TARGET_DIRS) libhw32 libhw64; do \ | |
| 241 | 243 | $(MAKE) -C $$d $@ || exit 1 ; \ |
| 242 | 244 | done |
| 243 | 245 | |
| 244 | 246 | distclean: clean |
| 245 | 247 | rm -f config-host.mak config-host.h $(DOCS) qemu-options.texi |
| 246 | 248 | rm -f qemu-{doc,tech}.{info,aux,cp,dvi,fn,info,ky,log,pg,toc,tp,vr} |
| 247 | - for d in $(TARGET_DIRS); do \ | |
| 249 | + for d in $(TARGET_DIRS) libhw32 libhw64; do \ | |
| 248 | 250 | rm -rf $$d || exit 1 ; \ |
| 249 | 251 | done |
| 250 | 252 | ... | ... |
Makefile.hw
0 → 100644
| 1 | +# Makefile for qemu target independent devices. | |
| 2 | + | |
| 3 | +include config.mak | |
| 4 | +include ../config-host.mak | |
| 5 | +include $(SRC_PATH)/rules.mak | |
| 6 | + | |
| 7 | +.PHONY: all | |
| 8 | + | |
| 9 | +VPATH=$(SRC_PATH):$(SRC_PATH)/hw | |
| 10 | + | |
| 11 | +CFLAGS += $(OS_CFLAGS) $(ARCH_CFLAGS) | |
| 12 | +LDFLAGS += $(OS_LDFLAGS) $(ARCH_LDFLAGS) | |
| 13 | + | |
| 14 | +CPPFLAGS += -I. -I$(SRC_PATH) -MMD -MP -MT $@ | |
| 15 | +CPPFLAGS += -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE | |
| 16 | +CPPFLAGS+=-I$(SRC_PATH)/fpu | |
| 17 | + | |
| 18 | +OBJS= | |
| 19 | +OBJS+= virtio.o virtio-pci.o | |
| 20 | +OBJS+= fw_cfg.o | |
| 21 | +OBJS+= watchdog.o | |
| 22 | +OBJS+= nand.o ecc.o | |
| 23 | + | |
| 24 | +OBJS+= m48t59.o | |
| 25 | + | |
| 26 | +OBJS+= dma-helpers.o sysbus.o | |
| 27 | + | |
| 28 | +all: $(HWLIB) | |
| 29 | + | |
| 30 | +$(HWLIB): $(OBJS) | |
| 31 | + | |
| 32 | +clean: | |
| 33 | + rm -f *.o *.d *.a *~ | |
| 34 | + | |
| 35 | +# Include automatically generated dependency files | |
| 36 | +-include $(wildcard *.d */*.d) | ... | ... |
Makefile.target
| ... | ... | @@ -485,13 +485,11 @@ endif #CONFIG_BSD_USER |
| 485 | 485 | # System emulator target |
| 486 | 486 | ifndef CONFIG_USER_ONLY |
| 487 | 487 | |
| 488 | -OBJS=vl.o osdep.o monitor.o pci.o loader.o isa_mmio.o machine.o dma-helpers.o \ | |
| 489 | - gdbstub.o gdbstub-xml.o sysbus.o | |
| 488 | +OBJS=vl.o osdep.o monitor.o pci.o loader.o isa_mmio.o machine.o \ | |
| 489 | + gdbstub.o gdbstub-xml.o | |
| 490 | 490 | # virtio has to be here due to weird dependency between PCI and virtio-net. |
| 491 | 491 | # need to fix this properly |
| 492 | -OBJS+=virtio.o virtio-pci.o | |
| 493 | 492 | OBJS+=virtio-blk.o virtio-balloon.o virtio-net.o virtio-console.o |
| 494 | -OBJS+=fw_cfg.o | |
| 495 | 493 | ifdef CONFIG_KVM |
| 496 | 494 | OBJS+=kvm.o kvm-all.o |
| 497 | 495 | endif |
| ... | ... | @@ -564,7 +562,6 @@ OBJS += rtl8139.o |
| 564 | 562 | OBJS += e1000.o |
| 565 | 563 | |
| 566 | 564 | # Generic watchdog support and some watchdog devices |
| 567 | -OBJS += watchdog.o | |
| 568 | 565 | OBJS += wdt_ib700.o wdt_i6300esb.o |
| 569 | 566 | |
| 570 | 567 | ifeq ($(TARGET_BASE_ARCH), i386) |
| ... | ... | @@ -581,7 +578,7 @@ CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE |
| 581 | 578 | # shared objects |
| 582 | 579 | OBJS+= ppc.o ide.o vga.o $(SOUND_HW) dma.o openpic.o |
| 583 | 580 | # PREP target |
| 584 | -OBJS+= pckbd.o serial.o i8259.o i8254.o fdc.o m48t59.o mc146818rtc.o | |
| 581 | +OBJS+= pckbd.o serial.o i8259.o i8254.o fdc.o mc146818rtc.o | |
| 585 | 582 | OBJS+= prep_pci.o ppc_prep.o |
| 586 | 583 | # Mac shared devices |
| 587 | 584 | OBJS+= macio.o cuda.o adb.o mac_nvram.o mac_dbdma.o escc.o |
| ... | ... | @@ -624,15 +621,15 @@ OBJS+= etraxfs_eth.o |
| 624 | 621 | OBJS+= etraxfs_timer.o |
| 625 | 622 | OBJS+= etraxfs_ser.o |
| 626 | 623 | |
| 627 | -OBJS+= pflash_cfi02.o nand.o | |
| 624 | +OBJS+= pflash_cfi02.o | |
| 628 | 625 | endif |
| 629 | 626 | ifeq ($(TARGET_BASE_ARCH), sparc) |
| 630 | 627 | ifeq ($(TARGET_ARCH), sparc64) |
| 631 | 628 | OBJS+= sun4u.o ide.o pckbd.o vga.o apb_pci.o |
| 632 | -OBJS+= fdc.o mc146818rtc.o serial.o m48t59.o | |
| 629 | +OBJS+= fdc.o mc146818rtc.o serial.o | |
| 633 | 630 | OBJS+= cirrus_vga.o parallel.o |
| 634 | 631 | else |
| 635 | -OBJS+= sun4m.o tcx.o iommu.o m48t59.o slavio_intctl.o | |
| 632 | +OBJS+= sun4m.o tcx.o iommu.o slavio_intctl.o | |
| 636 | 633 | OBJS+= slavio_timer.o escc.o slavio_misc.o fdc.o sparc32_dma.o |
| 637 | 634 | OBJS+= cs4231.o eccmemctl.o sbi.o sun4c_intctl.o |
| 638 | 635 | endif |
| ... | ... | @@ -648,7 +645,7 @@ OBJS+= arm-semi.o |
| 648 | 645 | OBJS+= pxa2xx.o pxa2xx_pic.o pxa2xx_gpio.o pxa2xx_timer.o pxa2xx_dma.o |
| 649 | 646 | OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o pxa2xx_keypad.o |
| 650 | 647 | OBJS+= pflash_cfi01.o gumstix.o |
| 651 | -OBJS+= zaurus.o ide.o serial.o nand.o ecc.o spitz.o tosa.o tc6393xb.o | |
| 648 | +OBJS+= zaurus.o ide.o serial.o spitz.o tosa.o tc6393xb.o | |
| 652 | 649 | OBJS+= omap1.o omap_lcdc.o omap_dma.o omap_clk.o omap_mmc.o omap_i2c.o |
| 653 | 650 | OBJS+= omap2.o omap_dss.o soc_dma.o |
| 654 | 651 | OBJS+= omap_sx1.o palm.o tsc210x.o |
| ... | ... | @@ -717,8 +714,8 @@ endif |
| 717 | 714 | vl.o: qemu-options.h |
| 718 | 715 | |
| 719 | 716 | $(QEMU_PROG): LIBS += $(SDL_LIBS) $(COCOA_LIBS) $(CURSES_LIBS) $(BRLAPI_LIBS) $(VDE_LIBS) |
| 720 | -$(QEMU_PROG): ARLIBS=../libqemu_common.a libqemu.a | |
| 721 | -$(QEMU_PROG): $(OBJS) ../libqemu_common.a libqemu.a | |
| 717 | +$(QEMU_PROG): ARLIBS=../libqemu_common.a libqemu.a $(HWLIB) | |
| 718 | +$(QEMU_PROG): $(OBJS) ../libqemu_common.a libqemu.a $(HWLIB) | |
| 722 | 719 | $(call LINK,$(OBJS)) |
| 723 | 720 | |
| 724 | 721 | endif # !CONFIG_USER_ONLY | ... | ... |
configure
| ... | ... | @@ -1724,6 +1724,7 @@ fi |
| 1724 | 1724 | echo "TOOLS=$tools" >> $config_mak |
| 1725 | 1725 | |
| 1726 | 1726 | test -f ${config_h}~ && cmp -s $config_h ${config_h}~ && mv ${config_h}~ $config_h |
| 1727 | +config_host_mak=${config_mak} | |
| 1727 | 1728 | |
| 1728 | 1729 | for target in $target_list; do |
| 1729 | 1730 | target_dir="$target" |
| ... | ... | @@ -1844,6 +1845,7 @@ case "$target_cpu" in |
| 1844 | 1845 | echo "CONFIG_XEN=yes" >> $config_mak |
| 1845 | 1846 | echo "#define CONFIG_XEN 1" >> $config_h |
| 1846 | 1847 | fi |
| 1848 | + target_phys_bits=32 | |
| 1847 | 1849 | ;; |
| 1848 | 1850 | x86_64) |
| 1849 | 1851 | echo "TARGET_ARCH=x86_64" >> $config_mak |
| ... | ... | @@ -1865,11 +1867,13 @@ case "$target_cpu" in |
| 1865 | 1867 | echo "CONFIG_XEN=yes" >> $config_mak |
| 1866 | 1868 | echo "#define CONFIG_XEN 1" >> $config_h |
| 1867 | 1869 | fi |
| 1870 | + target_phys_bits=64 | |
| 1868 | 1871 | ;; |
| 1869 | 1872 | alpha) |
| 1870 | 1873 | echo "TARGET_ARCH=alpha" >> $config_mak |
| 1871 | 1874 | echo "#define TARGET_ARCH \"alpha\"" >> $config_h |
| 1872 | 1875 | echo "#define TARGET_ALPHA 1" >> $config_h |
| 1876 | + target_phys_bits=64 | |
| 1873 | 1877 | ;; |
| 1874 | 1878 | arm|armeb) |
| 1875 | 1879 | echo "TARGET_ARCH=arm" >> $config_mak |
| ... | ... | @@ -1878,12 +1882,14 @@ case "$target_cpu" in |
| 1878 | 1882 | bflt="yes" |
| 1879 | 1883 | target_nptl="yes" |
| 1880 | 1884 | gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml" |
| 1885 | + target_phys_bits=32 | |
| 1881 | 1886 | ;; |
| 1882 | 1887 | cris) |
| 1883 | 1888 | echo "TARGET_ARCH=cris" >> $config_mak |
| 1884 | 1889 | echo "#define TARGET_ARCH \"cris\"" >> $config_h |
| 1885 | 1890 | echo "#define TARGET_CRIS 1" >> $config_h |
| 1886 | 1891 | target_nptl="yes" |
| 1892 | + target_phys_bits=32 | |
| 1887 | 1893 | ;; |
| 1888 | 1894 | m68k) |
| 1889 | 1895 | echo "TARGET_ARCH=m68k" >> $config_mak |
| ... | ... | @@ -1891,18 +1897,21 @@ case "$target_cpu" in |
| 1891 | 1897 | echo "#define TARGET_M68K 1" >> $config_h |
| 1892 | 1898 | bflt="yes" |
| 1893 | 1899 | gdb_xml_files="cf-core.xml cf-fp.xml" |
| 1900 | + target_phys_bits=32 | |
| 1894 | 1901 | ;; |
| 1895 | 1902 | mips|mipsel) |
| 1896 | 1903 | echo "TARGET_ARCH=mips" >> $config_mak |
| 1897 | 1904 | echo "#define TARGET_ARCH \"mips\"" >> $config_h |
| 1898 | 1905 | echo "#define TARGET_MIPS 1" >> $config_h |
| 1899 | 1906 | echo "#define TARGET_ABI_MIPSO32 1" >> $config_h |
| 1907 | + target_phys_bits=64 | |
| 1900 | 1908 | ;; |
| 1901 | 1909 | mipsn32|mipsn32el) |
| 1902 | 1910 | echo "TARGET_ARCH=mipsn32" >> $config_mak |
| 1903 | 1911 | echo "#define TARGET_ARCH \"mipsn32\"" >> $config_h |
| 1904 | 1912 | echo "#define TARGET_MIPS 1" >> $config_h |
| 1905 | 1913 | echo "#define TARGET_ABI_MIPSN32 1" >> $config_h |
| 1914 | + target_phys_bits=64 | |
| 1906 | 1915 | ;; |
| 1907 | 1916 | mips64|mips64el) |
| 1908 | 1917 | echo "TARGET_ARCH=mips64" >> $config_mak |
| ... | ... | @@ -1910,12 +1919,14 @@ case "$target_cpu" in |
| 1910 | 1919 | echo "#define TARGET_MIPS 1" >> $config_h |
| 1911 | 1920 | echo "#define TARGET_MIPS64 1" >> $config_h |
| 1912 | 1921 | echo "#define TARGET_ABI_MIPSN64 1" >> $config_h |
| 1922 | + target_phys_bits=64 | |
| 1913 | 1923 | ;; |
| 1914 | 1924 | ppc) |
| 1915 | 1925 | echo "TARGET_ARCH=ppc" >> $config_mak |
| 1916 | 1926 | echo "#define TARGET_ARCH \"ppc\"" >> $config_h |
| 1917 | 1927 | echo "#define TARGET_PPC 1" >> $config_h |
| 1918 | 1928 | gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml power-spe.xml" |
| 1929 | + target_phys_bits=32 | |
| 1919 | 1930 | ;; |
| 1920 | 1931 | ppcemb) |
| 1921 | 1932 | echo "TARGET_ARCH=ppcemb" >> $config_mak |
| ... | ... | @@ -1929,6 +1940,7 @@ case "$target_cpu" in |
| 1929 | 1940 | echo "#define CONFIG_KVM 1" >> $config_h |
| 1930 | 1941 | fi |
| 1931 | 1942 | gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml power-spe.xml" |
| 1943 | + target_phys_bits=64 | |
| 1932 | 1944 | ;; |
| 1933 | 1945 | ppc64) |
| 1934 | 1946 | echo "TARGET_ARCH=ppc64" >> $config_mak |
| ... | ... | @@ -1937,6 +1949,7 @@ case "$target_cpu" in |
| 1937 | 1949 | echo "#define TARGET_PPC 1" >> $config_h |
| 1938 | 1950 | echo "#define TARGET_PPC64 1" >> $config_h |
| 1939 | 1951 | gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" |
| 1952 | + target_phys_bits=64 | |
| 1940 | 1953 | ;; |
| 1941 | 1954 | ppc64abi32) |
| 1942 | 1955 | echo "TARGET_ARCH=ppc64" >> $config_mak |
| ... | ... | @@ -1947,6 +1960,7 @@ case "$target_cpu" in |
| 1947 | 1960 | echo "#define TARGET_PPC64 1" >> $config_h |
| 1948 | 1961 | echo "#define TARGET_ABI32 1" >> $config_h |
| 1949 | 1962 | gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" |
| 1963 | + target_phys_bits=64 | |
| 1950 | 1964 | ;; |
| 1951 | 1965 | sh4|sh4eb) |
| 1952 | 1966 | echo "TARGET_ARCH=sh4" >> $config_mak |
| ... | ... | @@ -1954,11 +1968,13 @@ case "$target_cpu" in |
| 1954 | 1968 | echo "#define TARGET_SH4 1" >> $config_h |
| 1955 | 1969 | bflt="yes" |
| 1956 | 1970 | target_nptl="yes" |
| 1971 | + target_phys_bits=32 | |
| 1957 | 1972 | ;; |
| 1958 | 1973 | sparc) |
| 1959 | 1974 | echo "TARGET_ARCH=sparc" >> $config_mak |
| 1960 | 1975 | echo "#define TARGET_ARCH \"sparc\"" >> $config_h |
| 1961 | 1976 | echo "#define TARGET_SPARC 1" >> $config_h |
| 1977 | + target_phys_bits=64 | |
| 1962 | 1978 | ;; |
| 1963 | 1979 | sparc64) |
| 1964 | 1980 | echo "TARGET_ARCH=sparc64" >> $config_mak |
| ... | ... | @@ -1966,6 +1982,7 @@ case "$target_cpu" in |
| 1966 | 1982 | echo "#define TARGET_SPARC 1" >> $config_h |
| 1967 | 1983 | echo "#define TARGET_SPARC64 1" >> $config_h |
| 1968 | 1984 | elfload32="yes" |
| 1985 | + target_phys_bits=64 | |
| 1969 | 1986 | ;; |
| 1970 | 1987 | sparc32plus) |
| 1971 | 1988 | echo "TARGET_ARCH=sparc64" >> $config_mak |
| ... | ... | @@ -1975,12 +1992,19 @@ case "$target_cpu" in |
| 1975 | 1992 | echo "#define TARGET_SPARC 1" >> $config_h |
| 1976 | 1993 | echo "#define TARGET_SPARC64 1" >> $config_h |
| 1977 | 1994 | echo "#define TARGET_ABI32 1" >> $config_h |
| 1995 | + target_phys_bits=64 | |
| 1978 | 1996 | ;; |
| 1979 | 1997 | *) |
| 1980 | 1998 | echo "Unsupported target CPU" |
| 1981 | 1999 | exit 1 |
| 1982 | 2000 | ;; |
| 1983 | 2001 | esac |
| 2002 | +if [ $target_phys_bits -lt $hostlongbits ] ; then | |
| 2003 | + target_phys_bits=$hostlongbits | |
| 2004 | +fi | |
| 2005 | +echo "HWLIB=../libhw$target_phys_bits/libqemuhw$target_phys_bits.a" >> $config_mak | |
| 2006 | +echo "#define TARGET_PHYS_ADDR_BITS $target_phys_bits" >> $config_h | |
| 2007 | +echo "subdir-$target: subdir-libhw$target_phys_bits" >> $config_host_mak | |
| 1984 | 2008 | if test "$target_bigendian" = "yes" ; then |
| 1985 | 2009 | echo "TARGET_WORDS_BIGENDIAN=yes" >> $config_mak |
| 1986 | 2010 | echo "#define TARGET_WORDS_BIGENDIAN 1" >> $config_h |
| ... | ... | @@ -2065,3 +2089,12 @@ if test "$source_path_used" = "yes" ; then |
| 2065 | 2089 | ln -s $source_path/$f $f |
| 2066 | 2090 | done |
| 2067 | 2091 | fi |
| 2092 | + | |
| 2093 | +for hwlib in 32 64; do | |
| 2094 | + d=libhw$hwlib | |
| 2095 | + mkdir -p $d | |
| 2096 | + rm -f $d/Makefile | |
| 2097 | + ln -s $source_path/Makefile.hw $d/Makefile | |
| 2098 | + echo "HWLIB=libqemuhw$hwlib.a" > $d/config.mak | |
| 2099 | + echo "CPPFLAGS=-DTARGET_PHYS_ADDR_BITS=$hwlib" >> $d/config.mak | |
| 2100 | +done | ... | ... |
cpu-all.h
| ... | ... | @@ -21,10 +21,7 @@ |
| 21 | 21 | #define CPU_ALL_H |
| 22 | 22 | |
| 23 | 23 | #include "qemu-common.h" |
| 24 | - | |
| 25 | -#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) | |
| 26 | -#define WORDS_ALIGNED | |
| 27 | -#endif | |
| 24 | +#include "cpu-common.h" | |
| 28 | 25 | |
| 29 | 26 | /* some important defines: |
| 30 | 27 | * |
| ... | ... | @@ -39,7 +36,6 @@ |
| 39 | 36 | * TARGET_WORDS_BIGENDIAN : same for target cpu |
| 40 | 37 | */ |
| 41 | 38 | |
| 42 | -#include "bswap.h" | |
| 43 | 39 | #include "softfloat.h" |
| 44 | 40 | |
| 45 | 41 | #if defined(WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN) |
| ... | ... | @@ -847,13 +843,6 @@ int cpu_inw(CPUState *env, int addr); |
| 847 | 843 | int cpu_inl(CPUState *env, int addr); |
| 848 | 844 | #endif |
| 849 | 845 | |
| 850 | -/* address in the RAM (different from a physical address) */ | |
| 851 | -#ifdef CONFIG_KQEMU | |
| 852 | -typedef uint32_t ram_addr_t; | |
| 853 | -#else | |
| 854 | -typedef unsigned long ram_addr_t; | |
| 855 | -#endif | |
| 856 | - | |
| 857 | 846 | /* memory API */ |
| 858 | 847 | |
| 859 | 848 | extern int phys_ram_fd; |
| ... | ... | @@ -867,19 +856,8 @@ extern ram_addr_t last_ram_offset; |
| 867 | 856 | 3 flags. The ROMD code stores the page ram offset in iotlb entry, |
| 868 | 857 | so only a limited number of ids are avaiable. */ |
| 869 | 858 | |
| 870 | -#define IO_MEM_SHIFT 3 | |
| 871 | 859 | #define IO_MEM_NB_ENTRIES (1 << (TARGET_PAGE_BITS - IO_MEM_SHIFT)) |
| 872 | 860 | |
| 873 | -#define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */ | |
| 874 | -#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */ | |
| 875 | -#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT) | |
| 876 | -#define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT) | |
| 877 | - | |
| 878 | -/* Acts like a ROM when read and like a device when written. */ | |
| 879 | -#define IO_MEM_ROMD (1) | |
| 880 | -#define IO_MEM_SUBPAGE (2) | |
| 881 | -#define IO_MEM_SUBWIDTH (4) | |
| 882 | - | |
| 883 | 861 | /* Flags stored in the low bits of the TLB virtual address. These are |
| 884 | 862 | defined so that fast path ram access is all zeros. */ |
| 885 | 863 | /* Zero if TLB entry is valid. */ |
| ... | ... | @@ -890,67 +868,6 @@ extern ram_addr_t last_ram_offset; |
| 890 | 868 | /* Set if TLB entry is an IO callback. */ |
| 891 | 869 | #define TLB_MMIO (1 << 5) |
| 892 | 870 | |
| 893 | -typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); | |
| 894 | -typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); | |
| 895 | - | |
| 896 | -void cpu_register_physical_memory_offset(target_phys_addr_t start_addr, | |
| 897 | - ram_addr_t size, | |
| 898 | - ram_addr_t phys_offset, | |
| 899 | - ram_addr_t region_offset); | |
| 900 | -static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, | |
| 901 | - ram_addr_t size, | |
| 902 | - ram_addr_t phys_offset) | |
| 903 | -{ | |
| 904 | - cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0); | |
| 905 | -} | |
| 906 | - | |
| 907 | -ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); | |
| 908 | -ram_addr_t qemu_ram_alloc(ram_addr_t); | |
| 909 | -void qemu_ram_free(ram_addr_t addr); | |
| 910 | -/* This should only be used for ram local to a device. */ | |
| 911 | -void *qemu_get_ram_ptr(ram_addr_t addr); | |
| 912 | -/* This should not be used by devices. */ | |
| 913 | -ram_addr_t qemu_ram_addr_from_host(void *ptr); | |
| 914 | - | |
| 915 | -int cpu_register_io_memory(int io_index, | |
| 916 | - CPUReadMemoryFunc **mem_read, | |
| 917 | - CPUWriteMemoryFunc **mem_write, | |
| 918 | - void *opaque); | |
| 919 | -void cpu_unregister_io_memory(int table_address); | |
| 920 | - | |
| 921 | -void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, | |
| 922 | - int len, int is_write); | |
| 923 | -static inline void cpu_physical_memory_read(target_phys_addr_t addr, | |
| 924 | - uint8_t *buf, int len) | |
| 925 | -{ | |
| 926 | - cpu_physical_memory_rw(addr, buf, len, 0); | |
| 927 | -} | |
| 928 | -static inline void cpu_physical_memory_write(target_phys_addr_t addr, | |
| 929 | - const uint8_t *buf, int len) | |
| 930 | -{ | |
| 931 | - cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1); | |
| 932 | -} | |
| 933 | -void *cpu_physical_memory_map(target_phys_addr_t addr, | |
| 934 | - target_phys_addr_t *plen, | |
| 935 | - int is_write); | |
| 936 | -void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, | |
| 937 | - int is_write, target_phys_addr_t access_len); | |
| 938 | -void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); | |
| 939 | -void cpu_unregister_map_client(void *cookie); | |
| 940 | - | |
| 941 | -uint32_t ldub_phys(target_phys_addr_t addr); | |
| 942 | -uint32_t lduw_phys(target_phys_addr_t addr); | |
| 943 | -uint32_t ldl_phys(target_phys_addr_t addr); | |
| 944 | -uint64_t ldq_phys(target_phys_addr_t addr); | |
| 945 | -void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); | |
| 946 | -void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val); | |
| 947 | -void stb_phys(target_phys_addr_t addr, uint32_t val); | |
| 948 | -void stw_phys(target_phys_addr_t addr, uint32_t val); | |
| 949 | -void stl_phys(target_phys_addr_t addr, uint32_t val); | |
| 950 | -void stq_phys(target_phys_addr_t addr, uint64_t val); | |
| 951 | - | |
| 952 | -void cpu_physical_memory_write_rom(target_phys_addr_t addr, | |
| 953 | - const uint8_t *buf, int len); | |
| 954 | 871 | int cpu_memory_rw_debug(CPUState *env, target_ulong addr, |
| 955 | 872 | uint8_t *buf, int len, int is_write); |
| 956 | 873 | ... | ... |
cpu-common.h
0 → 100644
| 1 | +#ifndef CPU_COMMON_H | |
| 2 | +#define CPU_COMMON_H 1 | |
| 3 | + | |
| 4 | +/* CPU interfaces that are target indpendent. */ | |
| 5 | + | |
| 6 | +#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) | |
| 7 | +#define WORDS_ALIGNED | |
| 8 | +#endif | |
| 9 | + | |
| 10 | +#include "bswap.h" | |
| 11 | + | |
| 12 | +/* address in the RAM (different from a physical address) */ | |
| 13 | +#ifdef CONFIG_KQEMU | |
| 14 | +/* FIXME: This is wrong. */ | |
| 15 | +typedef uint32_t ram_addr_t; | |
| 16 | +#else | |
| 17 | +typedef unsigned long ram_addr_t; | |
| 18 | +#endif | |
| 19 | + | |
| 20 | +/* memory API */ | |
| 21 | + | |
| 22 | +typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); | |
| 23 | +typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); | |
| 24 | + | |
| 25 | +void cpu_register_physical_memory_offset(target_phys_addr_t start_addr, | |
| 26 | + ram_addr_t size, | |
| 27 | + ram_addr_t phys_offset, | |
| 28 | + ram_addr_t region_offset); | |
| 29 | +static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, | |
| 30 | + ram_addr_t size, | |
| 31 | + ram_addr_t phys_offset) | |
| 32 | +{ | |
| 33 | + cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0); | |
| 34 | +} | |
| 35 | + | |
| 36 | +ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); | |
| 37 | +ram_addr_t qemu_ram_alloc(ram_addr_t); | |
| 38 | +void qemu_ram_free(ram_addr_t addr); | |
| 39 | +/* This should only be used for ram local to a device. */ | |
| 40 | +void *qemu_get_ram_ptr(ram_addr_t addr); | |
| 41 | +/* This should not be used by devices. */ | |
| 42 | +ram_addr_t qemu_ram_addr_from_host(void *ptr); | |
| 43 | + | |
| 44 | +int cpu_register_io_memory(int io_index, | |
| 45 | + CPUReadMemoryFunc **mem_read, | |
| 46 | + CPUWriteMemoryFunc **mem_write, | |
| 47 | + void *opaque); | |
| 48 | +void cpu_unregister_io_memory(int table_address); | |
| 49 | + | |
| 50 | +void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, | |
| 51 | + int len, int is_write); | |
| 52 | +static inline void cpu_physical_memory_read(target_phys_addr_t addr, | |
| 53 | + uint8_t *buf, int len) | |
| 54 | +{ | |
| 55 | + cpu_physical_memory_rw(addr, buf, len, 0); | |
| 56 | +} | |
| 57 | +static inline void cpu_physical_memory_write(target_phys_addr_t addr, | |
| 58 | + const uint8_t *buf, int len) | |
| 59 | +{ | |
| 60 | + cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1); | |
| 61 | +} | |
| 62 | +void *cpu_physical_memory_map(target_phys_addr_t addr, | |
| 63 | + target_phys_addr_t *plen, | |
| 64 | + int is_write); | |
| 65 | +void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, | |
| 66 | + int is_write, target_phys_addr_t access_len); | |
| 67 | +void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); | |
| 68 | +void cpu_unregister_map_client(void *cookie); | |
| 69 | + | |
| 70 | +uint32_t ldub_phys(target_phys_addr_t addr); | |
| 71 | +uint32_t lduw_phys(target_phys_addr_t addr); | |
| 72 | +uint32_t ldl_phys(target_phys_addr_t addr); | |
| 73 | +uint64_t ldq_phys(target_phys_addr_t addr); | |
| 74 | +void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); | |
| 75 | +void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val); | |
| 76 | +void stb_phys(target_phys_addr_t addr, uint32_t val); | |
| 77 | +void stw_phys(target_phys_addr_t addr, uint32_t val); | |
| 78 | +void stl_phys(target_phys_addr_t addr, uint32_t val); | |
| 79 | +void stq_phys(target_phys_addr_t addr, uint64_t val); | |
| 80 | + | |
| 81 | +void cpu_physical_memory_write_rom(target_phys_addr_t addr, | |
| 82 | + const uint8_t *buf, int len); | |
| 83 | + | |
| 84 | +#define IO_MEM_SHIFT 3 | |
| 85 | + | |
| 86 | +#define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */ | |
| 87 | +#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */ | |
| 88 | +#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT) | |
| 89 | +#define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT) | |
| 90 | + | |
| 91 | +/* Acts like a ROM when read and like a device when written. */ | |
| 92 | +#define IO_MEM_ROMD (1) | |
| 93 | +#define IO_MEM_SUBPAGE (2) | |
| 94 | +#define IO_MEM_SUBWIDTH (4) | |
| 95 | + | |
| 96 | +#endif /* !CPU_COMMON_H */ | ... | ... |
cpu-defs.h
| ... | ... | @@ -30,19 +30,12 @@ |
| 30 | 30 | #include <signal.h> |
| 31 | 31 | #include "osdep.h" |
| 32 | 32 | #include "sys-queue.h" |
| 33 | +#include "targphys.h" | |
| 33 | 34 | |
| 34 | 35 | #ifndef TARGET_LONG_BITS |
| 35 | 36 | #error TARGET_LONG_BITS must be defined before including this header |
| 36 | 37 | #endif |
| 37 | 38 | |
| 38 | -#ifndef TARGET_PHYS_ADDR_BITS | |
| 39 | -#if TARGET_LONG_BITS >= HOST_LONG_BITS | |
| 40 | -#define TARGET_PHYS_ADDR_BITS TARGET_LONG_BITS | |
| 41 | -#else | |
| 42 | -#define TARGET_PHYS_ADDR_BITS HOST_LONG_BITS | |
| 43 | -#endif | |
| 44 | -#endif | |
| 45 | - | |
| 46 | 39 | #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8) |
| 47 | 40 | |
| 48 | 41 | /* target_ulong is the type of a virtual address */ |
| ... | ... | @@ -62,22 +55,6 @@ typedef uint64_t target_ulong; |
| 62 | 55 | #error TARGET_LONG_SIZE undefined |
| 63 | 56 | #endif |
| 64 | 57 | |
| 65 | -/* target_phys_addr_t is the type of a physical address (its size can | |
| 66 | - be different from 'target_ulong'). We have sizeof(target_phys_addr) | |
| 67 | - = max(sizeof(unsigned long), | |
| 68 | - sizeof(size_of_target_physical_address)) because we must pass a | |
| 69 | - host pointer to memory operations in some cases */ | |
| 70 | - | |
| 71 | -#if TARGET_PHYS_ADDR_BITS == 32 | |
| 72 | -typedef uint32_t target_phys_addr_t; | |
| 73 | -#define TARGET_FMT_plx "%08x" | |
| 74 | -#elif TARGET_PHYS_ADDR_BITS == 64 | |
| 75 | -typedef uint64_t target_phys_addr_t; | |
| 76 | -#define TARGET_FMT_plx "%016" PRIx64 | |
| 77 | -#else | |
| 78 | -#error TARGET_PHYS_ADDR_BITS undefined | |
| 79 | -#endif | |
| 80 | - | |
| 81 | 58 | #define HOST_LONG_SIZE (HOST_LONG_BITS / 8) |
| 82 | 59 | |
| 83 | 60 | #define EXCP_INTERRUPT 0x10000 /* async interruption */ | ... | ... |
dma.h
hw/etraxfs_pic.c
hw/hw.h
hw/poison.h
0 → 100644
| 1 | +/* Poison identifiers that should not be used when building | |
| 2 | + target independent device code. */ | |
| 3 | + | |
| 4 | +#ifndef HW_POISON_H | |
| 5 | +#define HW_POISON_H | |
| 6 | +#ifdef __GNUC__ | |
| 7 | + | |
| 8 | +#pragma GCC poison TARGET_I386 | |
| 9 | +#pragma GCC poison TARGET_X86_64 | |
| 10 | +#pragma GCC poison TARGET_ALPHA | |
| 11 | +#pragma GCC poison TARGET_ARM | |
| 12 | +#pragma GCC poison TARGET_CRIS | |
| 13 | +#pragma GCC poison TARGET_M68K | |
| 14 | +#pragma GCC poison TARGET_MIPS | |
| 15 | +#pragma GCC poison TARGET_MIPS64 | |
| 16 | +#pragma GCC poison TARGET_PPC | |
| 17 | +#pragma GCC poison TARGET_PPCEMB | |
| 18 | +#pragma GCC poison TARGET_PPC64 | |
| 19 | +#pragma GCC poison TARGET_ABI32 | |
| 20 | +#pragma GCC poison TARGET_SH4 | |
| 21 | +#pragma GCC poison TARGET_SPARC | |
| 22 | +#pragma GCC poison TARGET_SPARC64 | |
| 23 | + | |
| 24 | +#pragma GCC poison TARGET_WORDS_BIGENDIAN | |
| 25 | + | |
| 26 | +#endif | |
| 27 | +#endif | ... | ... |
hw/virtio-pci.c
sysemu.h
| ... | ... | @@ -38,12 +38,14 @@ void qemu_system_powerdown_request(void); |
| 38 | 38 | int qemu_shutdown_requested(void); |
| 39 | 39 | int qemu_reset_requested(void); |
| 40 | 40 | int qemu_powerdown_requested(void); |
| 41 | +#ifdef NEED_CPU_H | |
| 41 | 42 | #if !defined(TARGET_SPARC) && !defined(TARGET_I386) |
| 42 | 43 | // Please implement a power failure function to signal the OS |
| 43 | 44 | #define qemu_system_powerdown() do{}while(0) |
| 44 | 45 | #else |
| 45 | 46 | void qemu_system_powerdown(void); |
| 46 | 47 | #endif |
| 48 | +#endif | |
| 47 | 49 | void qemu_system_reset(void); |
| 48 | 50 | |
| 49 | 51 | void do_savevm(Monitor *mon, const char *name); |
| ... | ... | @@ -117,11 +119,13 @@ extern uint64_t node_mem[MAX_NODES]; |
| 117 | 119 | extern const char *option_rom[MAX_OPTION_ROMS]; |
| 118 | 120 | extern int nb_option_roms; |
| 119 | 121 | |
| 122 | +#ifdef NEED_CPU_H | |
| 120 | 123 | #if defined(TARGET_SPARC) || defined(TARGET_PPC) |
| 121 | 124 | #define MAX_PROM_ENVS 128 |
| 122 | 125 | extern const char *prom_envs[MAX_PROM_ENVS]; |
| 123 | 126 | extern unsigned int nb_prom_envs; |
| 124 | 127 | #endif |
| 128 | +#endif | |
| 125 | 129 | |
| 126 | 130 | typedef enum { |
| 127 | 131 | IF_IDE, IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD, IF_VIRTIO, IF_XEN, | ... | ... |
target-mips/mips-defs.h
| ... | ... | @@ -14,9 +14,6 @@ |
| 14 | 14 | #define TARGET_LONG_BITS 32 |
| 15 | 15 | #endif |
| 16 | 16 | |
| 17 | -/* Even MIPS32 can have 36 bits physical address space. */ | |
| 18 | -#define TARGET_PHYS_ADDR_BITS 64 | |
| 19 | - | |
| 20 | 17 | /* Masks used to mark instructions to indicate which ISA level they |
| 21 | 18 | were introduced in. */ |
| 22 | 19 | #define ISA_MIPS1 0x00000001 | ... | ... |
target-ppc/cpu.h
| ... | ... | @@ -37,7 +37,6 @@ |
| 37 | 37 | #if defined(TARGET_PPCEMB) |
| 38 | 38 | /* Specific definitions for PowerPC embedded */ |
| 39 | 39 | /* BookE have 36 bits physical address space */ |
| 40 | -#define TARGET_PHYS_ADDR_BITS 64 | |
| 41 | 40 | #if defined(CONFIG_USER_ONLY) |
| 42 | 41 | /* It looks like a lot of Linux programs assume page size |
| 43 | 42 | * is 4kB long. This is evil, but we have to deal with it... | ... | ... |
target-sparc/cpu.h
targphys.h
0 → 100644
| 1 | +/* Define target_phys_addr_t if it exists. */ | |
| 2 | + | |
| 3 | +#ifndef TARGPHYS_H | |
| 4 | +#define TARGPHYS_H | |
| 5 | + | |
| 6 | +#ifdef TARGET_PHYS_ADDR_BITS | |
| 7 | +/* target_phys_addr_t is the type of a physical address (its size can | |
| 8 | + be different from 'target_ulong'). We have sizeof(target_phys_addr) | |
| 9 | + = max(sizeof(unsigned long), | |
| 10 | + sizeof(size_of_target_physical_address)) because we must pass a | |
| 11 | + host pointer to memory operations in some cases */ | |
| 12 | + | |
| 13 | +#if TARGET_PHYS_ADDR_BITS == 32 | |
| 14 | +typedef uint32_t target_phys_addr_t; | |
| 15 | +#define TARGET_FMT_plx "%08x" | |
| 16 | +#elif TARGET_PHYS_ADDR_BITS == 64 | |
| 17 | +typedef uint64_t target_phys_addr_t; | |
| 18 | +#define TARGET_FMT_plx "%016" PRIx64 | |
| 19 | +#endif | |
| 20 | +#endif | |
| 21 | + | |
| 22 | +#endif | ... | ... |