gwj / at91sam9263 · Commits

Commit 1a7b60e727d10b55fe573a471662442306eaa24b

Authored by blueswir1
1 parent e01a1157

Convert udivx and sdivx to TCG 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4064 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 30 additions and 24 deletions
target-sparc/op.c
  View file @1a7b60e
... ... @@ -269,29 +269,6 @@ void OPPROTO op_sdiv_T1_T0(void)
269 269 FORCE_RET();
270 270 }
271 271  
272   -#ifdef TARGET_SPARC64
273   -void OPPROTO op_udivx_T1_T0(void)
274   -{
275   - if (T1 == 0) {
276   - raise_exception(TT_DIV_ZERO);
277   - }
278   - T0 /= T1;
279   - FORCE_RET();
280   -}
281   -
282   -void OPPROTO op_sdivx_T1_T0(void)
283   -{
284   - if (T1 == 0) {
285   - raise_exception(TT_DIV_ZERO);
286   - }
287   - if (T0 == INT64_MIN && T1 == -1)
288   - T0 = INT64_MIN;
289   - else
290   - T0 /= (target_long) T1;
291   - FORCE_RET();
292   -}
293   -#endif
294   -
295 272 /* Load and store */
296 273 #define MEMSUFFIX _raw
297 274 #include "op_mem.h"
... ...
target-sparc/translate.c
  View file @1a7b60e
... ... @@ -729,6 +729,34 @@ static inline void gen_op_tsub_T1_T0_ccTV(void)
729 729 gen_cc_C_sub(cpu_cc_src, cpu_T[1]);
730 730 }
731 731  
  732 +#ifdef TARGET_SPARC64
  733 +static inline void gen_trap_ifdivzero_i64(TCGv divisor)
  734 +{
  735 + int l1;
  736 +
  737 + l1 = gen_new_label();
  738 + tcg_gen_brcond_i64(TCG_COND_NE, divisor, tcg_const_tl(0), l1);
  739 + gen_op_exception(TT_DIV_ZERO);
  740 + gen_set_label(l1);
  741 +}
  742 +
  743 +static inline void gen_op_sdivx_T1_T0(void)
  744 +{
  745 + int l1, l2;
  746 +
  747 + l1 = gen_new_label();
  748 + l2 = gen_new_label();
  749 + gen_trap_ifdivzero_i64(cpu_T[1]);
  750 + tcg_gen_brcond_i64(TCG_COND_NE, cpu_T[0], tcg_const_i64(INT64_MIN), l1);
  751 + tcg_gen_brcond_i64(TCG_COND_NE, cpu_T[1], tcg_const_i64(-1), l1);
  752 + tcg_gen_movi_i64(cpu_T[0], INT64_MIN);
  753 + gen_op_jmp_label(l2);
  754 + gen_set_label(l1);
  755 + tcg_gen_div_i64(cpu_T[0], cpu_T[0], cpu_T[1]);
  756 + gen_set_label(l2);
  757 +}
  758 +#endif
  759 +
732 760 static inline void gen_op_div_cc(void)
733 761 {
734 762 int l1;
... ... @@ -3037,7 +3065,8 @@ static void disas_sparc_insn(DisasContext * dc)
3037 3065 break;
3038 3066 #ifdef TARGET_SPARC64
3039 3067 case 0xd: /* V9 udivx */
3040   - gen_op_udivx_T1_T0();
  3068 + gen_trap_ifdivzero_i64(cpu_T[1]);
  3069 + tcg_gen_divu_i64(cpu_T[0], cpu_T[0], cpu_T[1]);
3041 3070 break;
3042 3071 #endif
3043 3072 case 0xe:
... ...