Commit 19b045dec90378e63496f7ebf86b4f81fdcc5fd3

Authored by pbrook
1 parent b55669bf

Fix FPA condition codes (Ulrich Hecht).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1784 c046a42c-6fe2-441c-8c8c-71466251a162
linux-user/main.c
... ... @@ -345,7 +345,7 @@ void cpu_loop(CPUARMState *env)
345 345 /* we get the opcode */
346 346 opcode = ldl_raw((uint8_t *)env->regs[15]);
347 347  
348   - if (EmulateAll(opcode, &ts->fpa, env->regs) == 0) {
  348 + if (EmulateAll(opcode, &ts->fpa, env) == 0) {
349 349 info.si_signo = SIGILL;
350 350 info.si_errno = 0;
351 351 info.si_code = TARGET_ILL_ILLOPN;
... ...
target-arm/nwfpe/fpa11.c
... ... @@ -36,7 +36,7 @@ unsigned int EmulateCPDT(const unsigned int);
36 36 unsigned int EmulateCPRT(const unsigned int);
37 37  
38 38 FPA11* qemufpa=0;
39   -unsigned int* user_registers=0;
  39 +CPUARMState* user_registers;
40 40  
41 41 /* Reset the FPA11 chip. Called to initialize and reset the emulator. */
42 42 void resetFPA11(void)
... ... @@ -137,7 +137,8 @@ void SetRoundingPrecision(const unsigned int opcode)
137 137 }
138 138  
139 139 /* Emulate the instruction in the opcode. */
140   -unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, unsigned int* qregs)
  140 +/* ??? This is not thread safe. */
  141 +unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
141 142 {
142 143 unsigned int nRc = 0;
143 144 // unsigned long flags;
... ...
target-arm/nwfpe/fpa11.h
... ... @@ -26,6 +26,8 @@
26 26 #include <stdio.h>
27 27 #include <errno.h>
28 28  
  29 +#include <cpu.h>
  30 +
29 31 #define GET_FPA11() (qemufpa)
30 32  
31 33 /*
... ... @@ -33,7 +35,7 @@
33 35 * stack+task struct. Use the same method as 'current' uses to
34 36 * reach them.
35 37 */
36   -extern unsigned int *user_registers;
  38 +extern CPUARMState *user_registers;
37 39  
38 40 #define GET_USERREG() (user_registers)
39 41  
... ... @@ -94,7 +96,7 @@ extern void SetRoundingPrecision(const unsigned int);
94 96  
95 97 static inline unsigned int readRegister(unsigned int reg)
96 98 {
97   - return (user_registers[(reg)]);
  99 + return (user_registers->regs[(reg)]);
98 100 }
99 101  
100 102 static inline void writeRegister(unsigned int x, unsigned int y)
... ... @@ -102,34 +104,17 @@ static inline void writeRegister(unsigned int x, unsigned int y)
102 104 #if 0
103 105 printf("writing %d to r%d\n",y,x);
104 106 #endif
105   - user_registers[(x)]=(y);
  107 + user_registers->regs[(x)]=(y);
106 108 }
107 109  
108 110 static inline void writeConditionCodes(unsigned int x)
109 111 {
110   -#if 0
111   -unsigned int y;
112   -unsigned int ZF;
113   - printf("setting flags to %x from %x\n",x,user_registers[16]);
114   -#endif
115   - user_registers[16]=(x); // cpsr
116   - user_registers[17]=(x>>29)&1; // cf
117   - user_registers[18]=(x<<3)&(1<<31); // vf
118   - user_registers[19]=x&(1<<31); // nzf
119   - if(!(x&(1<<30))) user_registers[19]++; // nzf must be non-zero for zf to be cleared
120   -
121   -#if 0
122   - ZF = (user_registers[19] == 0);
123   - y=user_registers[16] | (user_registers[19] & 0x80000000) | (ZF << 30) |
124   - (user_registers[17] << 29) | ((user_registers[18] & 0x80000000) >> 3);
125   - if(y != x)
126   - printf("GODDAM SHIIIIIIIIIIIIIIIIT! %x %x nzf %x zf %x\n",x,y,user_registers[19],ZF);
127   -#endif
  112 + cpsr_write(user_registers,x,CPSR_NZCV);
128 113 }
129 114  
130 115 #define REG_PC 15
131 116  
132   -unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, unsigned int* qregs);
  117 +unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs);
133 118  
134 119 /* included only for get_user/put_user macros */
135 120 #include "qemu.h"
... ...