Commit 191abaa2f0aca0c6ebca06f3e985da02ac950d14

Authored by pbrook
1 parent 3442e896

Fix Arm interrupted ldm bug.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1743 c046a42c-6fe2-441c-8c8c-71466251a162
target-arm/op.c
@@ -1181,3 +1181,13 @@ void OPPROTO op_movl_user_T0(void) @@ -1181,3 +1181,13 @@ void OPPROTO op_movl_user_T0(void)
1181 } 1181 }
1182 FORCE_RET(); 1182 FORCE_RET();
1183 } 1183 }
  1184 +
  1185 +void OPPROTO op_movl_T2_T0(void)
  1186 +{
  1187 + T2 = T0;
  1188 +}
  1189 +
  1190 +void OPPROTO op_movl_T0_T2(void)
  1191 +{
  1192 + T0 = T2;
  1193 +}
target-arm/translate.c
@@ -1627,7 +1627,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) @@ -1627,7 +1627,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
1627 case 0x08: 1627 case 0x08:
1628 case 0x09: 1628 case 0x09:
1629 { 1629 {
1630 - int j, n, user; 1630 + int j, n, user, loaded_base;
1631 /* load/store multiple words */ 1631 /* load/store multiple words */
1632 /* XXX: store correct base if write back */ 1632 /* XXX: store correct base if write back */
1633 user = 0; 1633 user = 0;
@@ -1642,6 +1642,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) @@ -1642,6 +1642,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
1642 gen_movl_T1_reg(s, rn); 1642 gen_movl_T1_reg(s, rn);
1643 1643
1644 /* compute total size */ 1644 /* compute total size */
  1645 + loaded_base = 0;
1645 n = 0; 1646 n = 0;
1646 for(i=0;i<16;i++) { 1647 for(i=0;i<16;i++) {
1647 if (insn & (1 << i)) 1648 if (insn & (1 << i))
@@ -1675,6 +1676,9 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) @@ -1675,6 +1676,9 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
1675 gen_bx(s); 1676 gen_bx(s);
1676 } else if (user) { 1677 } else if (user) {
1677 gen_op_movl_user_T0(i); 1678 gen_op_movl_user_T0(i);
  1679 + } else if (i == rn) {
  1680 + gen_op_movl_T2_T0();
  1681 + loaded_base = 1;
1678 } else { 1682 } else {
1679 gen_movl_reg_T0(s, i); 1683 gen_movl_reg_T0(s, i);
1680 } 1684 }
@@ -1718,6 +1722,10 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) @@ -1718,6 +1722,10 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
1718 } 1722 }
1719 gen_movl_reg_T1(s, rn); 1723 gen_movl_reg_T1(s, rn);
1720 } 1724 }
  1725 + if (loaded_base) {
  1726 + gen_op_movl_T0_T2();
  1727 + gen_movl_reg_T0(s, rn);
  1728 + }
1721 if ((insn & (1 << 22)) && !user) { 1729 if ((insn & (1 << 22)) && !user) {
1722 /* Restore CPSR from SPSR. */ 1730 /* Restore CPSR from SPSR. */
1723 gen_op_movl_T0_spsr(); 1731 gen_op_movl_T0_spsr();