Commit 179e32bbccd0b7ae2fa99e6612d1657c3b8205ae

Authored by ths
1 parent e4630047

Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 1 additions and 0 deletions
target-mips/translate.c
... ... @@ -1276,6 +1276,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
1276 1276 GEN_LOAD_REG_TN(T1, rt);
1277 1277 cond = 1;
1278 1278 }
  1279 + break;
1279 1280 case OPC_TEQI:
1280 1281 case OPC_TGEI:
1281 1282 case OPC_TGEIU:
... ...