gwj / at91sam9263 · Commits

Commit 1572a18cc6d7ba6fddfe78ebfecaef7d1def1f0b

Authored by blueswir1
1 parent 9b8114a8

Sun4c cleanups (Robert Reif) 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5568 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 5 additions and 10 deletions
hw/sun4m.c
  View file @1572a18
... ... @@ -99,7 +99,7 @@ struct sun4m_hwdef {
99 99 long vram_size, nvram_size;
100 100 // IRQ numbers are not PIL ones, but master interrupt controller
101 101 // register bit numbers
102   - int intctl_g_intr, esp_irq, le_irq, clock_irq, clock1_irq;
  102 + int esp_irq, le_irq, clock_irq, clock1_irq;
103 103 int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq, ecc_irq;
104 104 uint8_t nvram_machine_id;
105 105 uint16_t machine_id;
... ... @@ -135,12 +135,12 @@ struct sun4c_hwdef {
135 135 target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base;
136 136 target_phys_addr_t serial_base, fd_base;
137 137 target_phys_addr_t idreg_base, dma_base, esp_base, le_base;
138   - target_phys_addr_t tcx_base, cs_base, apc_base, aux1_base, aux2_base;
  138 + target_phys_addr_t tcx_base, aux1_base;
139 139 long vram_size, nvram_size;
140 140 // IRQ numbers are not PIL ones, but master interrupt controller
141 141 // register bit numbers
142   - int intctl_g_intr, esp_irq, le_irq, clock_irq, clock1_irq;
143   - int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq;
  142 + int esp_irq, le_irq, clock_irq, clock1_irq;
  143 + int ser_irq, ms_kb_irq, fd_irq, me_irq;
144 144 uint8_t nvram_machine_id;
145 145 uint16_t machine_id;
146 146 uint32_t iommu_version;
... ... @@ -1440,7 +1440,6 @@ static const struct sun4c_hwdef sun4c_hwdefs[] = {
1440 1440 {
1441 1441 .iommu_base = 0xf8000000,
1442 1442 .tcx_base = 0xfe000000,
1443   - .cs_base = -1,
1444 1443 .slavio_base = 0xf6000000,
1445 1444 .intctl_base = 0xf5000000,
1446 1445 .counter_base = 0xf3000000,
... ... @@ -1451,9 +1450,7 @@ static const struct sun4c_hwdef sun4c_hwdefs[] = {
1451 1450 .dma_base = 0xf8400000,
1452 1451 .esp_base = 0xf8800000,
1453 1452 .le_base = 0xf8c00000,
1454   - .apc_base = -1,
1455 1453 .aux1_base = 0xf7400003,
1456   - .aux2_base = -1,
1457 1454 .vram_size = 0x00100000,
1458 1455 .nvram_size = 0x800,
1459 1456 .esp_irq = 2,
... ... @@ -1464,7 +1461,6 @@ static const struct sun4c_hwdef sun4c_hwdefs[] = {
1464 1461 .ser_irq = 1,
1465 1462 .fd_irq = 1,
1466 1463 .me_irq = 1,
1467   - .cs_irq = -1,
1468 1464 .nvram_machine_id = 0x55,
1469 1465 .machine_id = ss2_id,
1470 1466 .max_mem = 0x10000000,
... ... @@ -1579,8 +1575,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1579 1575 slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
1580 1576 serial_hds[1], serial_hds[0]);
1581 1577  
1582   - slavio_misc = slavio_misc_init(0, hwdef->apc_base,
1583   - hwdef->aux1_base, hwdef->aux2_base,
  1578 + slavio_misc = slavio_misc_init(0, -1, hwdef->aux1_base, -1,
1584 1579 slavio_irq[hwdef->me_irq], env, &fdc_tc);
1585 1580  
1586 1581 if (hwdef->fd_base != (target_phys_addr_t)-1) {
... ...