Commit 14a1120e5c8c4c29441141b4657f91e04d10fac0
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5a1237c4
Handle division by zero case in Sparc64 udivx and sdivx ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2767 c046a42c-6fe2-441c-8c8c-71466251a162
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target-sparc/op.c
| @@ -926,12 +926,18 @@ void OPPROTO op_mulx_T1_T0(void) | @@ -926,12 +926,18 @@ void OPPROTO op_mulx_T1_T0(void) | ||
| 926 | 926 | ||
| 927 | void OPPROTO op_udivx_T1_T0(void) | 927 | void OPPROTO op_udivx_T1_T0(void) |
| 928 | { | 928 | { |
| 929 | + if (T1 == 0) { | ||
| 930 | + raise_exception(TT_DIV_ZERO); | ||
| 931 | + } | ||
| 929 | T0 /= T1; | 932 | T0 /= T1; |
| 930 | FORCE_RET(); | 933 | FORCE_RET(); |
| 931 | } | 934 | } |
| 932 | 935 | ||
| 933 | void OPPROTO op_sdivx_T1_T0(void) | 936 | void OPPROTO op_sdivx_T1_T0(void) |
| 934 | { | 937 | { |
| 938 | + if (T1 == 0) { | ||
| 939 | + raise_exception(TT_DIV_ZERO); | ||
| 940 | + } | ||
| 935 | if (T0 == INT64_MIN && T1 == -1) | 941 | if (T0 == INT64_MIN && T1 == -1) |
| 936 | T0 = INT64_MIN; | 942 | T0 = INT64_MIN; |
| 937 | else | 943 | else |