gwj / at91sam9263 · Commits

Commit 1492a3c467c5f8659ded7ef5383514f8264f8aa0

Authored by balrog
1 parent a0ecfb73

Register io ports as selected by PCI config in VMware SVGA. 

Should prevent segfaults with RTL8139.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3905 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 23 additions and 13 deletions
hw/vmware_vga.c
  View file @1492a3c
@@ -1100,19 +1100,6 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds, @@ -1100,19 +1100,6 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
1100 cpu_register_physical_memory(SVGA_MEM_BASE, vga_ram_size, 1100 cpu_register_physical_memory(SVGA_MEM_BASE, vga_ram_size,
1101 iomemtype); 1101 iomemtype);
1102 1102
1103 - register_ioport_read(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_INDEX_PORT,  
1104 - 1, 4, vmsvga_index_read, s);  
1105 - register_ioport_write(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_INDEX_PORT,  
1106 - 1, 4, vmsvga_index_write, s);  
1107 - register_ioport_read(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_VALUE_PORT,  
1108 - 1, 4, vmsvga_value_read, s);  
1109 - register_ioport_write(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_VALUE_PORT,  
1110 - 1, 4, vmsvga_value_write, s);  
1111 - register_ioport_read(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_BIOS_PORT,  
1112 - 1, 4, vmsvga_bios_read, s);  
1113 - register_ioport_write(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_BIOS_PORT,  
1114 - 1, 4, vmsvga_bios_write, s);  
1115 -  
1116 graphic_console_init(ds, vmsvga_update_display, 1103 graphic_console_init(ds, vmsvga_update_display,
1117 vmsvga_invalidate_display, vmsvga_screen_dump, s); 1104 vmsvga_invalidate_display, vmsvga_screen_dump, s);
1118 1105
@@ -1146,6 +1133,26 @@ static int pci_vmsvga_load(QEMUFile *f, void *opaque, int version_id) @@ -1146,6 +1133,26 @@ static int pci_vmsvga_load(QEMUFile *f, void *opaque, int version_id)
1146 return 0; 1133 return 0;
1147 } 1134 }
1148 1135
  1136 +static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int region_num,
  1137 + uint32_t addr, uint32_t size, int type)
  1138 +{
  1139 + struct pci_vmsvga_state_s *d = (struct pci_vmsvga_state_s *) pci_dev;
  1140 + struct vmsvga_state_s *s = &d->chip;
  1141 +
  1142 + register_ioport_read(addr + SVGA_IO_MUL * SVGA_INDEX_PORT,
  1143 + 1, 4, vmsvga_index_read, s);
  1144 + register_ioport_write(addr + SVGA_IO_MUL * SVGA_INDEX_PORT,
  1145 + 1, 4, vmsvga_index_write, s);
  1146 + register_ioport_read(addr + SVGA_IO_MUL * SVGA_VALUE_PORT,
  1147 + 1, 4, vmsvga_value_read, s);
  1148 + register_ioport_write(addr + SVGA_IO_MUL * SVGA_VALUE_PORT,
  1149 + 1, 4, vmsvga_value_write, s);
  1150 + register_ioport_read(addr + SVGA_IO_MUL * SVGA_BIOS_PORT,
  1151 + 1, 4, vmsvga_bios_read, s);
  1152 + register_ioport_write(addr + SVGA_IO_MUL * SVGA_BIOS_PORT,
  1153 + 1, 4, vmsvga_bios_write, s);
  1154 +}
  1155 +
1149 #define PCI_VENDOR_ID_VMWARE 0x15ad 1156 #define PCI_VENDOR_ID_VMWARE 0x15ad
1150 #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 1157 #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
1151 #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 1158 #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710
@@ -1189,6 +1196,9 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, @@ -1189,6 +1196,9 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
1189 s->card.config[0x2f] = SVGA_PCI_DEVICE_ID >> 8; 1196 s->card.config[0x2f] = SVGA_PCI_DEVICE_ID >> 8;
1190 s->card.config[0x3c] = 0xff; /* End */ 1197 s->card.config[0x3c] = 0xff; /* End */
1191 1198
  1199 + pci_register_io_region(&s->card, 0, 0x10,
  1200 + PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
  1201 +
1192 vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size); 1202 vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
1193 1203
1194 register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s); 1204 register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);