Commit 13b55754afd94ad10124955ec67f8206f57960de
1 parent
972ddf78
ring 0 data structures
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@252 c046a42c-6fe2-441c-8c8c-71466251a162
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1 changed file
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19 additions
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14 deletions
cpu-i386.h
@@ -85,6 +85,17 @@ | @@ -85,6 +85,17 @@ | ||
85 | #define VIP_MASK 0x00100000 | 85 | #define VIP_MASK 0x00100000 |
86 | #define ID_MASK 0x00200000 | 86 | #define ID_MASK 0x00200000 |
87 | 87 | ||
88 | +#define CR0_PE_MASK (1 << 0) | ||
89 | +#define CR0_TS_MASK (1 << 3) | ||
90 | +#define CR0_WP_MASK (1 << 16) | ||
91 | +#define CR0_AM_MASK (1 << 18) | ||
92 | +#define CR0_PG_MASK (1 << 31) | ||
93 | + | ||
94 | +#define CR4_VME_MASK (1 << 0) | ||
95 | +#define CR4_PVI_MASK (1 << 1) | ||
96 | +#define CR4_TSD_MASK (1 << 2) | ||
97 | +#define CR4_DE_MASK (1 << 3) | ||
98 | + | ||
88 | #define EXCP00_DIVZ 0 | 99 | #define EXCP00_DIVZ 0 |
89 | #define EXCP01_SSTP 1 | 100 | #define EXCP01_SSTP 1 |
90 | #define EXCP02_NMI 2 | 101 | #define EXCP02_NMI 2 |
@@ -161,19 +172,12 @@ typedef double CPU86_LDouble; | @@ -161,19 +172,12 @@ typedef double CPU86_LDouble; | ||
161 | #endif | 172 | #endif |
162 | 173 | ||
163 | typedef struct SegmentCache { | 174 | typedef struct SegmentCache { |
175 | + uint32_t selector; | ||
164 | uint8_t *base; | 176 | uint8_t *base; |
165 | unsigned long limit; | 177 | unsigned long limit; |
166 | uint8_t seg_32bit; | 178 | uint8_t seg_32bit; |
167 | } SegmentCache; | 179 | } SegmentCache; |
168 | 180 | ||
169 | -typedef struct SegmentDescriptorTable { | ||
170 | - uint8_t *base; | ||
171 | - unsigned long limit; | ||
172 | - /* this is the returned base when reading the register, just to | ||
173 | - avoid that the emulated program modifies it */ | ||
174 | - unsigned long emu_base; | ||
175 | -} SegmentDescriptorTable; | ||
176 | - | ||
177 | typedef struct CPUX86State { | 181 | typedef struct CPUX86State { |
178 | /* standard registers */ | 182 | /* standard registers */ |
179 | uint32_t regs[8]; | 183 | uint32_t regs[8]; |
@@ -205,17 +209,18 @@ typedef struct CPUX86State { | @@ -205,17 +209,18 @@ typedef struct CPUX86State { | ||
205 | } fp_convert; | 209 | } fp_convert; |
206 | 210 | ||
207 | /* segments */ | 211 | /* segments */ |
208 | - uint32_t segs[6]; /* selector values */ | ||
209 | - SegmentCache seg_cache[6]; /* info taken from LDT/GDT */ | ||
210 | - SegmentDescriptorTable gdt; | ||
211 | - SegmentDescriptorTable ldt; | ||
212 | - SegmentDescriptorTable idt; | 212 | + SegmentCache segs[6]; /* selector values */ |
213 | + SegmentCache ldt; | ||
214 | + SegmentCache tr; | ||
215 | + SegmentCache gdt; /* only base and limit are used */ | ||
216 | + SegmentCache idt; /* only base and limit are used */ | ||
213 | 217 | ||
214 | /* exception/interrupt handling */ | 218 | /* exception/interrupt handling */ |
215 | jmp_buf jmp_env; | 219 | jmp_buf jmp_env; |
216 | int exception_index; | 220 | int exception_index; |
217 | int error_code; | 221 | int error_code; |
218 | - uint32_t cr2; | 222 | + uint32_t cr[5]; /* NOTE: cr1 is unused */ |
223 | + uint32_t dr[8]; /* debug registers */ | ||
219 | int interrupt_request; | 224 | int interrupt_request; |
220 | 225 | ||
221 | /* user data */ | 226 | /* user data */ |