Commit 134d77a14b969edf77117f34d9859bb667f9c922
1 parent
a3ffaf30
Convert exception ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
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5 changed files
with
19 additions
and
18 deletions
target-sparc/cpu.h
| @@ -321,7 +321,6 @@ void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); | @@ -321,7 +321,6 @@ void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); | ||
| 321 | #endif | 321 | #endif |
| 322 | 322 | ||
| 323 | int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); | 323 | int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); |
| 324 | -void raise_exception(int tt); | ||
| 325 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 324 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 326 | int is_asi); | 325 | int is_asi); |
| 327 | void cpu_check_irqs(CPUSPARCState *env); | 326 | void cpu_check_irqs(CPUSPARCState *env); |
target-sparc/exec.h
| @@ -66,7 +66,6 @@ void do_fxtoq(void); | @@ -66,7 +66,6 @@ void do_fxtoq(void); | ||
| 66 | #endif | 66 | #endif |
| 67 | #endif | 67 | #endif |
| 68 | void do_interrupt(int intno); | 68 | void do_interrupt(int intno); |
| 69 | -void raise_exception(int tt); | ||
| 70 | void memcpy32(target_ulong *dst, const target_ulong *src); | 69 | void memcpy32(target_ulong *dst, const target_ulong *src); |
| 71 | target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); | 70 | target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); |
| 72 | void dump_mmu(CPUState *env); | 71 | void dump_mmu(CPUState *env); |
target-sparc/helper.h
| @@ -72,3 +72,4 @@ void TCG_HELPER_PROTO helper_fcmpeq_fcc2(void); | @@ -72,3 +72,4 @@ void TCG_HELPER_PROTO helper_fcmpeq_fcc2(void); | ||
| 72 | void TCG_HELPER_PROTO helper_fcmpeq_fcc3(void); | 72 | void TCG_HELPER_PROTO helper_fcmpeq_fcc3(void); |
| 73 | #endif | 73 | #endif |
| 74 | #endif | 74 | #endif |
| 75 | +void TCG_HELPER_PROTO raise_exception(int tt); |
target-sparc/op.c
| @@ -857,22 +857,6 @@ void OPPROTO op_restore(void) | @@ -857,22 +857,6 @@ void OPPROTO op_restore(void) | ||
| 857 | } | 857 | } |
| 858 | #endif | 858 | #endif |
| 859 | 859 | ||
| 860 | -void OPPROTO op_exception(void) | ||
| 861 | -{ | ||
| 862 | - env->exception_index = PARAM1; | ||
| 863 | - cpu_loop_exit(); | ||
| 864 | - FORCE_RET(); | ||
| 865 | -} | ||
| 866 | - | ||
| 867 | -void OPPROTO op_fpexception_im(void) | ||
| 868 | -{ | ||
| 869 | - env->exception_index = TT_FP_EXCP; | ||
| 870 | - env->fsr &= ~FSR_FTT_MASK; | ||
| 871 | - env->fsr |= PARAM1; | ||
| 872 | - cpu_loop_exit(); | ||
| 873 | - FORCE_RET(); | ||
| 874 | -} | ||
| 875 | - | ||
| 876 | void OPPROTO op_eval_ba(void) | 860 | void OPPROTO op_eval_ba(void) |
| 877 | { | 861 | { |
| 878 | T2 = 1; | 862 | T2 = 1; |
target-sparc/translate.c
| @@ -807,6 +807,24 @@ static inline void gen_op_fcmpeq(int fccno) | @@ -807,6 +807,24 @@ static inline void gen_op_fcmpeq(int fccno) | ||
| 807 | 807 | ||
| 808 | #endif | 808 | #endif |
| 809 | 809 | ||
| 810 | +static inline void gen_op_exception(int exception) | ||
| 811 | +{ | ||
| 812 | + TCGv r_except; | ||
| 813 | + | ||
| 814 | + r_except = tcg_temp_new(TCG_TYPE_I32); | ||
| 815 | + tcg_gen_movi_i32(r_except, exception); | ||
| 816 | + tcg_gen_helper_0_1(raise_exception, r_except); | ||
| 817 | +} | ||
| 818 | + | ||
| 819 | +static inline void gen_op_fpexception_im(int fsr_flags) | ||
| 820 | +{ | ||
| 821 | + tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr)); | ||
| 822 | + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, ~FSR_FTT_MASK); | ||
| 823 | + tcg_gen_ori_tl(cpu_tmp0, cpu_tmp0, fsr_flags); | ||
| 824 | + tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr)); | ||
| 825 | + gen_op_exception(TT_FP_EXCP); | ||
| 826 | +} | ||
| 827 | + | ||
| 810 | static int gen_trap_ifnofpu(DisasContext * dc) | 828 | static int gen_trap_ifnofpu(DisasContext * dc) |
| 811 | { | 829 | { |
| 812 | #if !defined(CONFIG_USER_ONLY) | 830 | #if !defined(CONFIG_USER_ONLY) |