Commit 12e26b75d49adbd69ce5f00659f5c51d19d45304
1 parent
1b9d9ebb
lahf/sahf cpuid test
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
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6 additions
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9 deletions
target-i386/TODO
| 1 | Correctness issues: | 1 | Correctness issues: |
| 2 | 2 | ||
| 3 | - some eflags manipulation incorrectly reset the bit 0x2. | 3 | - some eflags manipulation incorrectly reset the bit 0x2. |
| 4 | -- rework eflags optimization (will be a consequence of TCG port) | ||
| 5 | - SVM: rework the implementation: simplify code, move most intercept | 4 | - SVM: rework the implementation: simplify code, move most intercept |
| 6 | tests as dynamic, correct segment access, verify exception safety, | 5 | tests as dynamic, correct segment access, verify exception safety, |
| 7 | cpu save/restore, SMM save/restore. | 6 | cpu save/restore, SMM save/restore. |
| 8 | -- x86_64: fxsave/fxrestore intel/amd differences | ||
| 9 | - x86_64: lcall/ljmp intel/amd differences ? | 7 | - x86_64: lcall/ljmp intel/amd differences ? |
| 10 | -- x86_64: cmpxchgl intel/amd differences ? | ||
| 11 | -- x86_64: cmovl intel/amd differences ? | ||
| 12 | -- cmpxchg16b + cmpxchg8b cpuid test | ||
| 13 | -- x86: monitor invalid | ||
| 14 | - better code fetch (different exception handling + CS.limit support) | 8 | - better code fetch (different exception handling + CS.limit support) |
| 15 | - user/kernel PUSHL/POPL in helper.c | 9 | - user/kernel PUSHL/POPL in helper.c |
| 16 | - add missing cpuid tests | 10 | - add missing cpuid tests |
| @@ -27,11 +21,12 @@ Correctness issues: | @@ -27,11 +21,12 @@ Correctness issues: | ||
| 27 | 21 | ||
| 28 | Optimizations/Features: | 22 | Optimizations/Features: |
| 29 | 23 | ||
| 30 | -- finish TCG port | ||
| 31 | - add SVM nested paging support | 24 | - add SVM nested paging support |
| 32 | - add VMX support | 25 | - add VMX support |
| 33 | - add AVX support | 26 | - add AVX support |
| 34 | - add SSE5 support | 27 | - add SSE5 support |
| 28 | +- fxsave/fxrstor AMD extensions | ||
| 29 | +- improve monitor/mwait support | ||
| 35 | - faster EFLAGS update: consider SZAP, C, O can be updated separately | 30 | - faster EFLAGS update: consider SZAP, C, O can be updated separately |
| 36 | with a bit field in CC_OP and more state variables. | 31 | with a bit field in CC_OP and more state variables. |
| 37 | - evaluate x87 stack pointer statically | 32 | - evaluate x87 stack pointer statically |
target-i386/translate.c
| @@ -103,6 +103,7 @@ typedef struct DisasContext { | @@ -103,6 +103,7 @@ typedef struct DisasContext { | ||
| 103 | int cpuid_features; | 103 | int cpuid_features; |
| 104 | int cpuid_ext_features; | 104 | int cpuid_ext_features; |
| 105 | int cpuid_ext2_features; | 105 | int cpuid_ext2_features; |
| 106 | + int cpuid_ext3_features; | ||
| 106 | } DisasContext; | 107 | } DisasContext; |
| 107 | 108 | ||
| 108 | static void gen_eob(DisasContext *s); | 109 | static void gen_eob(DisasContext *s); |
| @@ -5829,7 +5830,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) | @@ -5829,7 +5830,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) | ||
| 5829 | } | 5830 | } |
| 5830 | break; | 5831 | break; |
| 5831 | case 0x9e: /* sahf */ | 5832 | case 0x9e: /* sahf */ |
| 5832 | - if (CODE64(s)) | 5833 | + if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM)) |
| 5833 | goto illegal_op; | 5834 | goto illegal_op; |
| 5834 | gen_op_mov_TN_reg(OT_BYTE, 0, R_AH); | 5835 | gen_op_mov_TN_reg(OT_BYTE, 0, R_AH); |
| 5835 | if (s->cc_op != CC_OP_DYNAMIC) | 5836 | if (s->cc_op != CC_OP_DYNAMIC) |
| @@ -5841,7 +5842,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) | @@ -5841,7 +5842,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) | ||
| 5841 | s->cc_op = CC_OP_EFLAGS; | 5842 | s->cc_op = CC_OP_EFLAGS; |
| 5842 | break; | 5843 | break; |
| 5843 | case 0x9f: /* lahf */ | 5844 | case 0x9f: /* lahf */ |
| 5844 | - if (CODE64(s)) | 5845 | + if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM)) |
| 5845 | goto illegal_op; | 5846 | goto illegal_op; |
| 5846 | if (s->cc_op != CC_OP_DYNAMIC) | 5847 | if (s->cc_op != CC_OP_DYNAMIC) |
| 5847 | gen_op_set_cc_op(s->cc_op); | 5848 | gen_op_set_cc_op(s->cc_op); |
| @@ -7058,6 +7059,7 @@ static inline int gen_intermediate_code_internal(CPUState *env, | @@ -7058,6 +7059,7 @@ static inline int gen_intermediate_code_internal(CPUState *env, | ||
| 7058 | dc->cpuid_features = env->cpuid_features; | 7059 | dc->cpuid_features = env->cpuid_features; |
| 7059 | dc->cpuid_ext_features = env->cpuid_ext_features; | 7060 | dc->cpuid_ext_features = env->cpuid_ext_features; |
| 7060 | dc->cpuid_ext2_features = env->cpuid_ext2_features; | 7061 | dc->cpuid_ext2_features = env->cpuid_ext2_features; |
| 7062 | + dc->cpuid_ext3_features = env->cpuid_ext3_features; | ||
| 7061 | #ifdef TARGET_X86_64 | 7063 | #ifdef TARGET_X86_64 |
| 7062 | dc->lma = (flags >> HF_LMA_SHIFT) & 1; | 7064 | dc->lma = (flags >> HF_LMA_SHIFT) & 1; |
| 7063 | dc->code64 = (flags >> HF_CS64_SHIFT) & 1; | 7065 | dc->code64 = (flags >> HF_CS64_SHIFT) & 1; |