gwj / at91sam9263 · Commits

Commit 105a1f04b5c9250c41e61ebb00cd2d254eb766ab

Authored by blueswir1
1 parent c55497ec

Fix y register loads and stores 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 16 additions and 18 deletions
target-sparc/translate.c
  View file @105a1f0
@@ -713,36 +713,32 @@ static inline void gen_op_tsub_ccTV(TCGv dst, TCGv src1, TCGv src2) @@ -713,36 +713,32 @@ static inline void gen_op_tsub_ccTV(TCGv dst, TCGv src1, TCGv src2)
713 713
714 static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) 714 static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
715 { 715 {
716 - TCGv r_temp, r_temp2; 716 + TCGv r_temp;
717 int l1; 717 int l1;
718 718
719 l1 = gen_new_label(); 719 l1 = gen_new_label();
720 r_temp = tcg_temp_new(TCG_TYPE_TL); 720 r_temp = tcg_temp_new(TCG_TYPE_TL);
721 - r_temp2 = tcg_temp_new(TCG_TYPE_I32);  
722 721
723 /* old op: 722 /* old op:
724 if (!(env->y & 1)) 723 if (!(env->y & 1))
725 T1 = 0; 724 T1 = 0;
726 */ 725 */
727 tcg_gen_mov_tl(cpu_cc_src, src1); 726 tcg_gen_mov_tl(cpu_cc_src, src1);
728 - tcg_gen_ld32u_tl(r_temp, cpu_env, offsetof(CPUSPARCState, y));  
729 - tcg_gen_trunc_tl_i32(r_temp2, r_temp);  
730 - tcg_gen_andi_i32(r_temp2, r_temp2, 0x1); 727 + tcg_gen_ld_tl(r_temp, cpu_env, offsetof(CPUSPARCState, y));
  728 + tcg_gen_andi_tl(r_temp, r_temp, 0x1);
731 tcg_gen_mov_tl(cpu_cc_src2, src2); 729 tcg_gen_mov_tl(cpu_cc_src2, src2);
732 - tcg_gen_brcondi_i32(TCG_COND_NE, r_temp2, 0, l1); 730 + tcg_gen_brcondi_tl(TCG_COND_NE, r_temp, 0, l1);
733 tcg_gen_movi_tl(cpu_cc_src2, 0); 731 tcg_gen_movi_tl(cpu_cc_src2, 0);
734 gen_set_label(l1); 732 gen_set_label(l1);
735 733
736 // b2 = T0 & 1; 734 // b2 = T0 & 1;
737 // env->y = (b2 << 31) | (env->y >> 1); 735 // env->y = (b2 << 31) | (env->y >> 1);
738 - tcg_gen_trunc_tl_i32(r_temp2, cpu_cc_src);  
739 - tcg_gen_andi_i32(r_temp2, r_temp2, 0x1);  
740 - tcg_gen_shli_i32(r_temp2, r_temp2, 31);  
741 - tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, y));  
742 - tcg_gen_shri_i32(cpu_tmp32, cpu_tmp32, 1);  
743 - tcg_gen_or_i32(cpu_tmp32, cpu_tmp32, r_temp2);  
744 - tcg_temp_free(r_temp2);  
745 - tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, y)); 736 + tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1);
  737 + tcg_gen_shli_tl(r_temp, r_temp, 31);
  738 + tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
  739 + tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 1);
  740 + tcg_gen_or_tl(cpu_tmp0, cpu_tmp0, r_temp);
  741 + tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
746 742
747 // b1 = N ^ V; 743 // b1 = N ^ V;
748 gen_mov_reg_N(cpu_tmp0, cpu_psr); 744 gen_mov_reg_N(cpu_tmp0, cpu_psr);
@@ -778,9 +774,10 @@ static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2) @@ -778,9 +774,10 @@ static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2)
778 tcg_gen_mul_i64(r_temp2, r_temp, r_temp2); 774 tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
779 775
780 tcg_gen_shri_i64(r_temp, r_temp2, 32); 776 tcg_gen_shri_i64(r_temp, r_temp2, 32);
781 - tcg_gen_trunc_i64_i32(r_temp, r_temp);  
782 - tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y)); 777 + tcg_gen_trunc_i64_tl(cpu_tmp0, r_temp);
783 tcg_temp_free(r_temp); 778 tcg_temp_free(r_temp);
  779 + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
  780 + tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
784 #ifdef TARGET_SPARC64 781 #ifdef TARGET_SPARC64
785 tcg_gen_mov_i64(dst, r_temp2); 782 tcg_gen_mov_i64(dst, r_temp2);
786 #else 783 #else
@@ -801,9 +798,10 @@ static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2) @@ -801,9 +798,10 @@ static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2)
801 tcg_gen_mul_i64(r_temp2, r_temp, r_temp2); 798 tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
802 799
803 tcg_gen_shri_i64(r_temp, r_temp2, 32); 800 tcg_gen_shri_i64(r_temp, r_temp2, 32);
804 - tcg_gen_trunc_i64_i32(r_temp, r_temp);  
805 - tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y)); 801 + tcg_gen_trunc_i64_tl(cpu_tmp0, r_temp);
806 tcg_temp_free(r_temp); 802 tcg_temp_free(r_temp);
  803 + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
  804 + tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
807 #ifdef TARGET_SPARC64 805 #ifdef TARGET_SPARC64
808 tcg_gen_mov_i64(dst, r_temp2); 806 tcg_gen_mov_i64(dst, r_temp2);
809 #else 807 #else