Commit 0fe5ea89cc108ea0ff5cbc115bd1143196e248ba

Authored by blueswir1
1 parent 775b58d8

Fix Sun4u compile


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3594 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 42 additions and 67 deletions
hw/sun4u.c
@@ -67,23 +67,23 @@ void DMA_register_channel (int nchan, @@ -67,23 +67,23 @@ void DMA_register_channel (int nchan,
67 } 67 }
68 68
69 /* NVRAM helpers */ 69 /* NVRAM helpers */
70 -void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value) 70 +static void nvram_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value)
71 { 71 {
72 m48t59_write(nvram, addr, value); 72 m48t59_write(nvram, addr, value);
73 } 73 }
74 74
75 -uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr) 75 +static uint8_t nvram_get_byte (m48t59_t *nvram, uint32_t addr)
76 { 76 {
77 return m48t59_read(nvram, addr); 77 return m48t59_read(nvram, addr);
78 } 78 }
79 79
80 -void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value) 80 +static void nvram_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value)
81 { 81 {
82 - m48t59_write(nvram, addr, value >> 8);  
83 - m48t59_write(nvram, addr + 1, value & 0xFF); 82 + m48t59_write(nvram, addr++, (value >> 8) & 0xff);
  83 + m48t59_write(nvram, addr++, value & 0xff);
84 } 84 }
85 85
86 -uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr) 86 +static uint16_t nvram_get_word (m48t59_t *nvram, uint32_t addr)
87 { 87 {
88 uint16_t tmp; 88 uint16_t tmp;
89 89
@@ -93,30 +93,18 @@ uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr) @@ -93,30 +93,18 @@ uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr)
93 return tmp; 93 return tmp;
94 } 94 }
95 95
96 -void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value) 96 +static void nvram_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value)
97 { 97 {
98 - m48t59_write(nvram, addr, value >> 24);  
99 - m48t59_write(nvram, addr + 1, (value >> 16) & 0xFF);  
100 - m48t59_write(nvram, addr + 2, (value >> 8) & 0xFF);  
101 - m48t59_write(nvram, addr + 3, value & 0xFF); 98 + m48t59_write(nvram, addr++, value >> 24);
  99 + m48t59_write(nvram, addr++, (value >> 16) & 0xff);
  100 + m48t59_write(nvram, addr++, (value >> 8) & 0xff);
  101 + m48t59_write(nvram, addr++, value & 0xff);
102 } 102 }
103 103
104 -uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr)  
105 -{  
106 - uint32_t tmp;  
107 -  
108 - tmp = m48t59_read(nvram, addr) << 24;  
109 - tmp |= m48t59_read(nvram, addr + 1) << 16;  
110 - tmp |= m48t59_read(nvram, addr + 2) << 8;  
111 - tmp |= m48t59_read(nvram, addr + 3);  
112 -  
113 - return tmp;  
114 -}  
115 -  
116 -void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, 104 +static void nvram_set_string (m48t59_t *nvram, uint32_t addr,
117 const unsigned char *str, uint32_t max) 105 const unsigned char *str, uint32_t max)
118 { 106 {
119 - int i; 107 + unsigned int i;
120 108
121 for (i = 0; i < max && str[i] != '\0'; i++) { 109 for (i = 0; i < max && str[i] != '\0'; i++) {
122 m48t59_write(nvram, addr + i, str[i]); 110 m48t59_write(nvram, addr + i, str[i]);
@@ -124,21 +112,7 @@ void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, @@ -124,21 +112,7 @@ void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
124 m48t59_write(nvram, addr + max - 1, '\0'); 112 m48t59_write(nvram, addr + max - 1, '\0');
125 } 113 }
126 114
127 -int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max)  
128 -{  
129 - int i;  
130 -  
131 - memset(dst, 0, max);  
132 - for (i = 0; i < max; i++) {  
133 - dst[i] = NVRAM_get_byte(nvram, addr + i);  
134 - if (dst[i] == '\0')  
135 - break;  
136 - }  
137 -  
138 - return i;  
139 -}  
140 -  
141 -static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value) 115 +static uint16_t nvram_crc_update (uint16_t prev, uint16_t value)
142 { 116 {
143 uint16_t tmp; 117 uint16_t tmp;
144 uint16_t pd, pd1, pd2; 118 uint16_t pd, pd1, pd2;
@@ -153,7 +127,8 @@ static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value) @@ -153,7 +127,8 @@ static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value)
153 return tmp; 127 return tmp;
154 } 128 }
155 129
156 -uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count) 130 +static uint16_t nvram_compute_crc (m48t59_t *nvram, uint32_t start,
  131 + uint32_t count)
157 { 132 {
158 uint32_t i; 133 uint32_t i;
159 uint16_t crc = 0xFFFF; 134 uint16_t crc = 0xFFFF;
@@ -162,10 +137,10 @@ uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count) @@ -162,10 +137,10 @@ uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count)
162 odd = count & 1; 137 odd = count & 1;
163 count &= ~1; 138 count &= ~1;
164 for (i = 0; i != count; i++) { 139 for (i = 0; i != count; i++) {
165 - crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i)); 140 + crc = nvram_crc_update(crc, nvram_get_word(nvram, start + i));
166 } 141 }
167 if (odd) { 142 if (odd) {
168 - crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8); 143 + crc = nvram_crc_update(crc, nvram_get_byte(nvram, start + i) << 8);
169 } 144 }
170 145
171 return crc; 146 return crc;
@@ -177,7 +152,7 @@ static uint32_t nvram_set_var (m48t59_t *nvram, uint32_t addr, @@ -177,7 +152,7 @@ static uint32_t nvram_set_var (m48t59_t *nvram, uint32_t addr,
177 uint32_t len; 152 uint32_t len;
178 153
179 len = strlen(str) + 1; 154 len = strlen(str) + 1;
180 - NVRAM_set_string(nvram, addr, str, len); 155 + nvram_set_string(nvram, addr, str, len);
181 156
182 return addr + len; 157 return addr + len;
183 } 158 }
@@ -215,39 +190,39 @@ int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, @@ -215,39 +190,39 @@ int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
215 uint32_t start, end; 190 uint32_t start, end;
216 191
217 /* Set parameters for Open Hack'Ware BIOS */ 192 /* Set parameters for Open Hack'Ware BIOS */
218 - NVRAM_set_string(nvram, 0x00, "QEMU_BIOS", 16);  
219 - NVRAM_set_lword(nvram, 0x10, 0x00000002); /* structure v2 */  
220 - NVRAM_set_word(nvram, 0x14, NVRAM_size);  
221 - NVRAM_set_string(nvram, 0x20, arch, 16);  
222 - NVRAM_set_byte(nvram, 0x2f, nographic & 0xff);  
223 - NVRAM_set_lword(nvram, 0x30, RAM_size);  
224 - NVRAM_set_byte(nvram, 0x34, boot_device);  
225 - NVRAM_set_lword(nvram, 0x38, kernel_image);  
226 - NVRAM_set_lword(nvram, 0x3C, kernel_size); 193 + nvram_set_string(nvram, 0x00, "QEMU_BIOS", 16);
  194 + nvram_set_lword(nvram, 0x10, 0x00000002); /* structure v2 */
  195 + nvram_set_word(nvram, 0x14, NVRAM_size);
  196 + nvram_set_string(nvram, 0x20, arch, 16);
  197 + nvram_set_byte(nvram, 0x2f, nographic & 0xff);
  198 + nvram_set_lword(nvram, 0x30, RAM_size);
  199 + nvram_set_byte(nvram, 0x34, boot_device);
  200 + nvram_set_lword(nvram, 0x38, kernel_image);
  201 + nvram_set_lword(nvram, 0x3C, kernel_size);
227 if (cmdline) { 202 if (cmdline) {
228 /* XXX: put the cmdline in NVRAM too ? */ 203 /* XXX: put the cmdline in NVRAM too ? */
229 strcpy(phys_ram_base + CMDLINE_ADDR, cmdline); 204 strcpy(phys_ram_base + CMDLINE_ADDR, cmdline);
230 - NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR);  
231 - NVRAM_set_lword(nvram, 0x44, strlen(cmdline)); 205 + nvram_set_lword(nvram, 0x40, CMDLINE_ADDR);
  206 + nvram_set_lword(nvram, 0x44, strlen(cmdline));
232 } else { 207 } else {
233 - NVRAM_set_lword(nvram, 0x40, 0);  
234 - NVRAM_set_lword(nvram, 0x44, 0); 208 + nvram_set_lword(nvram, 0x40, 0);
  209 + nvram_set_lword(nvram, 0x44, 0);
235 } 210 }
236 - NVRAM_set_lword(nvram, 0x48, initrd_image);  
237 - NVRAM_set_lword(nvram, 0x4C, initrd_size);  
238 - NVRAM_set_lword(nvram, 0x50, NVRAM_image); 211 + nvram_set_lword(nvram, 0x48, initrd_image);
  212 + nvram_set_lword(nvram, 0x4C, initrd_size);
  213 + nvram_set_lword(nvram, 0x50, NVRAM_image);
239 214
240 - NVRAM_set_word(nvram, 0x54, width);  
241 - NVRAM_set_word(nvram, 0x56, height);  
242 - NVRAM_set_word(nvram, 0x58, depth);  
243 - crc = NVRAM_compute_crc(nvram, 0x00, 0xF8);  
244 - NVRAM_set_word(nvram, 0xFC, crc); 215 + nvram_set_word(nvram, 0x54, width);
  216 + nvram_set_word(nvram, 0x56, height);
  217 + nvram_set_word(nvram, 0x58, depth);
  218 + crc = nvram_compute_crc(nvram, 0x00, 0xF8);
  219 + nvram_set_word(nvram, 0xFC, crc);
245 220
246 // OpenBIOS nvram variables 221 // OpenBIOS nvram variables
247 // Variable partition 222 // Variable partition
248 start = 256; 223 start = 256;
249 m48t59_write(nvram, start, 0x70); 224 m48t59_write(nvram, start, 0x70);
250 - NVRAM_set_string(nvram, start + 4, "system", 12); 225 + nvram_set_string(nvram, start + 4, "system", 12);
251 226
252 end = start + 16; 227 end = start + 16;
253 for (i = 0; i < nb_prom_envs; i++) 228 for (i = 0; i < nb_prom_envs; i++)
@@ -260,7 +235,7 @@ int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, @@ -260,7 +235,7 @@ int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
260 // free partition 235 // free partition
261 start = end; 236 start = end;
262 m48t59_write(nvram, start, 0x7f); 237 m48t59_write(nvram, start, 0x7f);
263 - NVRAM_set_string(nvram, start + 4, "free", 12); 238 + nvram_set_string(nvram, start + 4, "free", 12);
264 239
265 end = 0x1fd0; 240 end = 0x1fd0;
266 nvram_finish_partition(nvram, start, end); 241 nvram_finish_partition(nvram, start, end);