Commit 0c0ed03b404a93a76c9e5345ed2d0d4dc381fb99

Authored by aurel32
1 parent 864951af

target-mips: fix divu instruction

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6949 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 2 additions and 0 deletions
target-mips/translate.c
@@ -1847,6 +1847,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, @@ -1847,6 +1847,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1847 { 1847 {
1848 int l1 = gen_new_label(); 1848 int l1 = gen_new_label();
1849 1849
  1850 + tcg_gen_ext32u_tl(t0, t0);
  1851 + tcg_gen_ext32u_tl(t1, t1);
1850 tcg_gen_brcondi_tl(TCG_COND_EQ, t1, 0, l1); 1852 tcg_gen_brcondi_tl(TCG_COND_EQ, t1, 0, l1);
1851 tcg_gen_divu_tl(cpu_LO[0], t0, t1); 1853 tcg_gen_divu_tl(cpu_LO[0], t0, t1);
1852 tcg_gen_remu_tl(cpu_HI[0], t0, t1); 1854 tcg_gen_remu_tl(cpu_HI[0], t0, t1);