Commit 0bf9e31af1cc2915c9d250aab0ada0878df897ee

Authored by Blue Swirl
1 parent c0a2a096

Fix most warnings (errors with -Werror) when debugging is enabled

I used the following command to enable debugging:
perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/*

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
block/qcow2-refcount.c
@@ -277,7 +277,7 @@ static int update_refcount(BlockDriverState *bs, @@ -277,7 +277,7 @@ static int update_refcount(BlockDriverState *bs,
277 int first_index = -1, last_index = -1; 277 int first_index = -1, last_index = -1;
278 278
279 #ifdef DEBUG_ALLOC2 279 #ifdef DEBUG_ALLOC2
280 - printf("update_refcount: offset=%lld size=%lld addend=%d\n", 280 + printf("update_refcount: offset=%" PRId64 " size=%" PRId64 " addend=%d\n",
281 offset, length, addend); 281 offset, length, addend);
282 #endif 282 #endif
283 if (length <= 0) 283 if (length <= 0)
@@ -380,7 +380,7 @@ retry: @@ -380,7 +380,7 @@ retry:
380 goto retry; 380 goto retry;
381 } 381 }
382 #ifdef DEBUG_ALLOC2 382 #ifdef DEBUG_ALLOC2
383 - printf("alloc_clusters: size=%lld -> %lld\n", 383 + printf("alloc_clusters: size=%" PRId64 " -> %" PRId64 "\n",
384 size, 384 size,
385 (s->free_cluster_index - nb_clusters) << s->cluster_bits); 385 (s->free_cluster_index - nb_clusters) << s->cluster_bits);
386 #endif 386 #endif
block/raw-posix.c
@@ -24,6 +24,7 @@ @@ -24,6 +24,7 @@
24 #include "qemu-common.h" 24 #include "qemu-common.h"
25 #include "qemu-timer.h" 25 #include "qemu-timer.h"
26 #include "qemu-char.h" 26 #include "qemu-char.h"
  27 +#include "qemu-log.h"
27 #include "block_int.h" 28 #include "block_int.h"
28 #include "module.h" 29 #include "module.h"
29 #ifdef CONFIG_AIO 30 #ifdef CONFIG_AIO
buffered_file.c
@@ -113,7 +113,7 @@ static int buffered_put_buffer(void *opaque, const uint8_t *buf, int64_t pos, in @@ -113,7 +113,7 @@ static int buffered_put_buffer(void *opaque, const uint8_t *buf, int64_t pos, in
113 int offset = 0; 113 int offset = 0;
114 ssize_t ret; 114 ssize_t ret;
115 115
116 - dprintf("putting %ld bytes at %Ld\n", size, pos); 116 + dprintf("putting %d bytes at %" PRId64 "\n", size, pos);
117 117
118 if (s->has_error) { 118 if (s->has_error) {
119 dprintf("flush when error, bailing\n"); 119 dprintf("flush when error, bailing\n");
@@ -151,7 +151,7 @@ static int buffered_put_buffer(void *opaque, const uint8_t *buf, int64_t pos, in @@ -151,7 +151,7 @@ static int buffered_put_buffer(void *opaque, const uint8_t *buf, int64_t pos, in
151 } 151 }
152 152
153 if (offset >= 0) { 153 if (offset >= 0) {
154 - dprintf("buffering %ld bytes\n", size - offset); 154 + dprintf("buffering %d bytes\n", size - offset);
155 buffered_append(s, buf + offset, size - offset); 155 buffered_append(s, buf + offset, size - offset);
156 offset = size; 156 offset = size;
157 } 157 }
@@ -655,7 +655,8 @@ static void tb_invalidate_check(target_ulong address) @@ -655,7 +655,8 @@ static void tb_invalidate_check(target_ulong address)
655 for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) { 655 for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {
656 if (!(address + TARGET_PAGE_SIZE <= tb->pc || 656 if (!(address + TARGET_PAGE_SIZE <= tb->pc ||
657 address >= tb->pc + tb->size)) { 657 address >= tb->pc + tb->size)) {
658 - printf("ERROR invalidate: address=%08lx PC=%08lx size=%04x\n", 658 + printf("ERROR invalidate: address=" TARGET_FMT_lx
  659 + " PC=%08lx size=%04x\n",
659 address, (long)tb->pc, tb->size); 660 address, (long)tb->pc, tb->size);
660 } 661 }
661 } 662 }
@@ -680,26 +681,6 @@ static void tb_page_check(void) @@ -680,26 +681,6 @@ static void tb_page_check(void)
680 } 681 }
681 } 682 }
682 683
683 -static void tb_jmp_check(TranslationBlock *tb)  
684 -{  
685 - TranslationBlock *tb1;  
686 - unsigned int n1;  
687 -  
688 - /* suppress any remaining jumps to this TB */  
689 - tb1 = tb->jmp_first;  
690 - for(;;) {  
691 - n1 = (long)tb1 & 3;  
692 - tb1 = (TranslationBlock *)((long)tb1 & ~3);  
693 - if (n1 == 2)  
694 - break;  
695 - tb1 = tb1->jmp_next[n1];  
696 - }  
697 - /* check end of list */  
698 - if (tb1 != tb) {  
699 - printf("ERROR: jmp_list from 0x%08lx\n", (long)tb);  
700 - }  
701 -}  
702 -  
703 #endif 684 #endif
704 685
705 /* invalidate one TB */ 686 /* invalidate one TB */
@@ -2939,7 +2920,7 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, @@ -2939,7 +2920,7 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
2939 idx = SUBPAGE_IDX(start); 2920 idx = SUBPAGE_IDX(start);
2940 eidx = SUBPAGE_IDX(end); 2921 eidx = SUBPAGE_IDX(end);
2941 #if defined(DEBUG_SUBPAGE) 2922 #if defined(DEBUG_SUBPAGE)
2942 - printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %d\n", __func__, 2923 + printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld\n", __func__,
2943 mmio, start, end, idx, eidx, memory); 2924 mmio, start, end, idx, eidx, memory);
2944 #endif 2925 #endif
2945 memory >>= IO_MEM_SHIFT; 2926 memory >>= IO_MEM_SHIFT;
hw/cirrus_vga.c
@@ -2029,7 +2029,7 @@ static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr) @@ -2029,7 +2029,7 @@ static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr)
2029 } else { 2029 } else {
2030 val = 0xff; 2030 val = 0xff;
2031 #ifdef DEBUG_CIRRUS 2031 #ifdef DEBUG_CIRRUS
2032 - printf("cirrus: mem_readb %06x\n", addr); 2032 + printf("cirrus: mem_readb " TARGET_FMT_plx "\n", addr);
2033 #endif 2033 #endif
2034 } 2034 }
2035 return val; 2035 return val;
@@ -2124,7 +2124,8 @@ static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr, @@ -2124,7 +2124,8 @@ static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr,
2124 } 2124 }
2125 } else { 2125 } else {
2126 #ifdef DEBUG_CIRRUS 2126 #ifdef DEBUG_CIRRUS
2127 - printf("cirrus: mem_writeb %06x value %02x\n", addr, mem_value); 2127 + printf("cirrus: mem_writeb " TARGET_FMT_plx " value %02x\n", addr,
  2128 + mem_value);
2128 #endif 2129 #endif
2129 } 2130 }
2130 } 2131 }
hw/i8259.c
@@ -25,6 +25,7 @@ @@ -25,6 +25,7 @@
25 #include "pc.h" 25 #include "pc.h"
26 #include "isa.h" 26 #include "isa.h"
27 #include "monitor.h" 27 #include "monitor.h"
  28 +#include "qemu-timer.h"
28 29
29 /* debug PIC */ 30 /* debug PIC */
30 //#define DEBUG_PIC 31 //#define DEBUG_PIC
hw/openpic.c
@@ -592,7 +592,7 @@ static void openpic_gbl_write (void *opaque, target_phys_addr_t addr, uint32_t v @@ -592,7 +592,7 @@ static void openpic_gbl_write (void *opaque, target_phys_addr_t addr, uint32_t v
592 IRQ_dst_t *dst; 592 IRQ_dst_t *dst;
593 int idx; 593 int idx;
594 594
595 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 595 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
596 if (addr & 0xF) 596 if (addr & 0xF)
597 return; 597 return;
598 #if defined TARGET_WORDS_BIGENDIAN 598 #if defined TARGET_WORDS_BIGENDIAN
@@ -651,7 +651,7 @@ static uint32_t openpic_gbl_read (void *opaque, target_phys_addr_t addr) @@ -651,7 +651,7 @@ static uint32_t openpic_gbl_read (void *opaque, target_phys_addr_t addr)
651 openpic_t *opp = opaque; 651 openpic_t *opp = opaque;
652 uint32_t retval; 652 uint32_t retval;
653 653
654 - DPRINTF("%s: addr %08x\n", __func__, addr); 654 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
655 retval = 0xFFFFFFFF; 655 retval = 0xFFFFFFFF;
656 if (addr & 0xF) 656 if (addr & 0xF)
657 return retval; 657 return retval;
@@ -824,7 +824,7 @@ static void openpic_cpu_write (void *opaque, target_phys_addr_t addr, uint32_t v @@ -824,7 +824,7 @@ static void openpic_cpu_write (void *opaque, target_phys_addr_t addr, uint32_t v
824 IRQ_dst_t *dst; 824 IRQ_dst_t *dst;
825 int idx, s_IRQ, n_IRQ; 825 int idx, s_IRQ, n_IRQ;
826 826
827 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 827 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
828 if (addr & 0xF) 828 if (addr & 0xF)
829 return; 829 return;
830 #if defined TARGET_WORDS_BIGENDIAN 830 #if defined TARGET_WORDS_BIGENDIAN
@@ -886,7 +886,7 @@ static uint32_t openpic_cpu_read (void *opaque, target_phys_addr_t addr) @@ -886,7 +886,7 @@ static uint32_t openpic_cpu_read (void *opaque, target_phys_addr_t addr)
886 uint32_t retval; 886 uint32_t retval;
887 int idx, n_IRQ; 887 int idx, n_IRQ;
888 888
889 - DPRINTF("%s: addr %08x\n", __func__, addr); 889 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
890 retval = 0xFFFFFFFF; 890 retval = 0xFFFFFFFF;
891 if (addr & 0xF) 891 if (addr & 0xF)
892 return retval; 892 return retval;
@@ -1264,8 +1264,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, @@ -1264,8 +1264,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
1264 static void mpic_irq_raise(openpic_t *mpp, int n_CPU, IRQ_src_t *src) 1264 static void mpic_irq_raise(openpic_t *mpp, int n_CPU, IRQ_src_t *src)
1265 { 1265 {
1266 int n_ci = IDR_CI0 - n_CPU; 1266 int n_ci = IDR_CI0 - n_CPU;
1267 - DPRINTF("%s: cpu:%d irq:%d (testbit idr:%x ci:%d)\n", __func__,  
1268 - n_CPU, n_IRQ, mpp->src[n_IRQ].ide, n_ci); 1267 +
1269 if(test_bit(&src->ide, n_ci)) { 1268 if(test_bit(&src->ide, n_ci)) {
1270 qemu_irq_raise(mpp->dst[n_CPU].irqs[OPENPIC_OUTPUT_CINT]); 1269 qemu_irq_raise(mpp->dst[n_CPU].irqs[OPENPIC_OUTPUT_CINT]);
1271 } 1270 }
@@ -1313,7 +1312,7 @@ static void mpic_timer_write (void *opaque, target_phys_addr_t addr, uint32_t va @@ -1313,7 +1312,7 @@ static void mpic_timer_write (void *opaque, target_phys_addr_t addr, uint32_t va
1313 openpic_t *mpp = opaque; 1312 openpic_t *mpp = opaque;
1314 int idx, cpu; 1313 int idx, cpu;
1315 1314
1316 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 1315 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
1317 if (addr & 0xF) 1316 if (addr & 0xF)
1318 return; 1317 return;
1319 addr &= 0xFFFF; 1318 addr &= 0xFFFF;
@@ -1347,7 +1346,7 @@ static uint32_t mpic_timer_read (void *opaque, target_phys_addr_t addr) @@ -1347,7 +1346,7 @@ static uint32_t mpic_timer_read (void *opaque, target_phys_addr_t addr)
1347 uint32_t retval; 1346 uint32_t retval;
1348 int idx, cpu; 1347 int idx, cpu;
1349 1348
1350 - DPRINTF("%s: addr %08x\n", __func__, addr); 1349 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
1351 retval = 0xFFFFFFFF; 1350 retval = 0xFFFFFFFF;
1352 if (addr & 0xF) 1351 if (addr & 0xF)
1353 return retval; 1352 return retval;
@@ -1382,7 +1381,7 @@ static void mpic_src_ext_write (void *opaque, target_phys_addr_t addr, @@ -1382,7 +1381,7 @@ static void mpic_src_ext_write (void *opaque, target_phys_addr_t addr,
1382 openpic_t *mpp = opaque; 1381 openpic_t *mpp = opaque;
1383 int idx = MPIC_EXT_IRQ; 1382 int idx = MPIC_EXT_IRQ;
1384 1383
1385 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 1384 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
1386 if (addr & 0xF) 1385 if (addr & 0xF)
1387 return; 1386 return;
1388 1387
@@ -1405,7 +1404,7 @@ static uint32_t mpic_src_ext_read (void *opaque, target_phys_addr_t addr) @@ -1405,7 +1404,7 @@ static uint32_t mpic_src_ext_read (void *opaque, target_phys_addr_t addr)
1405 uint32_t retval; 1404 uint32_t retval;
1406 int idx = MPIC_EXT_IRQ; 1405 int idx = MPIC_EXT_IRQ;
1407 1406
1408 - DPRINTF("%s: addr %08x\n", __func__, addr); 1407 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
1409 retval = 0xFFFFFFFF; 1408 retval = 0xFFFFFFFF;
1410 if (addr & 0xF) 1409 if (addr & 0xF)
1411 return retval; 1410 return retval;
@@ -1432,7 +1431,7 @@ static void mpic_src_int_write (void *opaque, target_phys_addr_t addr, @@ -1432,7 +1431,7 @@ static void mpic_src_int_write (void *opaque, target_phys_addr_t addr,
1432 openpic_t *mpp = opaque; 1431 openpic_t *mpp = opaque;
1433 int idx = MPIC_INT_IRQ; 1432 int idx = MPIC_INT_IRQ;
1434 1433
1435 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 1434 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
1436 if (addr & 0xF) 1435 if (addr & 0xF)
1437 return; 1436 return;
1438 1437
@@ -1455,7 +1454,7 @@ static uint32_t mpic_src_int_read (void *opaque, target_phys_addr_t addr) @@ -1455,7 +1454,7 @@ static uint32_t mpic_src_int_read (void *opaque, target_phys_addr_t addr)
1455 uint32_t retval; 1454 uint32_t retval;
1456 int idx = MPIC_INT_IRQ; 1455 int idx = MPIC_INT_IRQ;
1457 1456
1458 - DPRINTF("%s: addr %08x\n", __func__, addr); 1457 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
1459 retval = 0xFFFFFFFF; 1458 retval = 0xFFFFFFFF;
1460 if (addr & 0xF) 1459 if (addr & 0xF)
1461 return retval; 1460 return retval;
@@ -1482,7 +1481,7 @@ static void mpic_src_msg_write (void *opaque, target_phys_addr_t addr, @@ -1482,7 +1481,7 @@ static void mpic_src_msg_write (void *opaque, target_phys_addr_t addr,
1482 openpic_t *mpp = opaque; 1481 openpic_t *mpp = opaque;
1483 int idx = MPIC_MSG_IRQ; 1482 int idx = MPIC_MSG_IRQ;
1484 1483
1485 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 1484 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
1486 if (addr & 0xF) 1485 if (addr & 0xF)
1487 return; 1486 return;
1488 1487
@@ -1505,7 +1504,7 @@ static uint32_t mpic_src_msg_read (void *opaque, target_phys_addr_t addr) @@ -1505,7 +1504,7 @@ static uint32_t mpic_src_msg_read (void *opaque, target_phys_addr_t addr)
1505 uint32_t retval; 1504 uint32_t retval;
1506 int idx = MPIC_MSG_IRQ; 1505 int idx = MPIC_MSG_IRQ;
1507 1506
1508 - DPRINTF("%s: addr %08x\n", __func__, addr); 1507 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
1509 retval = 0xFFFFFFFF; 1508 retval = 0xFFFFFFFF;
1510 if (addr & 0xF) 1509 if (addr & 0xF)
1511 return retval; 1510 return retval;
@@ -1532,7 +1531,7 @@ static void mpic_src_msi_write (void *opaque, target_phys_addr_t addr, @@ -1532,7 +1531,7 @@ static void mpic_src_msi_write (void *opaque, target_phys_addr_t addr,
1532 openpic_t *mpp = opaque; 1531 openpic_t *mpp = opaque;
1533 int idx = MPIC_MSI_IRQ; 1532 int idx = MPIC_MSI_IRQ;
1534 1533
1535 - DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val); 1534 + DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
1536 if (addr & 0xF) 1535 if (addr & 0xF)
1537 return; 1536 return;
1538 1537
@@ -1554,7 +1553,7 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr) @@ -1554,7 +1553,7 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
1554 uint32_t retval; 1553 uint32_t retval;
1555 int idx = MPIC_MSI_IRQ; 1554 int idx = MPIC_MSI_IRQ;
1556 1555
1557 - DPRINTF("%s: addr %08x\n", __func__, addr); 1556 + DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
1558 retval = 0xFFFFFFFF; 1557 retval = 0xFFFFFFFF;
1559 if (addr & 0xF) 1558 if (addr & 0xF)
1560 return retval; 1559 return retval;
hw/ppc_prep.c
@@ -60,7 +60,8 @@ do { \ @@ -60,7 +60,8 @@ do { \
60 } \ 60 } \
61 } while (0) 61 } while (0)
62 #elif defined (DEBUG_PPC_IO) 62 #elif defined (DEBUG_PPC_IO)
63 -#define PPC_IO_DPRINTF(fmt, ...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__) 63 +#define PPC_IO_DPRINTF(fmt, ...) \
  64 +qemu_log_mask(CPU_LOG_IOPORT, fmt, ## __VA_ARGS__)
64 #else 65 #else
65 #define PPC_IO_DPRINTF(fmt, ...) do { } while (0) 66 #define PPC_IO_DPRINTF(fmt, ...) do { } while (0)
66 #endif 67 #endif
hw/scsi-disk.c
@@ -172,7 +172,7 @@ static void scsi_read_complete(void * opaque, int ret) @@ -172,7 +172,7 @@ static void scsi_read_complete(void * opaque, int ret)
172 scsi_command_complete(r, STATUS_CHECK_CONDITION, SENSE_NO_SENSE); 172 scsi_command_complete(r, STATUS_CHECK_CONDITION, SENSE_NO_SENSE);
173 return; 173 return;
174 } 174 }
175 - DPRINTF("Data ready tag=0x%x len=%d\n", r->tag, r->iov.iov_len); 175 + DPRINTF("Data ready tag=0x%x len=%" PRId64 "\n", r->tag, r->iov.iov_len);
176 176
177 s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len); 177 s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len);
178 } 178 }
@@ -192,7 +192,7 @@ static void scsi_read_data(SCSIDevice *d, uint32_t tag) @@ -192,7 +192,7 @@ static void scsi_read_data(SCSIDevice *d, uint32_t tag)
192 return; 192 return;
193 } 193 }
194 if (r->sector_count == (uint32_t)-1) { 194 if (r->sector_count == (uint32_t)-1) {
195 - DPRINTF("Read buf_len=%d\n", r->iov.iov_len); 195 + DPRINTF("Read buf_len=%" PRId64 "\n", r->iov.iov_len);
196 r->sector_count = 0; 196 r->sector_count = 0;
197 s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len); 197 s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len);
198 return; 198 return;
@@ -777,7 +777,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag, @@ -777,7 +777,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
777 case 0x08: 777 case 0x08:
778 case 0x28: 778 case 0x28:
779 case 0x88: 779 case 0x88:
780 - DPRINTF("Read (sector %lld, count %d)\n", lba, len); 780 + DPRINTF("Read (sector %" PRId64 ", count %d)\n", lba, len);
781 if (lba > s->max_lba) 781 if (lba > s->max_lba)
782 goto illegal_lba; 782 goto illegal_lba;
783 r->sector = lba * s->cluster_size; 783 r->sector = lba * s->cluster_size;
@@ -786,7 +786,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag, @@ -786,7 +786,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
786 case 0x0a: 786 case 0x0a:
787 case 0x2a: 787 case 0x2a:
788 case 0x8a: 788 case 0x8a:
789 - DPRINTF("Write (sector %lld, count %d)\n", lba, len); 789 + DPRINTF("Write (sector %" PRId64 ", count %d)\n", lba, len);
790 if (lba > s->max_lba) 790 if (lba > s->max_lba)
791 goto illegal_lba; 791 goto illegal_lba;
792 r->sector = lba * s->cluster_size; 792 r->sector = lba * s->cluster_size;
@@ -794,7 +794,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag, @@ -794,7 +794,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
794 is_write = 1; 794 is_write = 1;
795 break; 795 break;
796 case 0x35: 796 case 0x35:
797 - DPRINTF("Synchronise cache (sector %d, count %d)\n", lba, len); 797 + DPRINTF("Synchronise cache (sector %" PRId64 ", count %d)\n", lba, len);
798 bdrv_flush(s->bdrv); 798 bdrv_flush(s->bdrv);
799 break; 799 break;
800 case 0x43: 800 case 0x43:
@@ -896,7 +896,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag, @@ -896,7 +896,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
896 r->iov.iov_len = 16; 896 r->iov.iov_len = 16;
897 break; 897 break;
898 case 0x2f: 898 case 0x2f:
899 - DPRINTF("Verify (sector %d, count %d)\n", lba, len); 899 + DPRINTF("Verify (sector %" PRId64 ", count %d)\n", lba, len);
900 break; 900 break;
901 default: 901 default:
902 DPRINTF("Unknown SCSI command (%2.2x)\n", buf[0]); 902 DPRINTF("Unknown SCSI command (%2.2x)\n", buf[0]);
hw/slavio_timer.c
@@ -197,8 +197,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, @@ -197,8 +197,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
197 s->counthigh = val & (TIMER_MAX_COUNT64 >> 32); 197 s->counthigh = val & (TIMER_MAX_COUNT64 >> 32);
198 s->reached = 0; 198 s->reached = 0;
199 count = ((uint64_t)s->counthigh << 32) | s->count; 199 count = ((uint64_t)s->counthigh << 32) | s->count;
200 - DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,  
201 - count); 200 + DPRINTF("processor %d user timer set to %016" PRIx64 "\n",
  201 + s->slave_index, count);
202 if (s->timer) 202 if (s->timer)
203 ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count)); 203 ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
204 } else { 204 } else {
@@ -223,8 +223,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, @@ -223,8 +223,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
223 s->count = val & TIMER_MAX_COUNT64; 223 s->count = val & TIMER_MAX_COUNT64;
224 s->reached = 0; 224 s->reached = 0;
225 count = ((uint64_t)s->counthigh) << 32 | s->count; 225 count = ((uint64_t)s->counthigh) << 32 | s->count;
226 - DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,  
227 - count); 226 + DPRINTF("processor %d user timer set to %016" PRIx64 "\n",
  227 + s->slave_index, count);
228 if (s->timer) 228 if (s->timer)
229 ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count)); 229 ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
230 } else 230 } else
hw/sun4c_intctl.c
@@ -107,9 +107,9 @@ void sun4c_irq_info(Monitor *mon, void *opaque) @@ -107,9 +107,9 @@ void sun4c_irq_info(Monitor *mon, void *opaque)
107 int64_t count; 107 int64_t count;
108 108
109 monitor_printf(mon, "IRQ statistics:\n"); 109 monitor_printf(mon, "IRQ statistics:\n");
110 - count = s->irq_count[i]; 110 + count = s->irq_count;
111 if (count > 0) 111 if (count > 0)
112 - monitor_printf(mon, "%2d: %" PRId64 "\n", i, count); 112 + monitor_printf(mon, " %" PRId64 "\n", count);
113 #endif 113 #endif
114 } 114 }
115 115
@@ -121,7 +121,6 @@ static void sun4c_check_interrupts(void *opaque) @@ -121,7 +121,6 @@ static void sun4c_check_interrupts(void *opaque)
121 uint32_t pil_pending; 121 uint32_t pil_pending;
122 unsigned int i; 122 unsigned int i;
123 123
124 - DPRINTF("pending %x disabled %x\n", pending, s->intregm_disabled);  
125 pil_pending = 0; 124 pil_pending = 0;
126 if (s->pending && !(s->reg & 0x80000000)) { 125 if (s->pending && !(s->reg & 0x80000000)) {
127 for (i = 0; i < 8; i++) { 126 for (i = 0; i < 8; i++) {
@@ -156,7 +155,7 @@ static void sun4c_set_irq(void *opaque, int irq, int level) @@ -156,7 +155,7 @@ static void sun4c_set_irq(void *opaque, int irq, int level)
156 if (pil > 0) { 155 if (pil > 0) {
157 if (level) { 156 if (level) {
158 #ifdef DEBUG_IRQ_COUNT 157 #ifdef DEBUG_IRQ_COUNT
159 - s->irq_count[pil]++; 158 + s->irq_count++;
160 #endif 159 #endif
161 s->pending |= mask; 160 s->pending |= mask;
162 } else { 161 } else {
hw/usb-ohci.c
@@ -905,7 +905,7 @@ static int ohci_service_td(OHCIState *ohci, struct ohci_ed *ed) @@ -905,7 +905,7 @@ static int ohci_service_td(OHCIState *ohci, struct ohci_ed *ed)
905 905
906 flag_r = (td.flags & OHCI_TD_R) != 0; 906 flag_r = (td.flags & OHCI_TD_R) != 0;
907 #ifdef DEBUG_PACKET 907 #ifdef DEBUG_PACKET
908 - dprintf(" TD @ 0x%.8x %u bytes %s r=%d cbp=0x%.8x be=0x%.8x\n", 908 + dprintf(" TD @ 0x%.8x %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x\n",
909 addr, len, str, flag_r, td.cbp, td.be); 909 addr, len, str, flag_r, td.cbp, td.be);
910 910
911 if (len > 0 && dir != OHCI_TD_DIR_IN) { 911 if (len > 0 && dir != OHCI_TD_DIR_IN) {
@@ -1677,7 +1677,7 @@ static void usb_ohci_init(OHCIState *ohci, int num_ports, int devfn, @@ -1677,7 +1677,7 @@ static void usb_ohci_init(OHCIState *ohci, int num_ports, int devfn,
1677 usb_bit_time = 1; 1677 usb_bit_time = 1;
1678 } 1678 }
1679 #endif 1679 #endif
1680 - dprintf("usb-ohci: usb_bit_time=%lli usb_frame_time=%lli\n", 1680 + dprintf("usb-ohci: usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64 "\n",
1681 usb_frame_time, usb_bit_time); 1681 usb_frame_time, usb_bit_time);
1682 } 1682 }
1683 1683
hw/usb-uhci.c
@@ -72,7 +72,7 @@ @@ -72,7 +72,7 @@
72 #ifdef DEBUG 72 #ifdef DEBUG
73 #define dprintf printf 73 #define dprintf printf
74 74
75 -const char *pid2str(int pid) 75 +static const char *pid2str(int pid)
76 { 76 {
77 switch (pid) { 77 switch (pid) {
78 case USB_TOKEN_SETUP: return "SETUP"; 78 case USB_TOKEN_SETUP: return "SETUP";
hw/vga.c
@@ -799,7 +799,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -799,7 +799,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
799 uint32_t write_mask, bit_mask, set_mask; 799 uint32_t write_mask, bit_mask, set_mask;
800 800
801 #ifdef DEBUG_VGA_MEM 801 #ifdef DEBUG_VGA_MEM
802 - printf("vga: [0x%x] = 0x%02x\n", addr, val); 802 + printf("vga: [0x" TARGET_FMT_plx "] = 0x%02x\n", addr, val);
803 #endif 803 #endif
804 /* convert to VGA memory offset */ 804 /* convert to VGA memory offset */
805 memory_map_mode = (s->gr[6] >> 2) & 3; 805 memory_map_mode = (s->gr[6] >> 2) & 3;
@@ -832,7 +832,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -832,7 +832,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
832 if (s->sr[2] & mask) { 832 if (s->sr[2] & mask) {
833 s->vram_ptr[addr] = val; 833 s->vram_ptr[addr] = val;
834 #ifdef DEBUG_VGA_MEM 834 #ifdef DEBUG_VGA_MEM
835 - printf("vga: chain4: [0x%x]\n", addr); 835 + printf("vga: chain4: [0x" TARGET_FMT_plx "]\n", addr);
836 #endif 836 #endif
837 s->plane_updated |= mask; /* only used to detect font change */ 837 s->plane_updated |= mask; /* only used to detect font change */
838 cpu_physical_memory_set_dirty(s->vram_offset + addr); 838 cpu_physical_memory_set_dirty(s->vram_offset + addr);
@@ -845,7 +845,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -845,7 +845,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
845 addr = ((addr & ~1) << 1) | plane; 845 addr = ((addr & ~1) << 1) | plane;
846 s->vram_ptr[addr] = val; 846 s->vram_ptr[addr] = val;
847 #ifdef DEBUG_VGA_MEM 847 #ifdef DEBUG_VGA_MEM
848 - printf("vga: odd/even: [0x%x]\n", addr); 848 + printf("vga: odd/even: [0x" TARGET_FMT_plx "]\n", addr);
849 #endif 849 #endif
850 s->plane_updated |= mask; /* only used to detect font change */ 850 s->plane_updated |= mask; /* only used to detect font change */
851 cpu_physical_memory_set_dirty(s->vram_offset + addr); 851 cpu_physical_memory_set_dirty(s->vram_offset + addr);
@@ -919,10 +919,10 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -919,10 +919,10 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
919 (((uint32_t *)s->vram_ptr)[addr] & ~write_mask) | 919 (((uint32_t *)s->vram_ptr)[addr] & ~write_mask) |
920 (val & write_mask); 920 (val & write_mask);
921 #ifdef DEBUG_VGA_MEM 921 #ifdef DEBUG_VGA_MEM
922 - printf("vga: latch: [0x%x] mask=0x%08x val=0x%08x\n",  
923 - addr * 4, write_mask, val); 922 + printf("vga: latch: [0x" TARGET_FMT_plx "] mask=0x%08x val=0x%08x\n",
  923 + addr * 4, write_mask, val);
924 #endif 924 #endif
925 - cpu_physical_memory_set_dirty(s->vram_offset + (addr << 2)); 925 + cpu_physical_memory_set_dirty(s->vram_offset + (addr << 2));
926 } 926 }
927 } 927 }
928 928
linux-user/mmap.c
@@ -145,8 +145,8 @@ int target_mprotect(abi_ulong start, abi_ulong len, int prot) @@ -145,8 +145,8 @@ int target_mprotect(abi_ulong start, abi_ulong len, int prot)
145 int prot1, ret; 145 int prot1, ret;
146 146
147 #ifdef DEBUG_MMAP 147 #ifdef DEBUG_MMAP
148 - printf("mprotect: start=0x" TARGET_FMT_lx  
149 - "len=0x" TARGET_FMT_lx " prot=%c%c%c\n", start, len, 148 + printf("mprotect: start=0x" TARGET_ABI_FMT_lx
  149 + "len=0x" TARGET_ABI_FMT_lx " prot=%c%c%c\n", start, len,
150 prot & PROT_READ ? 'r' : '-', 150 prot & PROT_READ ? 'r' : '-',
151 prot & PROT_WRITE ? 'w' : '-', 151 prot & PROT_WRITE ? 'w' : '-',
152 prot & PROT_EXEC ? 'x' : '-'); 152 prot & PROT_EXEC ? 'x' : '-');
@@ -331,8 +331,8 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, @@ -331,8 +331,8 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
331 mmap_lock(); 331 mmap_lock();
332 #ifdef DEBUG_MMAP 332 #ifdef DEBUG_MMAP
333 { 333 {
334 - printf("mmap: start=0x" TARGET_FMT_lx  
335 - " len=0x" TARGET_FMT_lx " prot=%c%c%c flags=", 334 + printf("mmap: start=0x" TARGET_ABI_FMT_lx
  335 + " len=0x" TARGET_ABI_FMT_lx " prot=%c%c%c flags=",
336 start, len, 336 start, len,
337 prot & PROT_READ ? 'r' : '-', 337 prot & PROT_READ ? 'r' : '-',
338 prot & PROT_WRITE ? 'w' : '-', 338 prot & PROT_WRITE ? 'w' : '-',
@@ -352,7 +352,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, @@ -352,7 +352,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
352 printf("[MAP_TYPE=0x%x] ", flags & MAP_TYPE); 352 printf("[MAP_TYPE=0x%x] ", flags & MAP_TYPE);
353 break; 353 break;
354 } 354 }
355 - printf("fd=%d offset=" TARGET_FMT_lx "\n", fd, offset); 355 + printf("fd=%d offset=" TARGET_ABI_FMT_lx "\n", fd, offset);
356 } 356 }
357 #endif 357 #endif
358 358
@@ -523,7 +523,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, @@ -523,7 +523,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
523 page_set_flags(start, start + len, prot | PAGE_VALID); 523 page_set_flags(start, start + len, prot | PAGE_VALID);
524 the_end: 524 the_end:
525 #ifdef DEBUG_MMAP 525 #ifdef DEBUG_MMAP
526 - printf("ret=0x" TARGET_FMT_lx "\n", start); 526 + printf("ret=0x" TARGET_ABI_FMT_lx "\n", start);
527 page_dump(stdout); 527 page_dump(stdout);
528 printf("\n"); 528 printf("\n");
529 #endif 529 #endif
@@ -540,7 +540,9 @@ int target_munmap(abi_ulong start, abi_ulong len) @@ -540,7 +540,9 @@ int target_munmap(abi_ulong start, abi_ulong len)
540 int prot, ret; 540 int prot, ret;
541 541
542 #ifdef DEBUG_MMAP 542 #ifdef DEBUG_MMAP
543 - printf("munmap: start=0x%lx len=0x%lx\n", start, len); 543 + printf("munmap: start=0x" TARGET_ABI_FMT_lx " len=0x"
  544 + TARGET_ABI_FMT_lx "\n",
  545 + start, len);
544 #endif 546 #endif
545 if (start & ~TARGET_PAGE_MASK) 547 if (start & ~TARGET_PAGE_MASK)
546 return -EINVAL; 548 return -EINVAL;
linux-user/signal.c
@@ -584,8 +584,8 @@ int do_sigaction(int sig, const struct target_sigaction *act, @@ -584,8 +584,8 @@ int do_sigaction(int sig, const struct target_sigaction *act,
584 return -EINVAL; 584 return -EINVAL;
585 k = &sigact_table[sig - 1]; 585 k = &sigact_table[sig - 1];
586 #if defined(DEBUG_SIGNAL) 586 #if defined(DEBUG_SIGNAL)
587 - fprintf(stderr, "sigaction sig=%d act=0x%08x, oact=0x%08x\n",  
588 - sig, (int)act, (int)oact); 587 + fprintf(stderr, "sigaction sig=%d act=0x%p, oact=0x%p\n",
  588 + sig, act, oact);
589 #endif 589 #endif
590 if (oact) { 590 if (oact) {
591 oact->_sa_handler = tswapl(k->_sa_handler); 591 oact->_sa_handler = tswapl(k->_sa_handler);
linux-user/syscall.c
@@ -6977,7 +6977,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, @@ -6977,7 +6977,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
6977 } 6977 }
6978 fail: 6978 fail:
6979 #ifdef DEBUG 6979 #ifdef DEBUG
6980 - gemu_log(" = %ld\n", ret); 6980 + gemu_log(" = " TARGET_ABI_FMT_ld "\n", ret);
6981 #endif 6981 #endif
6982 if(do_strace) 6982 if(do_strace)
6983 print_syscall_ret(num, ret); 6983 print_syscall_ret(num, ret);
qemu-tool.c
@@ -15,11 +15,14 @@ @@ -15,11 +15,14 @@
15 #include "monitor.h" 15 #include "monitor.h"
16 #include "sysemu.h" 16 #include "sysemu.h"
17 #include "qemu-timer.h" 17 #include "qemu-timer.h"
  18 +#include "qemu-log.h"
18 19
19 #include <sys/time.h> 20 #include <sys/time.h>
20 21
21 QEMUClock *rt_clock; 22 QEMUClock *rt_clock;
22 23
  24 +FILE *logfile;
  25 +
23 struct QEMUBH 26 struct QEMUBH
24 { 27 {
25 QEMUBHFunc *cb; 28 QEMUBHFunc *cb;
target-ppc/helper.c
@@ -558,18 +558,18 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, @@ -558,18 +558,18 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
558 } 558 }
559 if (ret < 0) { 559 if (ret < 0) {
560 #if defined(DEBUG_BATS) 560 #if defined(DEBUG_BATS)
561 - if (IS_LOGGING) {  
562 - QEMU_LOG0("no BAT match for " ADDRX ":\n", virtual); 561 + if (qemu_log_enabled()) {
  562 + LOG_BATS("no BAT match for " ADDRX ":\n", virtual);
563 for (i = 0; i < 4; i++) { 563 for (i = 0; i < 4; i++) {
564 BATu = &BATut[i]; 564 BATu = &BATut[i];
565 BATl = &BATlt[i]; 565 BATl = &BATlt[i];
566 BEPIu = *BATu & 0xF0000000; 566 BEPIu = *BATu & 0xF0000000;
567 BEPIl = *BATu & 0x0FFE0000; 567 BEPIl = *BATu & 0x0FFE0000;
568 bl = (*BATu & 0x00001FFC) << 15; 568 bl = (*BATu & 0x00001FFC) << 15;
569 - QEMU_LOG0("%s: %cBAT%d v " ADDRX " BATu " ADDRX  
570 - " BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",  
571 - __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,  
572 - *BATu, *BATl, BEPIu, BEPIl, bl); 569 + LOG_BATS("%s: %cBAT%d v " ADDRX " BATu " ADDRX
  570 + " BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",
  571 + __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
  572 + *BATu, *BATl, BEPIu, BEPIl, bl);
573 } 573 }
574 } 574 }
575 #endif 575 #endif
@@ -860,8 +860,8 @@ void ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs) @@ -860,8 +860,8 @@ void ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs)
860 slb->tmp = (vsid << 8) | (flags << 3); 860 slb->tmp = (vsid << 8) | (flags << 3);
861 861
862 LOG_SLB("%s: %d " ADDRX " - " ADDRX " => %016" PRIx64 862 LOG_SLB("%s: %d " ADDRX " - " ADDRX " => %016" PRIx64
863 - " %08" PRIx32 "\n", __func__,  
864 - slb_nr, rb, rs, tmp64, tmp); 863 + " %08" PRIx32 "\n", __func__,
  864 + slb_nr, rb, rs, slb->tmp64, slb->tmp);
865 865
866 slb_set_entry(env, slb_nr, slb); 866 slb_set_entry(env, slb_nr, slb);
867 } 867 }
@@ -2445,7 +2445,7 @@ static always_inline void powerpc_excp (CPUState *env, @@ -2445,7 +2445,7 @@ static always_inline void powerpc_excp (CPUState *env,
2445 tlb_miss: 2445 tlb_miss:
2446 #if defined (DEBUG_SOFTWARE_TLB) 2446 #if defined (DEBUG_SOFTWARE_TLB)
2447 if (qemu_log_enabled()) { 2447 if (qemu_log_enabled()) {
2448 - const unsigned char *es; 2448 + const char *es;
2449 target_ulong *miss, *cmp; 2449 target_ulong *miss, *cmp;
2450 int en; 2450 int en;
2451 if (excp == POWERPC_EXCP_IFTLB) { 2451 if (excp == POWERPC_EXCP_IFTLB) {
@@ -2478,7 +2478,7 @@ static always_inline void powerpc_excp (CPUState *env, @@ -2478,7 +2478,7 @@ static always_inline void powerpc_excp (CPUState *env,
2478 tlb_miss_74xx: 2478 tlb_miss_74xx:
2479 #if defined (DEBUG_SOFTWARE_TLB) 2479 #if defined (DEBUG_SOFTWARE_TLB)
2480 if (qemu_log_enabled()) { 2480 if (qemu_log_enabled()) {
2481 - const unsigned char *es; 2481 + const char *es;
2482 target_ulong *miss, *cmp; 2482 target_ulong *miss, *cmp;
2483 int en; 2483 int en;
2484 if (excp == POWERPC_EXCP_IFTLB) { 2484 if (excp == POWERPC_EXCP_IFTLB) {
target-sparc/helper.c
@@ -583,15 +583,15 @@ void dump_mmu(CPUState *env) @@ -583,15 +583,15 @@ void dump_mmu(CPUState *env)
583 break; 583 break;
584 } 584 }
585 if ((env->dtlb_tte[i] & 0x8000000000000000ULL) != 0) { 585 if ((env->dtlb_tte[i] & 0x8000000000000000ULL) != 0) {
586 - printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx 586 + printf("VA: %" PRIx64 ", PA: %" PRIx64
587 ", %s, %s, %s, %s, ctx %" PRId64 "\n", 587 ", %s, %s, %s, %s, ctx %" PRId64 "\n",
588 - env->dtlb_tag[i] & ~0x1fffULL,  
589 - env->dtlb_tte[i] & 0x1ffffffe000ULL, 588 + env->dtlb_tag[i] & (uint64_t)~0x1fffULL,
  589 + env->dtlb_tte[i] & (uint64_t)0x1ffffffe000ULL,
590 mask, 590 mask,
591 env->dtlb_tte[i] & 0x4? "priv": "user", 591 env->dtlb_tte[i] & 0x4? "priv": "user",
592 env->dtlb_tte[i] & 0x2? "RW": "RO", 592 env->dtlb_tte[i] & 0x2? "RW": "RO",
593 env->dtlb_tte[i] & 0x40? "locked": "unlocked", 593 env->dtlb_tte[i] & 0x40? "locked": "unlocked",
594 - env->dtlb_tag[i] & 0x1fffULL); 594 + env->dtlb_tag[i] & (uint64_t)0x1fffULL);
595 } 595 }
596 } 596 }
597 } 597 }
@@ -616,14 +616,14 @@ void dump_mmu(CPUState *env) @@ -616,14 +616,14 @@ void dump_mmu(CPUState *env)
616 break; 616 break;
617 } 617 }
618 if ((env->itlb_tte[i] & 0x8000000000000000ULL) != 0) { 618 if ((env->itlb_tte[i] & 0x8000000000000000ULL) != 0) {
619 - printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx 619 + printf("VA: %" PRIx64 ", PA: %" PRIx64
620 ", %s, %s, %s, ctx %" PRId64 "\n", 620 ", %s, %s, %s, ctx %" PRId64 "\n",
621 - env->itlb_tag[i] & ~0x1fffULL,  
622 - env->itlb_tte[i] & 0x1ffffffe000ULL, 621 + env->itlb_tag[i] & (uint64_t)~0x1fffULL,
  622 + env->itlb_tte[i] & (uint64_t)0x1ffffffe000ULL,
623 mask, 623 mask,
624 env->itlb_tte[i] & 0x4? "priv": "user", 624 env->itlb_tte[i] & 0x4? "priv": "user",
625 env->itlb_tte[i] & 0x40? "locked": "unlocked", 625 env->itlb_tte[i] & 0x40? "locked": "unlocked",
626 - env->itlb_tag[i] & 0x1fffULL); 626 + env->itlb_tag[i] & (uint64_t)0x1fffULL);
627 } 627 }
628 } 628 }
629 } 629 }
@@ -1314,7 +1314,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model) @@ -1314,7 +1314,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
1314 } 1314 }
1315 cpu_def->fpu_version = fpu_version; 1315 cpu_def->fpu_version = fpu_version;
1316 #ifdef DEBUG_FEATURES 1316 #ifdef DEBUG_FEATURES
1317 - fprintf(stderr, "fpu_version %llx\n", fpu_version); 1317 + fprintf(stderr, "fpu_version %x\n", fpu_version);
1318 #endif 1318 #endif
1319 } else if (!strcmp(featurestr, "mmu_version")) { 1319 } else if (!strcmp(featurestr, "mmu_version")) {
1320 char *err; 1320 char *err;
@@ -1326,7 +1326,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model) @@ -1326,7 +1326,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
1326 } 1326 }
1327 cpu_def->mmu_version = mmu_version; 1327 cpu_def->mmu_version = mmu_version;
1328 #ifdef DEBUG_FEATURES 1328 #ifdef DEBUG_FEATURES
1329 - fprintf(stderr, "mmu_version %llx\n", mmu_version); 1329 + fprintf(stderr, "mmu_version %x\n", mmu_version);
1330 #endif 1330 #endif
1331 } else if (!strcmp(featurestr, "nwindows")) { 1331 } else if (!strcmp(featurestr, "nwindows")) {
1332 char *err; 1332 char *err;
target-sparc/op_helper.c
@@ -1212,11 +1212,14 @@ GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1); @@ -1212,11 +1212,14 @@ GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
1212 defined(DEBUG_MXCC) 1212 defined(DEBUG_MXCC)
1213 static void dump_mxcc(CPUState *env) 1213 static void dump_mxcc(CPUState *env)
1214 { 1214 {
1215 - printf("mxccdata: %016llx %016llx %016llx %016llx\n", 1215 + printf("mxccdata: %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64
  1216 + "\n",
1216 env->mxccdata[0], env->mxccdata[1], 1217 env->mxccdata[0], env->mxccdata[1],
1217 env->mxccdata[2], env->mxccdata[3]); 1218 env->mxccdata[2], env->mxccdata[3]);
1218 - printf("mxccregs: %016llx %016llx %016llx %016llx\n"  
1219 - " %016llx %016llx %016llx %016llx\n", 1219 + printf("mxccregs: %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64
  1220 + "\n"
  1221 + " %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64
  1222 + "\n",
1220 env->mxccregs[0], env->mxccregs[1], 1223 env->mxccregs[0], env->mxccregs[1],
1221 env->mxccregs[2], env->mxccregs[3], 1224 env->mxccregs[2], env->mxccregs[3],
1222 env->mxccregs[4], env->mxccregs[5], 1225 env->mxccregs[4], env->mxccregs[5],
@@ -1455,7 +1458,8 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) @@ -1455,7 +1458,8 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
1455 env->mmubpregs[reg] = 0ULL; 1458 env->mmubpregs[reg] = 0ULL;
1456 break; 1459 break;
1457 } 1460 }
1458 - DPRINTF_MMU("read breakpoint reg[%d] 0x%016llx\n", reg, ret); 1461 + DPRINTF_MMU("read breakpoint reg[%d] 0x%016" PRIx64 "\n", reg,
  1462 + ret);
1459 } 1463 }
1460 break; 1464 break;
1461 case 8: /* User code access, XXX */ 1465 case 8: /* User code access, XXX */
@@ -1808,7 +1812,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) @@ -1808,7 +1812,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size)
1808 env->mmubpregs[reg] = (val & 0xfULL); 1812 env->mmubpregs[reg] = (val & 0xfULL);
1809 break; 1813 break;
1810 } 1814 }
1811 - DPRINTF_MMU("write breakpoint reg[%d] 0x%016llx\n", reg, 1815 + DPRINTF_MMU("write breakpoint reg[%d] 0x%016x\n", reg,
1812 env->mmuregs[reg]); 1816 env->mmuregs[reg]);
1813 } 1817 }
1814 break; 1818 break;