Commit 087389847207063df194a1b85ff907f54dd51d0a

Authored by Igor Kovalenko
Committed by Anthony Liguori
1 parent 7d93b1fa

tlb flush cleanup

Use static empty variable s_cputlb_empty_entry to clear entries,
also reset addend member when clearing entries.
This helps running with valgrind/memcheck

Signed-off-by: igor.v.kovalenko@gmail.com

--
Kind regards,
Igor V. Kovalenko
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Showing 1 changed file with 9 additions and 6 deletions
... ... @@ -1751,6 +1751,13 @@ static inline void tlb_flush_jmp_cache(CPUState *env, target_ulong addr)
1751 1751 TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
1752 1752 }
1753 1753  
  1754 +static CPUTLBEntry s_cputlb_empty_entry = {
  1755 + .addr_read = -1,
  1756 + .addr_write = -1,
  1757 + .addr_code = -1,
  1758 + .addend = -1,
  1759 +};
  1760 +
1754 1761 /* NOTE: if flush_global is true, also flush global entries (not
1755 1762 implemented yet) */
1756 1763 void tlb_flush(CPUState *env, int flush_global)
... ... @@ -1767,9 +1774,7 @@ void tlb_flush(CPUState *env, int flush_global)
1767 1774 for(i = 0; i < CPU_TLB_SIZE; i++) {
1768 1775 int mmu_idx;
1769 1776 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
1770   - env->tlb_table[mmu_idx][i].addr_read = -1;
1771   - env->tlb_table[mmu_idx][i].addr_write = -1;
1772   - env->tlb_table[mmu_idx][i].addr_code = -1;
  1777 + env->tlb_table[mmu_idx][i] = s_cputlb_empty_entry;
1773 1778 }
1774 1779 }
1775 1780  
... ... @@ -1791,9 +1796,7 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
1791 1796 (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||
1792 1797 addr == (tlb_entry->addr_code &
1793 1798 (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
1794   - tlb_entry->addr_read = -1;
1795   - tlb_entry->addr_write = -1;
1796   - tlb_entry->addr_code = -1;
  1799 + *tlb_entry = s_cputlb_empty_entry;
1797 1800 }
1798 1801 }
1799 1802  
... ...