gwj / at91sam9263 · Commits

Commit 07ef34c35eea5d25b873b614078ee8092a3631a5

Authored by aurel32
1 parent 2c277908

Add vsr{,a}{b,h,w} instructions. 

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6165 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 3 changed files with 30 additions and 0 deletions
target-ppc/helper.h
  View file @07ef34c
... ... @@ -137,6 +137,12 @@ DEF_HELPER_3(vmulosb, void, avr, avr, avr)
137 137 DEF_HELPER_3(vmulosh, void, avr, avr, avr)
138 138 DEF_HELPER_3(vmuloub, void, avr, avr, avr)
139 139 DEF_HELPER_3(vmulouh, void, avr, avr, avr)
  140 +DEF_HELPER_3(vsrab, void, avr, avr, avr)
  141 +DEF_HELPER_3(vsrah, void, avr, avr, avr)
  142 +DEF_HELPER_3(vsraw, void, avr, avr, avr)
  143 +DEF_HELPER_3(vsrb, void, avr, avr, avr)
  144 +DEF_HELPER_3(vsrh, void, avr, avr, avr)
  145 +DEF_HELPER_3(vsrw, void, avr, avr, avr)
140 146  
141 147 DEF_HELPER_1(efscfsi, i32, i32)
142 148 DEF_HELPER_1(efscfui, i32, i32)
... ...
target-ppc/op_helper.c
  View file @07ef34c
... ... @@ -2088,6 +2088,24 @@ VMUL(uh, u16, u32)
2088 2088 #undef VMUL_DO
2089 2089 #undef VMUL
2090 2090  
  2091 +#define VSR(suffix, element) \
  2092 + void helper_vsr##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
  2093 + { \
  2094 + int i; \
  2095 + for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
  2096 + unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \
  2097 + unsigned int shift = b->element[i] & mask; \
  2098 + r->element[i] = a->element[i] >> shift; \
  2099 + } \
  2100 + }
  2101 +VSR(ab, s8)
  2102 +VSR(ah, s16)
  2103 +VSR(aw, s32)
  2104 +VSR(b, u8)
  2105 +VSR(h, u16)
  2106 +VSR(w, u32)
  2107 +#undef VSR
  2108 +
2091 2109 #undef VECTOR_FOR_INORDER_I
2092 2110 #undef HI_IDX
2093 2111 #undef LO_IDX
... ...
target-ppc/translate.c
  View file @07ef34c
... ... @@ -6219,6 +6219,12 @@ GEN_VXFORM(vmuleub, 4, 8);
6219 6219 GEN_VXFORM(vmuleuh, 4, 9);
6220 6220 GEN_VXFORM(vmulesb, 4, 12);
6221 6221 GEN_VXFORM(vmulesh, 4, 13);
  6222 +GEN_VXFORM(vsrb, 2, 8);
  6223 +GEN_VXFORM(vsrh, 2, 9);
  6224 +GEN_VXFORM(vsrw, 2, 10);
  6225 +GEN_VXFORM(vsrab, 2, 12);
  6226 +GEN_VXFORM(vsrah, 2, 13);
  6227 +GEN_VXFORM(vsraw, 2, 14);
6222 6228  
6223 6229 /*** SPE extension ***/
6224 6230 /* Register moves */
... ...