Commit 07cf0ba03b8dfec541c09e765283c417539fb618

Authored by ths
1 parent 2ff89790

Revert workaround for -nographic segfault.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2995 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 23 additions and 28 deletions
hw/mips_malta.c
@@ -42,7 +42,6 @@ @@ -42,7 +42,6 @@
42 #define ENVP_NB_ENTRIES 16 42 #define ENVP_NB_ENTRIES 16
43 #define ENVP_ENTRY_SIZE 256 43 #define ENVP_ENTRY_SIZE 256
44 44
45 -extern int nographic;  
46 extern FILE *logfile; 45 extern FILE *logfile;
47 46
48 typedef struct { 47 typedef struct {
@@ -67,18 +66,16 @@ static void malta_fpga_update_display(void *opaque) @@ -67,18 +66,16 @@ static void malta_fpga_update_display(void *opaque)
67 int i; 66 int i;
68 MaltaFPGAState *s = opaque; 67 MaltaFPGAState *s = opaque;
69 68
70 - if (!nographic) {  
71 - for (i = 7 ; i >= 0 ; i--) {  
72 - if (s->leds & (1 << i))  
73 - leds_text[i] = '#';  
74 - else  
75 - leds_text[i] = ' ';  
76 - }  
77 - leds_text[8] = '\0';  
78 -  
79 - qemu_chr_printf(s->display, "\e[H\n\n|\e[32m%-8.8s\e[00m|\r\n", leds_text);  
80 - qemu_chr_printf(s->display, "\n\n\n\n|\e[31m%-8.8s\e[00m|", s->display_text); 69 + for (i = 7 ; i >= 0 ; i--) {
  70 + if (s->leds & (1 << i))
  71 + leds_text[i] = '#';
  72 + else
  73 + leds_text[i] = ' ';
81 } 74 }
  75 + leds_text[8] = '\0';
  76 +
  77 + qemu_chr_printf(s->display, "\e[H\n\n|\e[32m%-8.8s\e[00m|\r\n", leds_text);
  78 + qemu_chr_printf(s->display, "\n\n\n\n|\e[31m%-8.8s\e[00m|", s->display_text);
82 } 79 }
83 80
84 /* 81 /*
@@ -415,22 +412,20 @@ MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env) @@ -415,22 +412,20 @@ MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
415 cpu_register_physical_memory(base, 0x900, malta); 412 cpu_register_physical_memory(base, 0x900, malta);
416 cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta); 413 cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta);
417 414
418 - if (!nographic) {  
419 - s->display = qemu_chr_open("vc");  
420 - qemu_chr_printf(s->display, "\e[HMalta LEDBAR\r\n");  
421 - qemu_chr_printf(s->display, "+--------+\r\n");  
422 - qemu_chr_printf(s->display, "+ +\r\n");  
423 - qemu_chr_printf(s->display, "+--------+\r\n");  
424 - qemu_chr_printf(s->display, "\n");  
425 - qemu_chr_printf(s->display, "Malta ASCII\r\n");  
426 - qemu_chr_printf(s->display, "+--------+\r\n");  
427 - qemu_chr_printf(s->display, "+ +\r\n");  
428 - qemu_chr_printf(s->display, "+--------+\r\n");  
429 -  
430 - uart_chr = qemu_chr_open("vc");  
431 - qemu_chr_printf(uart_chr, "CBUS UART\r\n");  
432 - s->uart = serial_mm_init(base + 0x900, 3, env->irq[2], uart_chr, 1);  
433 - } 415 + s->display = qemu_chr_open("vc");
  416 + qemu_chr_printf(s->display, "\e[HMalta LEDBAR\r\n");
  417 + qemu_chr_printf(s->display, "+--------+\r\n");
  418 + qemu_chr_printf(s->display, "+ +\r\n");
  419 + qemu_chr_printf(s->display, "+--------+\r\n");
  420 + qemu_chr_printf(s->display, "\n");
  421 + qemu_chr_printf(s->display, "Malta ASCII\r\n");
  422 + qemu_chr_printf(s->display, "+--------+\r\n");
  423 + qemu_chr_printf(s->display, "+ +\r\n");
  424 + qemu_chr_printf(s->display, "+--------+\r\n");
  425 +
  426 + uart_chr = qemu_chr_open("vc");
  427 + qemu_chr_printf(uart_chr, "CBUS UART\r\n");
  428 + s->uart = serial_mm_init(base + 0x900, 3, env->irq[2], uart_chr, 1);
434 429
435 malta_fpga_reset(s); 430 malta_fpga_reset(s);
436 qemu_register_reset(malta_fpga_reset, s); 431 qemu_register_reset(malta_fpga_reset, s);