Commit 07323531c196223293bf266bd4d3811bd24c6e34

Authored by Isaku Yamahata
Committed by Anthony Liguori
1 parent fc7083b5

ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.

Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.

IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ioport-user.c
@@ -23,35 +23,38 @@ @@ -23,35 +23,38 @@
23 #include "qemu-common.h" 23 #include "qemu-common.h"
24 #include "ioport.h" 24 #include "ioport.h"
25 25
26 -void cpu_outb(CPUState *env, int addr, int val) 26 +void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
27 { 27 {
28 - fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val); 28 + fprintf(stderr, "outb: port=0x%04"FMT_pioaddr", data=%02"PRIx8"\n",
  29 + addr, val);
29 } 30 }
30 31
31 -void cpu_outw(CPUState *env, int addr, int val) 32 +void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
32 { 33 {
33 - fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val); 34 + fprintf(stderr, "outw: port=0x%04"FMT_pioaddr", data=%04"PRIx16"\n",
  35 + addr, val);
34 } 36 }
35 37
36 -void cpu_outl(CPUState *env, int addr, int val) 38 +void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
37 { 39 {
38 - fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val); 40 + fprintf(stderr, "outl: port=0x%04"FMT_pioaddr", data=%08"PRIx32"\n",
  41 + addr, val);
39 } 42 }
40 43
41 -int cpu_inb(CPUState *env, int addr) 44 +uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
42 { 45 {
43 - fprintf(stderr, "inb: port=0x%04x\n", addr); 46 + fprintf(stderr, "inb: port=0x%04"FMT_pioaddr"\n", addr);
44 return 0; 47 return 0;
45 } 48 }
46 49
47 -int cpu_inw(CPUState *env, int addr) 50 +uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
48 { 51 {
49 - fprintf(stderr, "inw: port=0x%04x\n", addr); 52 + fprintf(stderr, "inw: port=0x%04"FMT_pioaddr"\n", addr);
50 return 0; 53 return 0;
51 } 54 }
52 55
53 -int cpu_inl(CPUState *env, int addr) 56 +uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
54 { 57 {
55 - fprintf(stderr, "inl: port=0x%04x\n", addr); 58 + fprintf(stderr, "inl: port=0x%04"FMT_pioaddr"\n", addr);
56 return 0; 59 return 0;
57 } 60 }
ioport.c
@@ -136,7 +136,7 @@ static int ioport_bsize(int size, int *bsize) @@ -136,7 +136,7 @@ static int ioport_bsize(int size, int *bsize)
136 } 136 }
137 137
138 /* size is the word size in byte */ 138 /* size is the word size in byte */
139 -int register_ioport_read(int start, int length, int size, 139 +int register_ioport_read(pio_addr_t start, int length, int size,
140 IOPortReadFunc *func, void *opaque) 140 IOPortReadFunc *func, void *opaque)
141 { 141 {
142 int i, bsize; 142 int i, bsize;
@@ -155,7 +155,7 @@ int register_ioport_read(int start, int length, int size, @@ -155,7 +155,7 @@ int register_ioport_read(int start, int length, int size,
155 } 155 }
156 156
157 /* size is the word size in byte */ 157 /* size is the word size in byte */
158 -int register_ioport_write(int start, int length, int size, 158 +int register_ioport_write(pio_addr_t start, int length, int size,
159 IOPortWriteFunc *func, void *opaque) 159 IOPortWriteFunc *func, void *opaque)
160 { 160 {
161 int i, bsize; 161 int i, bsize;
@@ -173,7 +173,7 @@ int register_ioport_write(int start, int length, int size, @@ -173,7 +173,7 @@ int register_ioport_write(int start, int length, int size,
173 return 0; 173 return 0;
174 } 174 }
175 175
176 -void isa_unassign_ioport(int start, int length) 176 +void isa_unassign_ioport(pio_addr_t start, int length)
177 { 177 {
178 int i; 178 int i;
179 179
@@ -192,9 +192,9 @@ void isa_unassign_ioport(int start, int length) @@ -192,9 +192,9 @@ void isa_unassign_ioport(int start, int length)
192 192
193 /***********************************************************/ 193 /***********************************************************/
194 194
195 -void cpu_outb(CPUState *env, int addr, int val) 195 +void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
196 { 196 {
197 - LOG_IOPORT("outb: %04x %02x\n", addr, val); 197 + LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
198 ioport_write(0, addr, val); 198 ioport_write(0, addr, val);
199 #ifdef CONFIG_KQEMU 199 #ifdef CONFIG_KQEMU
200 if (env) 200 if (env)
@@ -202,9 +202,9 @@ void cpu_outb(CPUState *env, int addr, int val) @@ -202,9 +202,9 @@ void cpu_outb(CPUState *env, int addr, int val)
202 #endif 202 #endif
203 } 203 }
204 204
205 -void cpu_outw(CPUState *env, int addr, int val) 205 +void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
206 { 206 {
207 - LOG_IOPORT("outw: %04x %04x\n", addr, val); 207 + LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
208 ioport_write(1, addr, val); 208 ioport_write(1, addr, val);
209 #ifdef CONFIG_KQEMU 209 #ifdef CONFIG_KQEMU
210 if (env) 210 if (env)
@@ -212,9 +212,9 @@ void cpu_outw(CPUState *env, int addr, int val) @@ -212,9 +212,9 @@ void cpu_outw(CPUState *env, int addr, int val)
212 #endif 212 #endif
213 } 213 }
214 214
215 -void cpu_outl(CPUState *env, int addr, int val) 215 +void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
216 { 216 {
217 - LOG_IOPORT("outl: %04x %08x\n", addr, val); 217 + LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
218 ioport_write(2, addr, val); 218 ioport_write(2, addr, val);
219 #ifdef CONFIG_KQEMU 219 #ifdef CONFIG_KQEMU
220 if (env) 220 if (env)
@@ -222,11 +222,11 @@ void cpu_outl(CPUState *env, int addr, int val) @@ -222,11 +222,11 @@ void cpu_outl(CPUState *env, int addr, int val)
222 #endif 222 #endif
223 } 223 }
224 224
225 -int cpu_inb(CPUState *env, int addr) 225 +uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
226 { 226 {
227 - int val; 227 + uint8_t val;
228 val = ioport_read(0, addr); 228 val = ioport_read(0, addr);
229 - LOG_IOPORT("inb : %04x %02x\n", addr, val); 229 + LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
230 #ifdef CONFIG_KQEMU 230 #ifdef CONFIG_KQEMU
231 if (env) 231 if (env)
232 env->last_io_time = cpu_get_time_fast(); 232 env->last_io_time = cpu_get_time_fast();
@@ -234,11 +234,11 @@ int cpu_inb(CPUState *env, int addr) @@ -234,11 +234,11 @@ int cpu_inb(CPUState *env, int addr)
234 return val; 234 return val;
235 } 235 }
236 236
237 -int cpu_inw(CPUState *env, int addr) 237 +uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
238 { 238 {
239 - int val; 239 + uint16_t val;
240 val = ioport_read(1, addr); 240 val = ioport_read(1, addr);
241 - LOG_IOPORT("inw : %04x %04x\n", addr, val); 241 + LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
242 #ifdef CONFIG_KQEMU 242 #ifdef CONFIG_KQEMU
243 if (env) 243 if (env)
244 env->last_io_time = cpu_get_time_fast(); 244 env->last_io_time = cpu_get_time_fast();
@@ -246,15 +246,14 @@ int cpu_inw(CPUState *env, int addr) @@ -246,15 +246,14 @@ int cpu_inw(CPUState *env, int addr)
246 return val; 246 return val;
247 } 247 }
248 248
249 -int cpu_inl(CPUState *env, int addr) 249 +uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
250 { 250 {
251 - int val; 251 + uint32_t val;
252 val = ioport_read(2, addr); 252 val = ioport_read(2, addr);
253 - LOG_IOPORT("inl : %04x %08x\n", addr, val); 253 + LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
254 #ifdef CONFIG_KQEMU 254 #ifdef CONFIG_KQEMU
255 if (env) 255 if (env)
256 env->last_io_time = cpu_get_time_fast(); 256 env->last_io_time = cpu_get_time_fast();
257 #endif 257 #endif
258 return val; 258 return val;
259 } 259 }
260 -  
ioport.h
@@ -26,6 +26,9 @@ @@ -26,6 +26,9 @@
26 26
27 #include "qemu-common.h" 27 #include "qemu-common.h"
28 28
  29 +typedef uint32_t pio_addr_t;
  30 +#define FMT_pioaddr PRIx32
  31 +
29 #define MAX_IOPORTS (64 * 1024) 32 #define MAX_IOPORTS (64 * 1024)
30 #define IOPORTS_MASK (MAX_IOPORTS - 1) 33 #define IOPORTS_MASK (MAX_IOPORTS - 1)
31 34
@@ -33,22 +36,22 @@ @@ -33,22 +36,22 @@
33 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); 36 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
34 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); 37 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
35 38
36 -int register_ioport_read(int start, int length, int size, 39 +int register_ioport_read(pio_addr_t start, int length, int size,
37 IOPortReadFunc *func, void *opaque); 40 IOPortReadFunc *func, void *opaque);
38 -int register_ioport_write(int start, int length, int size, 41 +int register_ioport_write(pio_addr_t start, int length, int size,
39 IOPortWriteFunc *func, void *opaque); 42 IOPortWriteFunc *func, void *opaque);
40 -void isa_unassign_ioport(int start, int length); 43 +void isa_unassign_ioport(pio_addr_t start, int length);
41 44
42 45
43 /* NOTE: as these functions may be even used when there is an isa 46 /* NOTE: as these functions may be even used when there is an isa
44 brige on non x86 targets, we always defined them */ 47 brige on non x86 targets, we always defined them */
45 #if !defined(NO_CPU_IO_DEFS) && defined(NEED_CPU_H) 48 #if !defined(NO_CPU_IO_DEFS) && defined(NEED_CPU_H)
46 -void cpu_outb(CPUState *env, int addr, int val);  
47 -void cpu_outw(CPUState *env, int addr, int val);  
48 -void cpu_outl(CPUState *env, int addr, int val);  
49 -int cpu_inb(CPUState *env, int addr);  
50 -int cpu_inw(CPUState *env, int addr);  
51 -int cpu_inl(CPUState *env, int addr); 49 +void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val);
  50 +void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val);
  51 +void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val);
  52 +uint8_t cpu_inb(CPUState *env, pio_addr_t addr);
  53 +uint16_t cpu_inw(CPUState *env, pio_addr_t addr);
  54 +uint32_t cpu_inl(CPUState *env, pio_addr_t addr);
52 #endif 55 #endif
53 56
54 #endif /* IOPORT_H */ 57 #endif /* IOPORT_H */