Commit 071fc3b1cda1ad6f8d4b83cdf3f8cf8c395f9404

Authored by aurel32
1 parent bdfbac35

target-ppc: Add vrsqrtefp instruction

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6574 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/helper.h
... ... @@ -245,6 +245,7 @@ DEF_HELPER_3(vsubfp, void, avr, avr, avr)
245 245 DEF_HELPER_3(vmaxfp, void, avr, avr, avr)
246 246 DEF_HELPER_3(vminfp, void, avr, avr, avr)
247 247 DEF_HELPER_2(vrefp, void, avr, avr)
  248 +DEF_HELPER_2(vrsqrtefp, void, avr, avr)
248 249 DEF_HELPER_4(vmaddfp, void, avr, avr, avr, avr)
249 250 DEF_HELPER_4(vnmsubfp, void, avr, avr, avr, avr)
250 251 DEF_HELPER_2(vlogefp, void, avr, avr)
... ...
target-ppc/op_helper.c
... ... @@ -2707,6 +2707,17 @@ VROTATE(h, u16)
2707 2707 VROTATE(w, u32)
2708 2708 #undef VROTATE
2709 2709  
  2710 +void helper_vrsqrtefp (ppc_avr_t *r, ppc_avr_t *b)
  2711 +{
  2712 + int i;
  2713 + for (i = 0; i < ARRAY_SIZE(r->f); i++) {
  2714 + HANDLE_NAN1(r->f[i], b->f[i]) {
  2715 + float32 t = float32_sqrt(b->f[i], &env->vec_status);
  2716 + r->f[i] = float32_div(float32_one, t, &env->vec_status);
  2717 + }
  2718 + }
  2719 +}
  2720 +
2710 2721 void helper_vsel (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
2711 2722 {
2712 2723 r->u64[0] = (a->u64[0] & ~c->u64[0]) | (b->u64[0] & c->u64[0]);
... ...
target-ppc/translate.c
... ... @@ -6477,6 +6477,7 @@ GEN_VXFORM_NOA(vupklsh, 7, 11);
6477 6477 GEN_VXFORM_NOA(vupkhpx, 7, 13);
6478 6478 GEN_VXFORM_NOA(vupklpx, 7, 15);
6479 6479 GEN_VXFORM_NOA(vrefp, 5, 4);
  6480 +GEN_VXFORM_NOA(vrsqrtefp, 5, 5);
6480 6481 GEN_VXFORM_NOA(vlogefp, 5, 7);
6481 6482 GEN_VXFORM_NOA(vrfim, 5, 8);
6482 6483 GEN_VXFORM_NOA(vrfin, 5, 9);
... ...