gwj / at91sam9263 · Commits

Commit 0425bee563a2748341488bd4ce4bdf33dd7e6fea

Authored by blueswir1
1 parent a768e4b2

Discard unused data, use less temps 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4073 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 237 additions and 365 deletions
target-sparc/translate.c
  View file @0425bee
... ... @@ -362,11 +362,8 @@ static inline void gen_mov_reg_C(TCGv reg, TCGv src)
362 362  
363 363 static inline void gen_op_exception(int exception)
364 364 {
365   - TCGv r_except;
366   -
367   - r_except = tcg_temp_new(TCG_TYPE_I32);
368   - tcg_gen_movi_i32(r_except, exception);
369   - tcg_gen_helper_0_1(raise_exception, r_except);
  365 + tcg_gen_movi_i32(cpu_tmp0, exception);
  366 + tcg_gen_helper_0_1(raise_exception, cpu_tmp0);
370 367 }
371 368  
372 369 static inline void gen_cc_clear(void)
... ... @@ -386,15 +383,13 @@ static inline void gen_cc_clear(void)
386 383 static inline void gen_cc_NZ(TCGv dst)
387 384 {
388 385 int l1, l2;
389   - TCGv r_zero;
390 386  
391 387 l1 = gen_new_label();
392 388 l2 = gen_new_label();
393   - r_zero = tcg_const_tl(0);
394   - tcg_gen_brcond_i32(TCG_COND_NE, dst, r_zero, l1);
  389 + tcg_gen_brcond_i32(TCG_COND_NE, dst, tcg_const_i32(0), l1);
395 390 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_ZERO);
396 391 gen_set_label(l1);
397   - tcg_gen_brcond_i32(TCG_COND_GE, dst, r_zero, l2);
  392 + tcg_gen_brcond_i32(TCG_COND_GE, dst, tcg_const_i32(0), l2);
398 393 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_NEG);
399 394 gen_set_label(l2);
400 395 #ifdef TARGET_SPARC64
... ... @@ -403,10 +398,10 @@ static inline void gen_cc_NZ(TCGv dst)
403 398  
404 399 l3 = gen_new_label();
405 400 l4 = gen_new_label();
406   - tcg_gen_brcond_tl(TCG_COND_NE, dst, r_zero, l3);
  401 + tcg_gen_brcond_tl(TCG_COND_NE, dst, tcg_const_tl(0), l3);
407 402 tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_ZERO);
408 403 gen_set_label(l3);
409   - tcg_gen_brcond_tl(TCG_COND_GE, dst, r_zero, l4);
  404 + tcg_gen_brcond_tl(TCG_COND_GE, dst, tcg_const_tl(0), l4);
410 405 tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_NEG);
411 406 gen_set_label(l4);
412 407 }
... ... @@ -443,21 +438,18 @@ static inline void gen_cc_C_add(TCGv dst, TCGv src1)
443 438 */
444 439 static inline void gen_cc_V_add(TCGv dst, TCGv src1, TCGv src2)
445 440 {
446   - TCGv r_temp, r_temp2, r_temp3, r_zero;
  441 + TCGv r_temp;
447 442 int l1;
448 443  
449 444 l1 = gen_new_label();
450 445  
451 446 r_temp = tcg_temp_new(TCG_TYPE_TL);
452   - r_temp2 = tcg_temp_new(TCG_TYPE_TL);
453   - r_temp3 = tcg_temp_new(TCG_TYPE_TL);
454   - r_zero = tcg_const_tl(0);
455 447 tcg_gen_xor_tl(r_temp, src1, src2);
456 448 tcg_gen_xori_tl(r_temp, r_temp, -1);
457   - tcg_gen_xor_tl(r_temp2, src1, dst);
458   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
459   - tcg_gen_andi_tl(r_temp3, r_temp, (1 << 31));
460   - tcg_gen_brcond_i32(TCG_COND_EQ, r_temp3, r_zero, l1);
  449 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  450 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  451 + tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
  452 + tcg_gen_brcond_i32(TCG_COND_EQ, r_temp, tcg_const_i32(0), l1);
461 453 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
462 454 gen_set_label(l1);
463 455 #ifdef TARGET_SPARC64
... ... @@ -467,33 +459,31 @@ static inline void gen_cc_V_add(TCGv dst, TCGv src1, TCGv src2)
467 459 l2 = gen_new_label();
468 460 tcg_gen_xor_tl(r_temp, src1, src2);
469 461 tcg_gen_xori_tl(r_temp, r_temp, -1);
470   - tcg_gen_xor_tl(r_temp2, src1, dst);
471   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
472   - tcg_gen_andi_tl(r_temp3, r_temp, (1ULL << 63));
473   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp3, r_zero, l2);
  462 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  463 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  464 + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));
  465 + tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);
474 466 tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_OVF);
475 467 gen_set_label(l2);
476 468 }
477 469 #endif
  470 + tcg_gen_discard_tl(r_temp);
478 471 }
479 472  
480 473 static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2)
481 474 {
482   - TCGv r_temp, r_temp2, r_temp3, r_zero;
  475 + TCGv r_temp;
483 476 int l1;
484 477  
485 478 l1 = gen_new_label();
486 479  
487 480 r_temp = tcg_temp_new(TCG_TYPE_TL);
488   - r_temp2 = tcg_temp_new(TCG_TYPE_TL);
489   - r_temp3 = tcg_temp_new(TCG_TYPE_TL);
490   - r_zero = tcg_const_tl(0);
491 481 tcg_gen_xor_tl(r_temp, src1, src2);
492 482 tcg_gen_xori_tl(r_temp, r_temp, -1);
493   - tcg_gen_xor_tl(r_temp2, src1, dst);
494   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
495   - tcg_gen_andi_tl(r_temp3, r_temp, (1 << 31));
496   - tcg_gen_brcond_i32(TCG_COND_EQ, r_temp3, r_zero, l1);
  483 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  484 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  485 + tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
  486 + tcg_gen_brcond_i32(TCG_COND_EQ, r_temp, tcg_const_i32(0), l1);
497 487 gen_op_exception(TT_TOVF);
498 488 gen_set_label(l1);
499 489 #ifdef TARGET_SPARC64
... ... @@ -503,27 +493,25 @@ static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2)
503 493 l2 = gen_new_label();
504 494 tcg_gen_xor_tl(r_temp, src1, src2);
505 495 tcg_gen_xori_tl(r_temp, r_temp, -1);
506   - tcg_gen_xor_tl(r_temp2, src1, dst);
507   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
508   - tcg_gen_andi_tl(r_temp3, r_temp, (1ULL << 63));
509   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp3, r_zero, l2);
  496 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  497 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  498 + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));
  499 + tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);
510 500 gen_op_exception(TT_TOVF);
511 501 gen_set_label(l2);
512 502 }
513 503 #endif
  504 + tcg_gen_discard_tl(r_temp);
514 505 }
515 506  
516 507 static inline void gen_cc_V_tag(TCGv src1, TCGv src2)
517 508 {
518 509 int l1;
519   - TCGv r_zero, r_temp;
520 510  
521 511 l1 = gen_new_label();
522   - r_zero = tcg_const_tl(0);
523   - r_temp = tcg_temp_new(TCG_TYPE_TL);
524   - tcg_gen_or_tl(r_temp, src1, src2);
525   - tcg_gen_andi_tl(r_temp, r_temp, 0x3);
526   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, r_zero, l1);
  512 + tcg_gen_or_tl(cpu_tmp0, src1, src2);
  513 + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
  514 + tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
527 515 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
528 516 gen_set_label(l1);
529 517 }
... ... @@ -531,14 +519,11 @@ static inline void gen_cc_V_tag(TCGv src1, TCGv src2)
531 519 static inline void gen_tag_tv(TCGv src1, TCGv src2)
532 520 {
533 521 int l1;
534   - TCGv r_zero, r_temp;
535 522  
536 523 l1 = gen_new_label();
537   - r_zero = tcg_const_tl(0);
538   - r_temp = tcg_temp_new(TCG_TYPE_TL);
539   - tcg_gen_or_tl(r_temp, src1, src2);
540   - tcg_gen_andi_tl(r_temp, r_temp, 0x3);
541   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, r_zero, l1);
  524 + tcg_gen_or_tl(cpu_tmp0, src1, src2);
  525 + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
  526 + tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
542 527 gen_op_exception(TT_TOVF);
543 528 gen_set_label(l1);
544 529 }
... ... @@ -618,20 +603,17 @@ static inline void gen_cc_C_sub(TCGv src1, TCGv src2)
618 603 */
619 604 static inline void gen_cc_V_sub(TCGv dst, TCGv src1, TCGv src2)
620 605 {
621   - TCGv r_temp, r_temp2, r_temp3, r_zero;
  606 + TCGv r_temp;
622 607 int l1;
623 608  
624 609 l1 = gen_new_label();
625 610  
626 611 r_temp = tcg_temp_new(TCG_TYPE_TL);
627   - r_temp2 = tcg_temp_new(TCG_TYPE_TL);
628   - r_temp3 = tcg_temp_new(TCG_TYPE_TL);
629   - r_zero = tcg_const_tl(0);
630 612 tcg_gen_xor_tl(r_temp, src1, src2);
631   - tcg_gen_xor_tl(r_temp2, src1, dst);
632   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
633   - tcg_gen_andi_tl(r_temp3, r_temp, (1 << 31));
634   - tcg_gen_brcond_i32(TCG_COND_EQ, r_temp3, r_zero, l1);
  613 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  614 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  615 + tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
  616 + tcg_gen_brcond_i32(TCG_COND_EQ, r_temp, tcg_const_i32(0), l1);
635 617 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
636 618 gen_set_label(l1);
637 619 #ifdef TARGET_SPARC64
... ... @@ -640,32 +622,30 @@ static inline void gen_cc_V_sub(TCGv dst, TCGv src1, TCGv src2)
640 622  
641 623 l2 = gen_new_label();
642 624 tcg_gen_xor_tl(r_temp, src1, src2);
643   - tcg_gen_xor_tl(r_temp2, src1, dst);
644   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
645   - tcg_gen_andi_tl(r_temp3, r_temp, (1ULL << 63));
646   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp3, r_zero, l2);
  625 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  626 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  627 + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));
  628 + tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);
647 629 tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_OVF);
648 630 gen_set_label(l2);
649 631 }
650 632 #endif
  633 + tcg_gen_discard_tl(r_temp);
651 634 }
652 635  
653 636 static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)
654 637 {
655   - TCGv r_temp, r_temp2, r_temp3, r_zero;
  638 + TCGv r_temp;
656 639 int l1;
657 640  
658 641 l1 = gen_new_label();
659 642  
660 643 r_temp = tcg_temp_new(TCG_TYPE_TL);
661   - r_temp2 = tcg_temp_new(TCG_TYPE_TL);
662   - r_temp3 = tcg_temp_new(TCG_TYPE_TL);
663   - r_zero = tcg_const_tl(0);
664 644 tcg_gen_xor_tl(r_temp, src1, src2);
665   - tcg_gen_xor_tl(r_temp2, src1, dst);
666   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
667   - tcg_gen_andi_tl(r_temp3, r_temp, (1 << 31));
668   - tcg_gen_brcond_i32(TCG_COND_EQ, r_temp3, r_zero, l1);
  645 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  646 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  647 + tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
  648 + tcg_gen_brcond_i32(TCG_COND_EQ, r_temp, tcg_const_i32(0), l1);
669 649 gen_op_exception(TT_TOVF);
670 650 gen_set_label(l1);
671 651 #ifdef TARGET_SPARC64
... ... @@ -674,14 +654,15 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)
674 654  
675 655 l2 = gen_new_label();
676 656 tcg_gen_xor_tl(r_temp, src1, src2);
677   - tcg_gen_xor_tl(r_temp2, src1, dst);
678   - tcg_gen_and_tl(r_temp, r_temp, r_temp2);
679   - tcg_gen_andi_tl(r_temp3, r_temp, (1ULL << 63));
680   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp3, r_zero, l2);
  657 + tcg_gen_xor_tl(cpu_tmp0, src1, dst);
  658 + tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
  659 + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));
  660 + tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);
681 661 gen_op_exception(TT_TOVF);
682 662 gen_set_label(l2);
683 663 }
684 664 #endif
  665 + tcg_gen_discard_tl(r_temp);
685 666 }
686 667  
687 668 static inline void gen_op_sub_T1_T0_cc(void)
... ... @@ -760,13 +741,11 @@ static inline void gen_op_sdivx_T1_T0(void)
760 741 static inline void gen_op_div_cc(void)
761 742 {
762 743 int l1;
763   - TCGv r_zero;
764 744  
765 745 gen_cc_clear();
766 746 gen_cc_NZ(cpu_T[0]);
767 747 l1 = gen_new_label();
768   - r_zero = tcg_const_tl(0);
769   - tcg_gen_brcond_i32(TCG_COND_EQ, cpu_T[1], r_zero, l1);
  748 + tcg_gen_brcond_i32(TCG_COND_EQ, cpu_T[1], tcg_const_i32(0), l1);
770 749 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
771 750 gen_set_label(l1);
772 751 }
... ... @@ -792,36 +771,27 @@ static inline void gen_op_eval_be(TCGv dst, TCGv src)
792 771 // Z | (N ^ V)
793 772 static inline void gen_op_eval_ble(TCGv dst, TCGv src)
794 773 {
795   - TCGv r_flag;
796   -
797   - r_flag = tcg_temp_new(TCG_TYPE_TL);
798   - gen_mov_reg_N(r_flag, src);
  774 + gen_mov_reg_N(cpu_tmp0, src);
799 775 gen_mov_reg_V(dst, src);
800   - tcg_gen_xor_tl(dst, dst, r_flag);
801   - gen_mov_reg_Z(r_flag, src);
802   - tcg_gen_or_tl(dst, dst, r_flag);
  776 + tcg_gen_xor_tl(dst, dst, cpu_tmp0);
  777 + gen_mov_reg_Z(cpu_tmp0, src);
  778 + tcg_gen_or_tl(dst, dst, cpu_tmp0);
803 779 }
804 780  
805 781 // N ^ V
806 782 static inline void gen_op_eval_bl(TCGv dst, TCGv src)
807 783 {
808   - TCGv r_V;
809   -
810   - r_V = tcg_temp_new(TCG_TYPE_TL);
811   - gen_mov_reg_V(r_V, src);
  784 + gen_mov_reg_V(cpu_tmp0, src);
812 785 gen_mov_reg_N(dst, src);
813   - tcg_gen_xor_tl(dst, dst, r_V);
  786 + tcg_gen_xor_tl(dst, dst, cpu_tmp0);
814 787 }
815 788  
816 789 // C | Z
817 790 static inline void gen_op_eval_bleu(TCGv dst, TCGv src)
818 791 {
819   - TCGv r_Z;
820   -
821   - r_Z = tcg_temp_new(TCG_TYPE_TL);
822   - gen_mov_reg_Z(r_Z, src);
  792 + gen_mov_reg_Z(cpu_tmp0, src);
823 793 gen_mov_reg_C(dst, src);
824   - tcg_gen_or_tl(dst, dst, r_Z);
  794 + tcg_gen_or_tl(dst, dst, cpu_tmp0);
825 795 }
826 796  
827 797 // C
... ... @@ -858,38 +828,29 @@ static inline void gen_op_eval_bne(TCGv dst, TCGv src)
858 828 // !(Z | (N ^ V))
859 829 static inline void gen_op_eval_bg(TCGv dst, TCGv src)
860 830 {
861   - TCGv r_flag;
862   -
863   - r_flag = tcg_temp_new(TCG_TYPE_TL);
864   - gen_mov_reg_N(r_flag, src);
  831 + gen_mov_reg_N(cpu_tmp0, src);
865 832 gen_mov_reg_V(dst, src);
866   - tcg_gen_xor_tl(dst, dst, r_flag);
867   - gen_mov_reg_Z(r_flag, src);
868   - tcg_gen_or_tl(dst, dst, r_flag);
  833 + tcg_gen_xor_tl(dst, dst, cpu_tmp0);
  834 + gen_mov_reg_Z(cpu_tmp0, src);
  835 + tcg_gen_or_tl(dst, dst, cpu_tmp0);
869 836 tcg_gen_xori_tl(dst, dst, 0x1);
870 837 }
871 838  
872 839 // !(N ^ V)
873 840 static inline void gen_op_eval_bge(TCGv dst, TCGv src)
874 841 {
875   - TCGv r_V;
876   -
877   - r_V = tcg_temp_new(TCG_TYPE_TL);
878   - gen_mov_reg_V(r_V, src);
  842 + gen_mov_reg_V(cpu_tmp0, src);
879 843 gen_mov_reg_N(dst, src);
880   - tcg_gen_xor_tl(dst, dst, r_V);
  844 + tcg_gen_xor_tl(dst, dst, cpu_tmp0);
881 845 tcg_gen_xori_tl(dst, dst, 0x1);
882 846 }
883 847  
884 848 // !(C | Z)
885 849 static inline void gen_op_eval_bgu(TCGv dst, TCGv src)
886 850 {
887   - TCGv r_Z;
888   -
889   - r_Z = tcg_temp_new(TCG_TYPE_TL);
890   - gen_mov_reg_Z(r_Z, src);
  851 + gen_mov_reg_Z(cpu_tmp0, src);
891 852 gen_mov_reg_C(dst, src);
892   - tcg_gen_or_tl(dst, dst, r_Z);
  853 + tcg_gen_or_tl(dst, dst, cpu_tmp0);
893 854 tcg_gen_xori_tl(dst, dst, 0x1);
894 855 }
895 856  
... ... @@ -939,24 +900,18 @@ static inline void gen_mov_reg_FCC1(TCGv reg, TCGv src,
939 900 static inline void gen_op_eval_fbne(TCGv dst, TCGv src,
940 901 unsigned int fcc_offset)
941 902 {
942   - TCGv r_fcc1;
943   -
944   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
945 903 gen_mov_reg_FCC0(dst, src, fcc_offset);
946   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
947   - tcg_gen_or_tl(dst, dst, r_fcc1);
  904 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  905 + tcg_gen_or_tl(dst, dst, cpu_tmp0);
948 906 }
949 907  
950 908 // 1 or 2: FCC0 ^ FCC1
951 909 static inline void gen_op_eval_fblg(TCGv dst, TCGv src,
952 910 unsigned int fcc_offset)
953 911 {
954   - TCGv r_fcc1;
955   -
956   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
957 912 gen_mov_reg_FCC0(dst, src, fcc_offset);
958   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
959   - tcg_gen_xor_tl(dst, dst, r_fcc1);
  913 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  914 + tcg_gen_xor_tl(dst, dst, cpu_tmp0);
960 915 }
961 916  
962 917 // 1 or 3: FCC0
... ... @@ -970,13 +925,10 @@ static inline void gen_op_eval_fbul(TCGv dst, TCGv src,
970 925 static inline void gen_op_eval_fbl(TCGv dst, TCGv src,
971 926 unsigned int fcc_offset)
972 927 {
973   - TCGv r_fcc1;
974   -
975   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
976 928 gen_mov_reg_FCC0(dst, src, fcc_offset);
977   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
978   - tcg_gen_xori_tl(r_fcc1, r_fcc1, 0x1);
979   - tcg_gen_and_tl(dst, dst, r_fcc1);
  929 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  930 + tcg_gen_xori_tl(cpu_tmp0, cpu_tmp0, 0x1);
  931 + tcg_gen_and_tl(dst, dst, cpu_tmp0);
980 932 }
981 933  
982 934 // 2 or 3: FCC1
... ... @@ -990,37 +942,28 @@ static inline void gen_op_eval_fbug(TCGv dst, TCGv src,
990 942 static inline void gen_op_eval_fbg(TCGv dst, TCGv src,
991 943 unsigned int fcc_offset)
992 944 {
993   - TCGv r_fcc1;
994   -
995   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
996 945 gen_mov_reg_FCC0(dst, src, fcc_offset);
997 946 tcg_gen_xori_tl(dst, dst, 0x1);
998   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
999   - tcg_gen_and_tl(dst, dst, r_fcc1);
  947 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  948 + tcg_gen_and_tl(dst, dst, cpu_tmp0);
1000 949 }
1001 950  
1002 951 // 3: FCC0 & FCC1
1003 952 static inline void gen_op_eval_fbu(TCGv dst, TCGv src,
1004 953 unsigned int fcc_offset)
1005 954 {
1006   - TCGv r_fcc1;
1007   -
1008   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
1009 955 gen_mov_reg_FCC0(dst, src, fcc_offset);
1010   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
1011   - tcg_gen_and_tl(dst, dst, r_fcc1);
  956 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  957 + tcg_gen_and_tl(dst, dst, cpu_tmp0);
1012 958 }
1013 959  
1014 960 // 0: !(FCC0 | FCC1)
1015 961 static inline void gen_op_eval_fbe(TCGv dst, TCGv src,
1016 962 unsigned int fcc_offset)
1017 963 {
1018   - TCGv r_fcc1;
1019   -
1020   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
1021 964 gen_mov_reg_FCC0(dst, src, fcc_offset);
1022   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
1023   - tcg_gen_or_tl(dst, dst, r_fcc1);
  965 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  966 + tcg_gen_or_tl(dst, dst, cpu_tmp0);
1024 967 tcg_gen_xori_tl(dst, dst, 0x1);
1025 968 }
1026 969  
... ... @@ -1028,12 +971,9 @@ static inline void gen_op_eval_fbe(TCGv dst, TCGv src,
1028 971 static inline void gen_op_eval_fbue(TCGv dst, TCGv src,
1029 972 unsigned int fcc_offset)
1030 973 {
1031   - TCGv r_fcc1;
1032   -
1033   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
1034 974 gen_mov_reg_FCC0(dst, src, fcc_offset);
1035   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
1036   - tcg_gen_xor_tl(dst, dst, r_fcc1);
  975 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  976 + tcg_gen_xor_tl(dst, dst, cpu_tmp0);
1037 977 tcg_gen_xori_tl(dst, dst, 0x1);
1038 978 }
1039 979  
... ... @@ -1049,13 +989,10 @@ static inline void gen_op_eval_fbge(TCGv dst, TCGv src,
1049 989 static inline void gen_op_eval_fbuge(TCGv dst, TCGv src,
1050 990 unsigned int fcc_offset)
1051 991 {
1052   - TCGv r_fcc1;
1053   -
1054   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
1055 992 gen_mov_reg_FCC0(dst, src, fcc_offset);
1056   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
1057   - tcg_gen_xori_tl(r_fcc1, r_fcc1, 0x1);
1058   - tcg_gen_and_tl(dst, dst, r_fcc1);
  993 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  994 + tcg_gen_xori_tl(cpu_tmp0, cpu_tmp0, 0x1);
  995 + tcg_gen_and_tl(dst, dst, cpu_tmp0);
1059 996 tcg_gen_xori_tl(dst, dst, 0x1);
1060 997 }
1061 998  
... ... @@ -1071,13 +1008,10 @@ static inline void gen_op_eval_fble(TCGv dst, TCGv src,
1071 1008 static inline void gen_op_eval_fbule(TCGv dst, TCGv src,
1072 1009 unsigned int fcc_offset)
1073 1010 {
1074   - TCGv r_fcc1;
1075   -
1076   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
1077 1011 gen_mov_reg_FCC0(dst, src, fcc_offset);
1078 1012 tcg_gen_xori_tl(dst, dst, 0x1);
1079   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
1080   - tcg_gen_and_tl(dst, dst, r_fcc1);
  1013 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  1014 + tcg_gen_and_tl(dst, dst, cpu_tmp0);
1081 1015 tcg_gen_xori_tl(dst, dst, 0x1);
1082 1016 }
1083 1017  
... ... @@ -1085,25 +1019,20 @@ static inline void gen_op_eval_fbule(TCGv dst, TCGv src,
1085 1019 static inline void gen_op_eval_fbo(TCGv dst, TCGv src,
1086 1020 unsigned int fcc_offset)
1087 1021 {
1088   - TCGv r_fcc1;
1089   -
1090   - r_fcc1 = tcg_temp_new(TCG_TYPE_TL);
1091 1022 gen_mov_reg_FCC0(dst, src, fcc_offset);
1092   - gen_mov_reg_FCC1(r_fcc1, src, fcc_offset);
1093   - tcg_gen_and_tl(dst, dst, r_fcc1);
  1023 + gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
  1024 + tcg_gen_and_tl(dst, dst, cpu_tmp0);
1094 1025 tcg_gen_xori_tl(dst, dst, 0x1);
1095 1026 }
1096 1027  
1097 1028 static inline void gen_branch2(DisasContext *dc, target_ulong pc1,
1098 1029 target_ulong pc2, TCGv r_cond)
1099 1030 {
1100   - TCGv r_zero;
1101 1031 int l1;
1102 1032  
1103 1033 l1 = gen_new_label();
1104   - r_zero = tcg_const_tl(0);
1105 1034  
1106   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, r_zero, l1);
  1035 + tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
1107 1036  
1108 1037 gen_goto_tb(dc, 0, pc1, pc1 + 4);
1109 1038  
... ... @@ -1114,13 +1043,11 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1,
1114 1043 static inline void gen_branch_a(DisasContext *dc, target_ulong pc1,
1115 1044 target_ulong pc2, TCGv r_cond)
1116 1045 {
1117   - TCGv r_zero;
1118 1046 int l1;
1119 1047  
1120 1048 l1 = gen_new_label();
1121   - r_zero = tcg_const_tl(0);
1122 1049  
1123   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, r_zero, l1);
  1050 + tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
1124 1051  
1125 1052 gen_goto_tb(dc, 0, pc2, pc1);
1126 1053  
... ... @@ -1137,14 +1064,12 @@ static inline void gen_branch(DisasContext *dc, target_ulong pc,
1137 1064 static inline void gen_generic_branch(target_ulong npc1, target_ulong npc2,
1138 1065 TCGv r_cond)
1139 1066 {
1140   - TCGv r_zero;
1141 1067 int l1, l2;
1142 1068  
1143 1069 l1 = gen_new_label();
1144 1070 l2 = gen_new_label();
1145   - r_zero = tcg_const_tl(0);
1146 1071  
1147   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, r_zero, l1);
  1072 + tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
1148 1073  
1149 1074 gen_movl_npc_im(npc1);
1150 1075 gen_op_jmp_label(l2);
... ... @@ -1354,13 +1279,11 @@ static const int gen_tcg_cond_reg[8] = {
1354 1279  
1355 1280 static inline void gen_cond_reg(TCGv r_dst, int cond)
1356 1281 {
1357   - TCGv r_zero;
1358 1282 int l1;
1359 1283  
1360 1284 l1 = gen_new_label();
1361   - r_zero = tcg_const_tl(0);
1362   - tcg_gen_mov_tl(r_dst, r_zero);
1363   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0], r_zero, l1);
  1285 + tcg_gen_movi_tl(r_dst, 0);
  1286 + tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0], tcg_const_tl(0), l1);
1364 1287 tcg_gen_movi_tl(r_dst, 1);
1365 1288 gen_set_label(l1);
1366 1289 }
... ... @@ -1614,175 +1537,134 @@ static inline void gen_clear_float_exceptions(void)
1614 1537  
1615 1538 /* asi moves */
1616 1539 #ifdef TARGET_SPARC64
1617   -static inline void gen_ld_asi(int insn, int size, int sign)
  1540 +static inline TCGv gen_get_asi(int insn, TCGv r_addr)
1618 1541 {
1619 1542 int asi, offset;
1620   - TCGv r_size, r_sign;
  1543 + TCGv r_asi;
1621 1544  
1622   - r_size = tcg_temp_new(TCG_TYPE_I32);
1623   - r_sign = tcg_temp_new(TCG_TYPE_I32);
1624   - tcg_gen_movi_i32(r_size, size);
1625   - tcg_gen_movi_i32(r_sign, sign);
1626 1545 if (IS_IMM) {
  1546 + r_asi = tcg_temp_new(TCG_TYPE_I32);
1627 1547 offset = GET_FIELD(insn, 25, 31);
1628   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1629   - tcg_gen_ld_i32(cpu_T[1], cpu_env, offsetof(CPUSPARCState, asi));
  1548 + tcg_gen_addi_tl(r_addr, r_addr, offset);
  1549 + tcg_gen_ld_i32(r_asi, cpu_env, offsetof(CPUSPARCState, asi));
1630 1550 } else {
1631 1551 asi = GET_FIELD(insn, 19, 26);
1632   - tcg_gen_movi_i32(cpu_T[1], asi);
  1552 + r_asi = tcg_const_i32(asi);
1633 1553 }
1634   - tcg_gen_helper_1_4(helper_ld_asi, cpu_T[1], cpu_T[0], cpu_T[1], r_size,
1635   - r_sign);
  1554 + return r_asi;
  1555 +}
  1556 +
  1557 +static inline void gen_ld_asi(int insn, int size, int sign)
  1558 +{
  1559 + TCGv r_asi;
  1560 +
  1561 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1562 + tcg_gen_helper_1_4(helper_ld_asi, cpu_T[1], cpu_T[0], r_asi,
  1563 + tcg_const_i32(size), tcg_const_i32(sign));
  1564 + tcg_gen_discard_i32(r_asi);
1636 1565 }
1637 1566  
1638 1567 static inline void gen_st_asi(int insn, int size)
1639 1568 {
1640   - int asi, offset;
1641   - TCGv r_asi, r_size;
  1569 + TCGv r_asi;
1642 1570  
1643   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1644   - r_size = tcg_temp_new(TCG_TYPE_I32);
1645   - tcg_gen_movi_i32(r_size, size);
1646   - if (IS_IMM) {
1647   - offset = GET_FIELD(insn, 25, 31);
1648   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1649   - tcg_gen_ld_i32(r_asi, cpu_env, offsetof(CPUSPARCState, asi));
1650   - } else {
1651   - asi = GET_FIELD(insn, 19, 26);
1652   - tcg_gen_movi_i32(r_asi, asi);
1653   - }
1654   - tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], cpu_T[1], r_asi, r_size);
  1571 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1572 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], cpu_T[1], r_asi,
  1573 + tcg_const_i32(size));
  1574 + tcg_gen_discard_i32(r_asi);
1655 1575 }
1656 1576  
1657 1577 static inline void gen_ldf_asi(int insn, int size, int rd)
1658 1578 {
1659   - int asi, offset;
1660   - TCGv r_asi, r_size, r_rd;
  1579 + TCGv r_asi;
1661 1580  
1662   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1663   - r_size = tcg_temp_new(TCG_TYPE_I32);
1664   - r_rd = tcg_temp_new(TCG_TYPE_I32);
1665   - tcg_gen_movi_i32(r_size, size);
1666   - tcg_gen_movi_i32(r_rd, rd);
1667   - if (IS_IMM) {
1668   - offset = GET_FIELD(insn, 25, 31);
1669   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1670   - tcg_gen_ld_i32(r_asi, cpu_env, offsetof(CPUSPARCState, asi));
1671   - } else {
1672   - asi = GET_FIELD(insn, 19, 26);
1673   - tcg_gen_movi_i32(r_asi, asi);
1674   - }
1675   - tcg_gen_helper_0_4(helper_ldf_asi, cpu_T[0], r_asi, r_size, r_rd);
  1581 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1582 + tcg_gen_helper_0_4(helper_ldf_asi, cpu_T[0], r_asi, tcg_const_i32(size),
  1583 + tcg_const_i32(rd));
  1584 + tcg_gen_discard_i32(r_asi);
1676 1585 }
1677 1586  
1678 1587 static inline void gen_stf_asi(int insn, int size, int rd)
1679 1588 {
1680   - int asi, offset;
1681   - TCGv r_asi, r_size, r_rd;
  1589 + TCGv r_asi;
1682 1590  
1683   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1684   - r_size = tcg_temp_new(TCG_TYPE_I32);
1685   - r_rd = tcg_temp_new(TCG_TYPE_I32);
1686   - tcg_gen_movi_i32(r_size, size);
1687   - tcg_gen_movi_i32(r_rd, rd);
1688   - if (IS_IMM) {
1689   - offset = GET_FIELD(insn, 25, 31);
1690   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1691   - tcg_gen_ld_i32(r_asi, cpu_env, offsetof(CPUSPARCState, asi));
1692   - } else {
1693   - asi = GET_FIELD(insn, 19, 26);
1694   - tcg_gen_movi_i32(r_asi, asi);
1695   - }
1696   - tcg_gen_helper_0_4(helper_stf_asi, cpu_T[0], r_asi, r_size, r_rd);
  1591 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1592 + tcg_gen_helper_0_4(helper_stf_asi, cpu_T[0], r_asi, tcg_const_i32(size),
  1593 + tcg_const_i32(rd));
  1594 + tcg_gen_discard_i32(r_asi);
1697 1595 }
1698 1596  
1699 1597 static inline void gen_swap_asi(int insn)
1700 1598 {
1701   - int asi, offset;
1702   - TCGv r_size, r_sign, r_temp;
  1599 + TCGv r_temp, r_asi;
1703 1600  
1704   - r_size = tcg_temp_new(TCG_TYPE_I32);
1705   - r_sign = tcg_temp_new(TCG_TYPE_I32);
1706 1601 r_temp = tcg_temp_new(TCG_TYPE_I32);
1707   - tcg_gen_movi_i32(r_size, 4);
1708   - tcg_gen_movi_i32(r_sign, 0);
1709   - if (IS_IMM) {
1710   - offset = GET_FIELD(insn, 25, 31);
1711   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1712   - tcg_gen_ld_i32(cpu_T[1], cpu_env, offsetof(CPUSPARCState, asi));
1713   - } else {
1714   - asi = GET_FIELD(insn, 19, 26);
1715   - tcg_gen_movi_i32(cpu_T[1], asi);
1716   - }
1717   - tcg_gen_helper_1_4(helper_ld_asi, r_temp, cpu_T[0], cpu_T[1], r_size,
1718   - r_sign);
1719   - tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], cpu_T[1], r_size, r_sign);
  1602 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1603 + tcg_gen_helper_1_4(helper_ld_asi, r_temp, cpu_T[0], r_asi,
  1604 + tcg_const_i32(4), tcg_const_i32(0));
  1605 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_temp, r_asi,
  1606 + tcg_const_i32(4));
1720 1607 tcg_gen_mov_i32(cpu_T[1], r_temp);
  1608 + tcg_gen_discard_i32(r_asi);
  1609 + tcg_gen_discard_i32(r_temp);
1721 1610 }
1722 1611  
1723 1612 static inline void gen_ldda_asi(int insn)
1724 1613 {
1725   - int asi, offset;
1726   - TCGv r_size, r_sign, r_dword;
  1614 + TCGv r_dword, r_asi;
1727 1615  
1728   - r_size = tcg_temp_new(TCG_TYPE_I32);
1729   - r_sign = tcg_temp_new(TCG_TYPE_I32);
1730 1616 r_dword = tcg_temp_new(TCG_TYPE_I64);
1731   - tcg_gen_movi_i32(r_size, 8);
1732   - tcg_gen_movi_i32(r_sign, 0);
1733   - if (IS_IMM) {
1734   - offset = GET_FIELD(insn, 25, 31);
1735   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1736   - tcg_gen_ld_i32(cpu_T[1], cpu_env, offsetof(CPUSPARCState, asi));
1737   - } else {
1738   - asi = GET_FIELD(insn, 19, 26);
1739   - tcg_gen_movi_i32(cpu_T[1], asi);
1740   - }
1741   - tcg_gen_helper_1_4(helper_ld_asi, r_dword, cpu_T[0], cpu_T[1], r_size,
1742   - r_sign);
  1617 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1618 + tcg_gen_helper_1_4(helper_ld_asi, r_dword, cpu_T[0], r_asi,
  1619 + tcg_const_i32(8), tcg_const_i32(0));
1743 1620 tcg_gen_trunc_i64_i32(cpu_T[0], r_dword);
1744 1621 tcg_gen_shri_i64(r_dword, r_dword, 32);
1745 1622 tcg_gen_trunc_i64_i32(cpu_T[1], r_dword);
  1623 + tcg_gen_discard_i32(r_asi);
  1624 + tcg_gen_discard_i64(r_dword);
  1625 +}
  1626 +
  1627 +static inline void gen_stda_asi(int insn, int rd)
  1628 +{
  1629 + TCGv r_dword, r_temp, r_asi;
  1630 +
  1631 + r_dword = tcg_temp_new(TCG_TYPE_I64);
  1632 + r_temp = tcg_temp_new(TCG_TYPE_I32);
  1633 + gen_movl_reg_TN(rd + 1, r_temp);
  1634 + tcg_gen_helper_1_2(helper_pack64, r_dword, cpu_T[1],
  1635 + r_temp);
  1636 + r_asi = gen_get_asi(insn, cpu_T[0]);
  1637 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_dword, r_asi,
  1638 + tcg_const_i32(8));
  1639 + tcg_gen_discard_i32(r_asi);
  1640 + tcg_gen_discard_i32(r_temp);
  1641 + tcg_gen_discard_i64(r_dword);
1746 1642 }
1747 1643  
1748 1644 static inline void gen_cas_asi(int insn, int rd)
1749 1645 {
1750   - int asi, offset;
1751 1646 TCGv r_val1, r_asi;
1752 1647  
1753 1648 r_val1 = tcg_temp_new(TCG_TYPE_I32);
1754   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1755 1649 gen_movl_reg_TN(rd, r_val1);
1756   - if (IS_IMM) {
1757   - offset = GET_FIELD(insn, 25, 31);
1758   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1759   - tcg_gen_ld_i32(r_asi, cpu_env, offsetof(CPUSPARCState, asi));
1760   - } else {
1761   - asi = GET_FIELD(insn, 19, 26);
1762   - tcg_gen_movi_i32(r_asi, asi);
1763   - }
  1650 + r_asi = gen_get_asi(insn, cpu_T[0]);
1764 1651 tcg_gen_helper_1_4(helper_cas_asi, cpu_T[1], cpu_T[0], r_val1, cpu_T[1],
1765 1652 r_asi);
  1653 + tcg_gen_discard_i32(r_asi);
  1654 + tcg_gen_discard_i32(r_val1);
1766 1655 }
1767 1656  
1768 1657 static inline void gen_casx_asi(int insn, int rd)
1769 1658 {
1770   - int asi, offset;
1771 1659 TCGv r_val1, r_asi;
1772 1660  
1773 1661 r_val1 = tcg_temp_new(TCG_TYPE_I64);
1774   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1775 1662 gen_movl_reg_TN(rd, r_val1);
1776   - if (IS_IMM) {
1777   - offset = GET_FIELD(insn, 25, 31);
1778   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
1779   - tcg_gen_ld_i32(r_asi, cpu_env, offsetof(CPUSPARCState, asi));
1780   - } else {
1781   - asi = GET_FIELD(insn, 19, 26);
1782   - tcg_gen_movi_i32(r_asi, asi);
1783   - }
  1663 + r_asi = gen_get_asi(insn, cpu_T[0]);
1784 1664 tcg_gen_helper_1_4(helper_casx_asi, cpu_T[1], cpu_T[0], r_val1, cpu_T[1],
1785 1665 r_asi);
  1666 + tcg_gen_discard_i32(r_asi);
  1667 + tcg_gen_discard_i32(r_val1);
1786 1668 }
1787 1669  
1788 1670 #elif !defined(CONFIG_USER_ONLY)
... ... @@ -1790,70 +1672,72 @@ static inline void gen_casx_asi(int insn, int rd)
1790 1672 static inline void gen_ld_asi(int insn, int size, int sign)
1791 1673 {
1792 1674 int asi;
1793   - TCGv r_size, r_sign, r_dword;
  1675 + TCGv r_dword;
1794 1676  
1795   - r_size = tcg_temp_new(TCG_TYPE_I32);
1796   - r_sign = tcg_temp_new(TCG_TYPE_I32);
1797 1677 r_dword = tcg_temp_new(TCG_TYPE_I64);
1798   - tcg_gen_movi_i32(r_size, size);
1799   - tcg_gen_movi_i32(r_sign, sign);
1800 1678 asi = GET_FIELD(insn, 19, 26);
1801   - tcg_gen_movi_i32(cpu_T[1], asi);
1802   - tcg_gen_helper_1_4(helper_ld_asi, r_dword, cpu_T[0], cpu_T[1], r_size,
1803   - r_sign);
  1679 + tcg_gen_helper_1_4(helper_ld_asi, r_dword, cpu_T[0], tcg_const_i32(asi),
  1680 + tcg_const_i32(size), tcg_const_i32(sign));
1804 1681 tcg_gen_trunc_i64_i32(cpu_T[1], r_dword);
  1682 + tcg_gen_discard_i64(r_dword);
1805 1683 }
1806 1684  
1807 1685 static inline void gen_st_asi(int insn, int size)
1808 1686 {
1809 1687 int asi;
1810   - TCGv r_dword, r_asi, r_size;
  1688 + TCGv r_dword;
1811 1689  
1812 1690 r_dword = tcg_temp_new(TCG_TYPE_I64);
1813 1691 tcg_gen_extu_i32_i64(r_dword, cpu_T[1]);
1814   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1815   - r_size = tcg_temp_new(TCG_TYPE_I32);
1816 1692 asi = GET_FIELD(insn, 19, 26);
1817   - tcg_gen_movi_i32(r_asi, asi);
1818   - tcg_gen_movi_i32(r_size, size);
1819   - tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_dword, r_asi, r_size);
  1693 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_dword, tcg_const_i32(asi),
  1694 + tcg_const_i32(size));
  1695 + tcg_gen_discard_i64(r_dword);
1820 1696 }
1821 1697  
1822 1698 static inline void gen_swap_asi(int insn)
1823 1699 {
1824 1700 int asi;
1825   - TCGv r_size, r_sign, r_temp;
  1701 + TCGv r_temp;
1826 1702  
1827   - r_size = tcg_temp_new(TCG_TYPE_I32);
1828   - r_sign = tcg_temp_new(TCG_TYPE_I32);
1829 1703 r_temp = tcg_temp_new(TCG_TYPE_I32);
1830   - tcg_gen_movi_i32(r_size, 4);
1831   - tcg_gen_movi_i32(r_sign, 0);
1832 1704 asi = GET_FIELD(insn, 19, 26);
1833   - tcg_gen_movi_i32(cpu_T[1], asi);
1834   - tcg_gen_helper_1_4(helper_ld_asi, r_temp, cpu_T[0], cpu_T[1], r_size,
1835   - r_sign);
1836   - tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], cpu_T[1], r_size, r_sign);
  1705 + tcg_gen_helper_1_4(helper_ld_asi, r_temp, cpu_T[0], tcg_const_i32(asi),
  1706 + tcg_const_i32(4), tcg_const_i32(0));
  1707 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], cpu_T[1], tcg_const_i32(asi),
  1708 + tcg_const_i32(4));
1837 1709 tcg_gen_mov_i32(cpu_T[1], r_temp);
  1710 + tcg_gen_discard_i32(r_temp);
1838 1711 }
1839 1712  
1840 1713 static inline void gen_ldda_asi(int insn)
1841 1714 {
1842 1715 int asi;
1843   - TCGv r_size, r_sign, r_dword;
  1716 + TCGv r_dword;
1844 1717  
1845   - r_size = tcg_temp_new(TCG_TYPE_I32);
1846   - r_sign = tcg_temp_new(TCG_TYPE_I32);
1847 1718 r_dword = tcg_temp_new(TCG_TYPE_I64);
1848   - tcg_gen_movi_i32(r_size, 8);
1849   - tcg_gen_movi_i32(r_sign, 0);
1850 1719 asi = GET_FIELD(insn, 19, 26);
1851   - tcg_gen_movi_i32(cpu_T[1], asi);
1852   - tcg_gen_helper_1_4(helper_ld_asi, r_dword, cpu_T[0], cpu_T[1], r_size,
1853   - r_sign);
  1720 + tcg_gen_helper_1_4(helper_ld_asi, r_dword, cpu_T[0], tcg_const_i32(asi),
  1721 + tcg_const_i32(8), tcg_const_i32(0));
1854 1722 tcg_gen_trunc_i64_i32(cpu_T[0], r_dword);
1855 1723 tcg_gen_shri_i64(r_dword, r_dword, 32);
1856 1724 tcg_gen_trunc_i64_i32(cpu_T[1], r_dword);
  1725 + tcg_gen_discard_i64(r_dword);
  1726 +}
  1727 +
  1728 +static inline void gen_stda_asi(int insn, int rd)
  1729 +{
  1730 + int asi;
  1731 + TCGv r_dword, r_temp;
  1732 +
  1733 + r_dword = tcg_temp_new(TCG_TYPE_I64);
  1734 + r_temp = tcg_temp_new(TCG_TYPE_I32);
  1735 + gen_movl_reg_TN(rd + 1, r_temp);
  1736 + tcg_gen_helper_1_2(helper_pack64, r_dword, cpu_T[1], r_temp);
  1737 + asi = GET_FIELD(insn, 19, 26);
  1738 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_dword, tcg_const_i32(asi),
  1739 + tcg_const_i32(8));
  1740 + tcg_gen_discard_i64(r_dword);
1857 1741 }
1858 1742 #endif
1859 1743  
... ... @@ -1861,18 +1745,12 @@ static inline void gen_ldda_asi(int insn)
1861 1745 static inline void gen_ldstub_asi(int insn)
1862 1746 {
1863 1747 int asi;
1864   - TCGv r_dword, r_asi, r_size;
1865 1748  
1866 1749 gen_ld_asi(insn, 1, 0);
1867 1750  
1868   - r_dword = tcg_temp_new(TCG_TYPE_I64);
1869   - r_asi = tcg_temp_new(TCG_TYPE_I32);
1870   - r_size = tcg_temp_new(TCG_TYPE_I32);
1871 1751 asi = GET_FIELD(insn, 19, 26);
1872   - tcg_gen_movi_i32(r_dword, 0xff);
1873   - tcg_gen_movi_i32(r_asi, asi);
1874   - tcg_gen_movi_i32(r_size, 1);
1875   - tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_dword, r_asi, r_size);
  1752 + tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], tcg_const_i64(0xff),
  1753 + tcg_const_i32(asi), tcg_const_i32(1));
1876 1754 }
1877 1755 #endif
1878 1756  
... ... @@ -2028,6 +1906,7 @@ static void disas_sparc_insn(DisasContext * dc)
2028 1906 gen_cond(r_cond, 0, cond);
2029 1907 #endif
2030 1908 tcg_gen_helper_0_2(helper_trapcc, cpu_T[0], r_cond);
  1909 + tcg_gen_discard_tl(r_cond);
2031 1910 }
2032 1911 gen_op_next_insn();
2033 1912 tcg_gen_exit_tb(0);
... ... @@ -2069,6 +1948,7 @@ static void disas_sparc_insn(DisasContext * dc)
2069 1948 tcg_gen_helper_1_1(helper_tick_get_count, cpu_T[0],
2070 1949 r_tickptr);
2071 1950 gen_movl_T0_reg(rd);
  1951 + tcg_gen_discard_ptr(r_tickptr);
2072 1952 }
2073 1953 break;
2074 1954 case 0x5: /* V9 rdpc */
... ... @@ -2101,6 +1981,7 @@ static void disas_sparc_insn(DisasContext * dc)
2101 1981 tcg_gen_helper_1_1(helper_tick_get_count, cpu_T[0],
2102 1982 r_tickptr);
2103 1983 gen_movl_T0_reg(rd);
  1984 + tcg_gen_discard_ptr(r_tickptr);
2104 1985 }
2105 1986 break;
2106 1987 case 0x19: /* System tick compare */
... ... @@ -2167,6 +2048,7 @@ static void disas_sparc_insn(DisasContext * dc)
2167 2048 offsetof(CPUState, tsptr));
2168 2049 tcg_gen_ld_tl(cpu_T[0], r_tsptr,
2169 2050 offsetof(trap_state, tpc));
  2051 + tcg_gen_discard_ptr(r_tsptr);
2170 2052 }
2171 2053 break;
2172 2054 case 1: // tnpc
... ... @@ -2178,6 +2060,7 @@ static void disas_sparc_insn(DisasContext * dc)
2178 2060 offsetof(CPUState, tsptr));
2179 2061 tcg_gen_ld_tl(cpu_T[0], r_tsptr,
2180 2062 offsetof(trap_state, tnpc));
  2063 + tcg_gen_discard_ptr(r_tsptr);
2181 2064 }
2182 2065 break;
2183 2066 case 2: // tstate
... ... @@ -2189,6 +2072,7 @@ static void disas_sparc_insn(DisasContext * dc)
2189 2072 offsetof(CPUState, tsptr));
2190 2073 tcg_gen_ld_tl(cpu_T[0], r_tsptr,
2191 2074 offsetof(trap_state, tstate));
  2075 + tcg_gen_discard_ptr(r_tsptr);
2192 2076 }
2193 2077 break;
2194 2078 case 3: // tt
... ... @@ -2200,6 +2084,7 @@ static void disas_sparc_insn(DisasContext * dc)
2200 2084 offsetof(CPUState, tsptr));
2201 2085 tcg_gen_ld_i32(cpu_T[0], r_tsptr,
2202 2086 offsetof(trap_state, tt));
  2087 + tcg_gen_discard_ptr(r_tsptr);
2203 2088 }
2204 2089 break;
2205 2090 case 4: // tick
... ... @@ -2212,6 +2097,7 @@ static void disas_sparc_insn(DisasContext * dc)
2212 2097 tcg_gen_helper_1_1(helper_tick_get_count, cpu_T[0],
2213 2098 r_tickptr);
2214 2099 gen_movl_T0_reg(rd);
  2100 + tcg_gen_discard_ptr(r_tickptr);
2215 2101 }
2216 2102 break;
2217 2103 case 5: // tba
... ... @@ -2659,44 +2545,41 @@ static void disas_sparc_insn(DisasContext * dc)
2659 2545 xop = GET_FIELD(insn, 18, 26);
2660 2546 #ifdef TARGET_SPARC64
2661 2547 if ((xop & 0x11f) == 0x005) { // V9 fmovsr
2662   - TCGv r_zero;
2663 2548 int l1;
2664 2549  
2665 2550 l1 = gen_new_label();
2666   - r_zero = tcg_const_tl(0);
2667 2551 cond = GET_FIELD_SP(insn, 14, 17);
2668 2552 rs1 = GET_FIELD(insn, 13, 17);
2669 2553 gen_movl_reg_T0(rs1);
2670   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0], r_zero, l1);
  2554 + tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0],
  2555 + tcg_const_tl(0), l1);
2671 2556 gen_op_load_fpr_FT0(rs2);
2672 2557 gen_op_store_FT0_fpr(rd);
2673 2558 gen_set_label(l1);
2674 2559 break;
2675 2560 } else if ((xop & 0x11f) == 0x006) { // V9 fmovdr
2676   - TCGv r_zero;
2677 2561 int l1;
2678 2562  
2679 2563 l1 = gen_new_label();
2680   - r_zero = tcg_const_tl(0);
2681 2564 cond = GET_FIELD_SP(insn, 14, 17);
2682 2565 rs1 = GET_FIELD(insn, 13, 17);
2683 2566 gen_movl_reg_T0(rs1);
2684   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0], r_zero, l1);
  2567 + tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0],
  2568 + tcg_const_tl(0), l1);
2685 2569 gen_op_load_fpr_DT0(DFPREG(rs2));
2686 2570 gen_op_store_DT0_fpr(DFPREG(rd));
2687 2571 gen_set_label(l1);
2688 2572 break;
2689 2573 } else if ((xop & 0x11f) == 0x007) { // V9 fmovqr
2690 2574 #if defined(CONFIG_USER_ONLY)
2691   - TCGv r_zero;
2692 2575 int l1;
2693 2576  
2694 2577 l1 = gen_new_label();
2695   - r_zero = tcg_const_tl(0);
2696 2578 cond = GET_FIELD_SP(insn, 14, 17);
2697 2579 rs1 = GET_FIELD(insn, 13, 17);
2698 2580 gen_movl_reg_T0(rs1);
2699   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0], r_zero, l1);
  2581 + tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0],
  2582 + tcg_const_tl(0), l1);
2700 2583 gen_op_load_fpr_QT0(QFPREG(rs2));
2701 2584 gen_op_store_QT0_fpr(QFPREG(rd));
2702 2585 gen_set_label(l1);
... ... @@ -2710,18 +2593,19 @@ static void disas_sparc_insn(DisasContext * dc)
2710 2593 #ifdef TARGET_SPARC64
2711 2594 #define FMOVCC(size_FDQ, fcc) \
2712 2595 { \
2713   - TCGv r_zero, r_cond; \
  2596 + TCGv r_cond; \
2714 2597 int l1; \
2715 2598 \
2716 2599 l1 = gen_new_label(); \
2717   - r_zero = tcg_const_tl(0); \
2718 2600 r_cond = tcg_temp_new(TCG_TYPE_TL); \
2719 2601 cond = GET_FIELD_SP(insn, 14, 17); \
2720 2602 gen_fcond(r_cond, fcc, cond); \
2721   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, r_zero, l1); \
  2603 + tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, \
  2604 + tcg_const_tl(0), l1); \
2722 2605 glue(glue(gen_op_load_fpr_, size_FDQ), T0)(glue(size_FDQ, FPREG(rs2))); \
2723 2606 glue(glue(gen_op_store_, size_FDQ), T0_fpr)(glue(size_FDQ, FPREG(rd))); \
2724 2607 gen_set_label(l1); \
  2608 + tcg_gen_discard_tl(r_cond); \
2725 2609 }
2726 2610 case 0x001: /* V9 fmovscc %fcc0 */
2727 2611 FMOVCC(F, 0);
... ... @@ -2778,18 +2662,19 @@ static void disas_sparc_insn(DisasContext * dc)
2778 2662 #undef FMOVCC
2779 2663 #define FMOVCC(size_FDQ, icc) \
2780 2664 { \
2781   - TCGv r_zero, r_cond; \
  2665 + TCGv r_cond; \
2782 2666 int l1; \
2783 2667 \
2784 2668 l1 = gen_new_label(); \
2785   - r_zero = tcg_const_tl(0); \
2786 2669 r_cond = tcg_temp_new(TCG_TYPE_TL); \
2787 2670 cond = GET_FIELD_SP(insn, 14, 17); \
2788 2671 gen_cond(r_cond, icc, cond); \
2789   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, r_zero, l1); \
  2672 + tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, \
  2673 + tcg_const_tl(0), l1); \
2790 2674 glue(glue(gen_op_load_fpr_, size_FDQ), T0)(glue(size_FDQ, FPREG(rs2))); \
2791 2675 glue(glue(gen_op_store_, size_FDQ), T0_fpr)(glue(size_FDQ, FPREG(rd))); \
2792 2676 gen_set_label(l1); \
  2677 + tcg_gen_discard_tl(r_cond); \
2793 2678 }
2794 2679  
2795 2680 case 0x101: /* V9 fmovscc %icc */
... ... @@ -3178,6 +3063,7 @@ static void disas_sparc_insn(DisasContext * dc)
3178 3063 offsetof(CPUState, tick));
3179 3064 tcg_gen_helper_0_2(helper_tick_set_limit,
3180 3065 r_tickptr, cpu_T[0]);
  3066 + tcg_gen_discard_ptr(r_tickptr);
3181 3067 }
3182 3068 break;
3183 3069 case 0x18: /* System tick */
... ... @@ -3194,6 +3080,7 @@ static void disas_sparc_insn(DisasContext * dc)
3194 3080 offsetof(CPUState, stick));
3195 3081 tcg_gen_helper_0_2(helper_tick_set_count,
3196 3082 r_tickptr, cpu_T[0]);
  3083 + tcg_gen_discard_ptr(r_tickptr);
3197 3084 }
3198 3085 break;
3199 3086 case 0x19: /* System tick compare */
... ... @@ -3212,6 +3099,7 @@ static void disas_sparc_insn(DisasContext * dc)
3212 3099 offsetof(CPUState, stick));
3213 3100 tcg_gen_helper_0_2(helper_tick_set_limit,
3214 3101 r_tickptr, cpu_T[0]);
  3102 + tcg_gen_discard_ptr(r_tickptr);
3215 3103 }
3216 3104 break;
3217 3105  
... ... @@ -3274,6 +3162,7 @@ static void disas_sparc_insn(DisasContext * dc)
3274 3162 offsetof(CPUState, tsptr));
3275 3163 tcg_gen_st_tl(cpu_T[0], r_tsptr,
3276 3164 offsetof(trap_state, tpc));
  3165 + tcg_gen_discard_ptr(r_tsptr);
3277 3166 }
3278 3167 break;
3279 3168 case 1: // tnpc
... ... @@ -3285,6 +3174,7 @@ static void disas_sparc_insn(DisasContext * dc)
3285 3174 offsetof(CPUState, tsptr));
3286 3175 tcg_gen_st_tl(cpu_T[0], r_tsptr,
3287 3176 offsetof(trap_state, tnpc));
  3177 + tcg_gen_discard_ptr(r_tsptr);
3288 3178 }
3289 3179 break;
3290 3180 case 2: // tstate
... ... @@ -3296,6 +3186,7 @@ static void disas_sparc_insn(DisasContext * dc)
3296 3186 offsetof(CPUState, tsptr));
3297 3187 tcg_gen_st_tl(cpu_T[0], r_tsptr,
3298 3188 offsetof(trap_state, tstate));
  3189 + tcg_gen_discard_ptr(r_tsptr);
3299 3190 }
3300 3191 break;
3301 3192 case 3: // tt
... ... @@ -3307,6 +3198,7 @@ static void disas_sparc_insn(DisasContext * dc)
3307 3198 offsetof(CPUState, tsptr));
3308 3199 tcg_gen_st_i32(cpu_T[0], r_tsptr,
3309 3200 offsetof(trap_state, tt));
  3201 + tcg_gen_discard_ptr(r_tsptr);
3310 3202 }
3311 3203 break;
3312 3204 case 4: // tick
... ... @@ -3318,6 +3210,7 @@ static void disas_sparc_insn(DisasContext * dc)
3318 3210 offsetof(CPUState, tick));
3319 3211 tcg_gen_helper_0_2(helper_tick_set_count,
3320 3212 r_tickptr, cpu_T[0]);
  3213 + tcg_gen_discard_ptr(r_tickptr);
3321 3214 }
3322 3215 break;
3323 3216 case 5: // tba
... ... @@ -3410,6 +3303,7 @@ static void disas_sparc_insn(DisasContext * dc)
3410 3303 offsetof(CPUState, hstick));
3411 3304 tcg_gen_helper_0_2(helper_tick_set_limit,
3412 3305 r_tickptr, cpu_T[0]);
  3306 + tcg_gen_discard_ptr(r_tickptr);
3413 3307 }
3414 3308 break;
3415 3309 case 6: // hver readonly
... ... @@ -3453,6 +3347,7 @@ static void disas_sparc_insn(DisasContext * dc)
3453 3347 }
3454 3348 gen_movl_T1_reg(rd);
3455 3349 gen_set_label(l1);
  3350 + tcg_gen_discard_tl(r_cond);
3456 3351 break;
3457 3352 }
3458 3353 case 0x2d: /* V9 sdivx */
... ... @@ -3477,7 +3372,6 @@ static void disas_sparc_insn(DisasContext * dc)
3477 3372 case 0x2f: /* V9 movr */
3478 3373 {
3479 3374 int cond = GET_FIELD_SP(insn, 10, 12);
3480   - TCGv r_zero;
3481 3375 int l1;
3482 3376  
3483 3377 rs1 = GET_FIELD(insn, 13, 17);
... ... @@ -3485,8 +3379,8 @@ static void disas_sparc_insn(DisasContext * dc)
3485 3379  
3486 3380 l1 = gen_new_label();
3487 3381  
3488   - r_zero = tcg_const_tl(0);
3489   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0], r_zero, l1);
  3382 + tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_T[0],
  3383 + tcg_const_tl(0), l1);
3490 3384 if (IS_IMM) { /* immediate */
3491 3385 rs2 = GET_FIELD_SPs(insn, 0, 9);
3492 3386 gen_movl_simm_T1(rs2);
... ... @@ -4077,6 +3971,7 @@ static void disas_sparc_insn(DisasContext * dc)
4077 3971 gen_movl_T0_reg(rd + 1);
4078 3972 tcg_gen_shri_i64(r_dword, r_dword, 32);
4079 3973 tcg_gen_trunc_i64_i32(cpu_T[1], r_dword);
  3974 + tcg_gen_discard_i64(r_dword);
4080 3975 }
4081 3976 break;
4082 3977 case 0x9: /* load signed byte */
... ... @@ -4302,6 +4197,7 @@ static void disas_sparc_insn(DisasContext * dc)
4302 4197 tcg_gen_helper_1_2(helper_pack64, r_dword, cpu_T[1],
4303 4198 r_low);
4304 4199 tcg_gen_qemu_st64(r_dword, cpu_T[0], dc->mem_idx);
  4200 + tcg_gen_discard_i64(r_dword);
4305 4201 }
4306 4202 #else /* __i386__ */
4307 4203 gen_op_check_align_T0_7();
... ... @@ -4350,32 +4246,8 @@ static void disas_sparc_insn(DisasContext * dc)
4350 4246 if (rd & 1)
4351 4247 goto illegal_insn;
4352 4248 else {
4353   - int asi;
4354   - TCGv r_dword, r_temp, r_size;
4355   -
4356 4249 gen_op_check_align_T0_7();
4357   - r_dword = tcg_temp_new(TCG_TYPE_I64);
4358   - r_temp = tcg_temp_new(TCG_TYPE_I32);
4359   - r_size = tcg_temp_new(TCG_TYPE_I32);
4360   - gen_movl_reg_TN(rd + 1, r_temp);
4361   - tcg_gen_helper_1_2(helper_pack64, r_dword, cpu_T[1],
4362   - r_temp);
4363   -#ifdef TARGET_SPARC64
4364   - if (IS_IMM) {
4365   - int offset;
4366   -
4367   - offset = GET_FIELD(insn, 25, 31);
4368   - tcg_gen_addi_tl(cpu_T[0], cpu_T[0], offset);
4369   - tcg_gen_ld_i32(r_dword, cpu_env, offsetof(CPUSPARCState, asi));
4370   - } else {
4371   -#endif
4372   - asi = GET_FIELD(insn, 19, 26);
4373   - tcg_gen_movi_i32(r_temp, asi);
4374   -#ifdef TARGET_SPARC64
4375   - }
4376   -#endif
4377   - tcg_gen_movi_i32(r_size, 8);
4378   - tcg_gen_helper_0_4(helper_st_asi, cpu_T[0], r_dword, r_temp, r_size);
  4250 + gen_stda_asi(insn, rd);
4379 4251 }
4380 4252 break;
4381 4253 #endif
... ...