Commit 0402f767b5f11ec0efaf6abe50a11487801fc2ef
1 parent
6b3a45cc
Rework m68k cpu feature flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2865 c046a42c-6fe2-441c-8c8c-71466251a162
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4 changed files
with
176 additions
and
133 deletions
linux-user/main.c
... | ... | @@ -1974,7 +1974,7 @@ int main(int argc, char **argv) |
1974 | 1974 | #elif defined(TARGET_M68K) |
1975 | 1975 | { |
1976 | 1976 | if (cpu_model == NULL) |
1977 | - cpu_model = "cfv4e"; | |
1977 | + cpu_model = "any"; | |
1978 | 1978 | if (cpu_m68k_set_model(env, cpu_model)) { |
1979 | 1979 | cpu_abort(cpu_single_env, |
1980 | 1980 | "Unable to find m68k CPU definition\n"); | ... | ... |
target-m68k/cpu.h
... | ... | @@ -85,6 +85,8 @@ typedef struct CPUM68KState { |
85 | 85 | uint32_t mbar; |
86 | 86 | uint32_t rambar0; |
87 | 87 | |
88 | + uint32_t features; | |
89 | + | |
88 | 90 | /* ??? remove this. */ |
89 | 91 | uint32_t t1; |
90 | 92 | |
... | ... | @@ -151,6 +153,23 @@ void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector); |
151 | 153 | |
152 | 154 | void do_m68k_semihosting(CPUM68KState *env, int nr); |
153 | 155 | |
156 | +enum m68k_features { | |
157 | + M68K_FEATURE_CF_ISA_A, | |
158 | + M68K_FEATURE_CF_ISA_B, | |
159 | + M68K_FEATURE_CF_ISA_C, | |
160 | + M68K_FEATURE_CF_FPU, | |
161 | + M68K_FEATURE_CF_MAC, | |
162 | + M68K_FEATURE_CF_EMAC, | |
163 | + M68K_FEATURE_EXT_FULL /* 68020+ full extension word. */ | |
164 | +}; | |
165 | + | |
166 | +static inline int m68k_feature(CPUM68KState *env, int feature) | |
167 | +{ | |
168 | + return (env->features & (1u << feature)) != 0; | |
169 | +} | |
170 | + | |
171 | +void register_m68k_insns (CPUM68KState *env); | |
172 | + | |
154 | 173 | #ifdef CONFIG_USER_ONLY |
155 | 174 | /* Linux uses 8k pages. */ |
156 | 175 | #define TARGET_PAGE_BITS 13 | ... | ... |
target-m68k/helper.c
... | ... | @@ -20,11 +20,74 @@ |
20 | 20 | */ |
21 | 21 | |
22 | 22 | #include <stdio.h> |
23 | +#include <string.h> | |
23 | 24 | |
24 | 25 | #include "config.h" |
25 | 26 | #include "cpu.h" |
26 | 27 | #include "exec-all.h" |
27 | 28 | |
29 | +enum m68k_cpuid { | |
30 | + M68K_CPUID_M5206, | |
31 | + M68K_CPUID_CFV4E, | |
32 | + M68K_CPUID_ANY, | |
33 | +}; | |
34 | + | |
35 | +struct m68k_def_t { | |
36 | + const char * name; | |
37 | + enum m68k_cpuid id; | |
38 | +}; | |
39 | + | |
40 | +static m68k_def_t m68k_cpu_defs[] = { | |
41 | + {"m5206", M68K_CPUID_M5206}, | |
42 | + {"cfv4e", M68K_CPUID_CFV4E}, | |
43 | + {"any", M68K_CPUID_ANY}, | |
44 | + {NULL, 0}, | |
45 | +}; | |
46 | + | |
47 | +static void m68k_set_feature(CPUM68KState *env, int feature) | |
48 | +{ | |
49 | + env->features |= (1u << feature); | |
50 | +} | |
51 | + | |
52 | +int cpu_m68k_set_model(CPUM68KState *env, const char * name) | |
53 | +{ | |
54 | + m68k_def_t *def; | |
55 | + | |
56 | + for (def = m68k_cpu_defs; def->name; def++) { | |
57 | + if (strcmp(def->name, name) == 0) | |
58 | + break; | |
59 | + } | |
60 | + if (!def->name) | |
61 | + return 1; | |
62 | + | |
63 | + switch (def->id) { | |
64 | + case M68K_CPUID_M5206: | |
65 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
66 | + break; | |
67 | + case M68K_CPUID_CFV4E: | |
68 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
69 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
70 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_C); | |
71 | + m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
72 | + m68k_set_feature(env, M68K_FEATURE_CF_MAC); | |
73 | + m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
74 | + break; | |
75 | + case M68K_CPUID_ANY: | |
76 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
77 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
78 | + m68k_set_feature(env, M68K_FEATURE_CF_ISA_C); | |
79 | + m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
80 | + m68k_set_feature(env, M68K_FEATURE_CF_MAC); | |
81 | + m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
82 | + m68k_set_feature(env, M68K_FEATURE_EXT_FULL); | |
83 | + break; | |
84 | + } | |
85 | + | |
86 | + register_m68k_insns(env); | |
87 | + | |
88 | + return 0; | |
89 | +} | |
90 | + | |
28 | 91 | void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) |
29 | 92 | { |
30 | 93 | int flags; | ... | ... |
target-m68k/translate.c
... | ... | @@ -108,25 +108,6 @@ enum { |
108 | 108 | #define AREG(insn, pos) (((insn >> pos) & 7) + QREG_A0) |
109 | 109 | #define FREG(insn, pos) (((insn >> pos) & 7) + QREG_F0) |
110 | 110 | |
111 | -#define M68K_INSN_CF_A (1 << 0) | |
112 | -#define M68K_INSN_CF_B (1 << 1) | |
113 | -#define M68K_INSN_CF_C (1 << 2) | |
114 | -#define M68K_INSN_CF_MAC (1 << 3) | |
115 | -#define M68K_INSN_CF_EMAC (1 << 4) | |
116 | -#define M68K_INSN_CF_FPU (1 << 5) | |
117 | - | |
118 | -struct m68k_def_t { | |
119 | - const char * name; | |
120 | - uint32_t insns; | |
121 | -}; | |
122 | - | |
123 | -static m68k_def_t m68k_cpu_defs[] = { | |
124 | - {"m5206", M68K_INSN_CF_A}, | |
125 | - {"cfv4e", M68K_INSN_CF_A | M68K_INSN_CF_B | M68K_INSN_CF_C | |
126 | - | M68K_INSN_CF_MAC | M68K_INSN_CF_EMAC | M68K_INSN_CF_FPU}, | |
127 | - {NULL, 0}, | |
128 | -}; | |
129 | - | |
130 | 111 | typedef void (*disas_proc)(DisasContext *, uint16_t); |
131 | 112 | |
132 | 113 | #ifdef DEBUG_DISPATCH |
... | ... | @@ -2348,109 +2329,105 @@ register_opcode (disas_proc proc, uint16_t opcode, uint16_t mask) |
2348 | 2329 | |
2349 | 2330 | /* Register m68k opcode handlers. Order is important. |
2350 | 2331 | Later insn override earlier ones. */ |
2351 | -static void | |
2352 | -register_m68k_insns (m68k_def_t *def) | |
2332 | +void register_m68k_insns (CPUM68KState *env) | |
2353 | 2333 | { |
2354 | - uint32_t iflags; | |
2355 | - | |
2356 | - iflags = def->insns; | |
2357 | -#define INSN(name, opcode, mask, isa) \ | |
2358 | - if (iflags & M68K_INSN_##isa) \ | |
2334 | +#define INSN(name, opcode, mask, feature) \ | |
2335 | + if (m68k_feature(env, M68K_FEATURE_##feature)) \ | |
2359 | 2336 | register_opcode(disas_##name, 0x##opcode, 0x##mask) |
2360 | - INSN(undef, 0000, 0000, CF_A); | |
2361 | - INSN(arith_im, 0080, fff8, CF_A); | |
2362 | - INSN(bitrev, 00c0, fff8, CF_C); | |
2363 | - INSN(bitop_reg, 0100, f1c0, CF_A); | |
2364 | - INSN(bitop_reg, 0140, f1c0, CF_A); | |
2365 | - INSN(bitop_reg, 0180, f1c0, CF_A); | |
2366 | - INSN(bitop_reg, 01c0, f1c0, CF_A); | |
2367 | - INSN(arith_im, 0280, fff8, CF_A); | |
2368 | - INSN(byterev, 02c0, fff8, CF_A); | |
2369 | - INSN(arith_im, 0480, fff8, CF_A); | |
2370 | - INSN(ff1, 04c0, fff8, CF_C); | |
2371 | - INSN(arith_im, 0680, fff8, CF_A); | |
2372 | - INSN(bitop_im, 0800, ffc0, CF_A); | |
2373 | - INSN(bitop_im, 0840, ffc0, CF_A); | |
2374 | - INSN(bitop_im, 0880, ffc0, CF_A); | |
2375 | - INSN(bitop_im, 08c0, ffc0, CF_A); | |
2376 | - INSN(arith_im, 0a80, fff8, CF_A); | |
2377 | - INSN(arith_im, 0c00, ff38, CF_A); | |
2378 | - INSN(move, 1000, f000, CF_A); | |
2379 | - INSN(move, 2000, f000, CF_A); | |
2380 | - INSN(move, 3000, f000, CF_A); | |
2381 | - INSN(strldsr, 40e7, ffff, CF_A); | |
2382 | - INSN(negx, 4080, fff8, CF_A); | |
2383 | - INSN(move_from_sr, 40c0, fff8, CF_A); | |
2384 | - INSN(lea, 41c0, f1c0, CF_A); | |
2385 | - INSN(clr, 4200, ff00, CF_A); | |
2386 | - INSN(undef, 42c0, ffc0, CF_A); | |
2387 | - INSN(move_from_ccr, 42c0, fff8, CF_A); | |
2388 | - INSN(neg, 4480, fff8, CF_A); | |
2389 | - INSN(move_to_ccr, 44c0, ffc0, CF_A); | |
2390 | - INSN(not, 4680, fff8, CF_A); | |
2391 | - INSN(move_to_sr, 46c0, ffc0, CF_A); | |
2392 | - INSN(pea, 4840, ffc0, CF_A); | |
2393 | - INSN(swap, 4840, fff8, CF_A); | |
2394 | - INSN(movem, 48c0, fbc0, CF_A); | |
2395 | - INSN(ext, 4880, fff8, CF_A); | |
2396 | - INSN(ext, 48c0, fff8, CF_A); | |
2397 | - INSN(ext, 49c0, fff8, CF_A); | |
2398 | - INSN(tst, 4a00, ff00, CF_A); | |
2399 | - INSN(tas, 4ac0, ffc0, CF_B); | |
2400 | - INSN(halt, 4ac8, ffff, CF_A); | |
2401 | - INSN(pulse, 4acc, ffff, CF_A); | |
2402 | - INSN(illegal, 4afc, ffff, CF_A); | |
2403 | - INSN(mull, 4c00, ffc0, CF_A); | |
2404 | - INSN(divl, 4c40, ffc0, CF_A); | |
2405 | - INSN(sats, 4c80, fff8, CF_B); | |
2406 | - INSN(trap, 4e40, fff0, CF_A); | |
2407 | - INSN(link, 4e50, fff8, CF_A); | |
2408 | - INSN(unlk, 4e58, fff8, CF_A); | |
2409 | - INSN(move_to_usp, 4e60, fff8, CF_B); | |
2410 | - INSN(move_from_usp, 4e68, fff8, CF_B); | |
2411 | - INSN(nop, 4e71, ffff, CF_A); | |
2412 | - INSN(stop, 4e72, ffff, CF_A); | |
2413 | - INSN(rte, 4e73, ffff, CF_A); | |
2414 | - INSN(rts, 4e75, ffff, CF_A); | |
2415 | - INSN(movec, 4e7b, ffff, CF_A); | |
2416 | - INSN(jump, 4e80, ffc0, CF_A); | |
2417 | - INSN(jump, 4ec0, ffc0, CF_A); | |
2418 | - INSN(addsubq, 5180, f1c0, CF_A); | |
2419 | - INSN(scc, 50c0, f0f8, CF_A); | |
2420 | - INSN(addsubq, 5080, f1c0, CF_A); | |
2421 | - INSN(tpf, 51f8, fff8, CF_A); | |
2422 | - INSN(branch, 6000, f000, CF_A); | |
2423 | - INSN(moveq, 7000, f100, CF_A); | |
2424 | - INSN(mvzs, 7100, f100, CF_B); | |
2425 | - INSN(or, 8000, f000, CF_A); | |
2426 | - INSN(divw, 80c0, f0c0, CF_A); | |
2427 | - INSN(addsub, 9000, f000, CF_A); | |
2428 | - INSN(subx, 9180, f1f8, CF_A); | |
2429 | - INSN(suba, 91c0, f1c0, CF_A); | |
2430 | - INSN(undef_mac, a000, f000, CF_A); | |
2431 | - INSN(mov3q, a140, f1c0, CF_B); | |
2432 | - INSN(cmp, b000, f1c0, CF_B); /* cmp.b */ | |
2433 | - INSN(cmp, b040, f1c0, CF_B); /* cmp.w */ | |
2434 | - INSN(cmpa, b0c0, f1c0, CF_B); /* cmpa.w */ | |
2435 | - INSN(cmp, b080, f1c0, CF_A); | |
2436 | - INSN(cmpa, b1c0, f1c0, CF_A); | |
2437 | - INSN(eor, b180, f1c0, CF_A); | |
2438 | - INSN(and, c000, f000, CF_A); | |
2439 | - INSN(mulw, c0c0, f0c0, CF_A); | |
2440 | - INSN(addsub, d000, f000, CF_A); | |
2441 | - INSN(addx, d180, f1f8, CF_A); | |
2442 | - INSN(adda, d1c0, f1c0, CF_A); | |
2443 | - INSN(shift_im, e080, f0f0, CF_A); | |
2444 | - INSN(shift_reg, e0a0, f0f0, CF_A); | |
2445 | - INSN(undef_fpu, f000, f000, CF_A); | |
2337 | + INSN(undef, 0000, 0000, CF_ISA_A); | |
2338 | + INSN(arith_im, 0080, fff8, CF_ISA_A); | |
2339 | + INSN(bitrev, 00c0, fff8, CF_ISA_C); | |
2340 | + INSN(bitop_reg, 0100, f1c0, CF_ISA_A); | |
2341 | + INSN(bitop_reg, 0140, f1c0, CF_ISA_A); | |
2342 | + INSN(bitop_reg, 0180, f1c0, CF_ISA_A); | |
2343 | + INSN(bitop_reg, 01c0, f1c0, CF_ISA_A); | |
2344 | + INSN(arith_im, 0280, fff8, CF_ISA_A); | |
2345 | + INSN(byterev, 02c0, fff8, CF_ISA_A); | |
2346 | + INSN(arith_im, 0480, fff8, CF_ISA_A); | |
2347 | + INSN(ff1, 04c0, fff8, CF_ISA_C); | |
2348 | + INSN(arith_im, 0680, fff8, CF_ISA_A); | |
2349 | + INSN(bitop_im, 0800, ffc0, CF_ISA_A); | |
2350 | + INSN(bitop_im, 0840, ffc0, CF_ISA_A); | |
2351 | + INSN(bitop_im, 0880, ffc0, CF_ISA_A); | |
2352 | + INSN(bitop_im, 08c0, ffc0, CF_ISA_A); | |
2353 | + INSN(arith_im, 0a80, fff8, CF_ISA_A); | |
2354 | + INSN(arith_im, 0c00, ff38, CF_ISA_A); | |
2355 | + INSN(move, 1000, f000, CF_ISA_A); | |
2356 | + INSN(move, 2000, f000, CF_ISA_A); | |
2357 | + INSN(move, 3000, f000, CF_ISA_A); | |
2358 | + INSN(strldsr, 40e7, ffff, CF_ISA_A); | |
2359 | + INSN(negx, 4080, fff8, CF_ISA_A); | |
2360 | + INSN(move_from_sr, 40c0, fff8, CF_ISA_A); | |
2361 | + INSN(lea, 41c0, f1c0, CF_ISA_A); | |
2362 | + INSN(clr, 4200, ff00, CF_ISA_A); | |
2363 | + INSN(undef, 42c0, ffc0, CF_ISA_A); | |
2364 | + INSN(move_from_ccr, 42c0, fff8, CF_ISA_A); | |
2365 | + INSN(neg, 4480, fff8, CF_ISA_A); | |
2366 | + INSN(move_to_ccr, 44c0, ffc0, CF_ISA_A); | |
2367 | + INSN(not, 4680, fff8, CF_ISA_A); | |
2368 | + INSN(move_to_sr, 46c0, ffc0, CF_ISA_A); | |
2369 | + INSN(pea, 4840, ffc0, CF_ISA_A); | |
2370 | + INSN(swap, 4840, fff8, CF_ISA_A); | |
2371 | + INSN(movem, 48c0, fbc0, CF_ISA_A); | |
2372 | + INSN(ext, 4880, fff8, CF_ISA_A); | |
2373 | + INSN(ext, 48c0, fff8, CF_ISA_A); | |
2374 | + INSN(ext, 49c0, fff8, CF_ISA_A); | |
2375 | + INSN(tst, 4a00, ff00, CF_ISA_A); | |
2376 | + INSN(tas, 4ac0, ffc0, CF_ISA_B); | |
2377 | + INSN(halt, 4ac8, ffff, CF_ISA_A); | |
2378 | + INSN(pulse, 4acc, ffff, CF_ISA_A); | |
2379 | + INSN(illegal, 4afc, ffff, CF_ISA_A); | |
2380 | + INSN(mull, 4c00, ffc0, CF_ISA_A); | |
2381 | + INSN(divl, 4c40, ffc0, CF_ISA_A); | |
2382 | + INSN(sats, 4c80, fff8, CF_ISA_B); | |
2383 | + INSN(trap, 4e40, fff0, CF_ISA_A); | |
2384 | + INSN(link, 4e50, fff8, CF_ISA_A); | |
2385 | + INSN(unlk, 4e58, fff8, CF_ISA_A); | |
2386 | + INSN(move_to_usp, 4e60, fff8, CF_ISA_B); | |
2387 | + INSN(move_from_usp, 4e68, fff8, CF_ISA_B); | |
2388 | + INSN(nop, 4e71, ffff, CF_ISA_A); | |
2389 | + INSN(stop, 4e72, ffff, CF_ISA_A); | |
2390 | + INSN(rte, 4e73, ffff, CF_ISA_A); | |
2391 | + INSN(rts, 4e75, ffff, CF_ISA_A); | |
2392 | + INSN(movec, 4e7b, ffff, CF_ISA_A); | |
2393 | + INSN(jump, 4e80, ffc0, CF_ISA_A); | |
2394 | + INSN(jump, 4ec0, ffc0, CF_ISA_A); | |
2395 | + INSN(addsubq, 5180, f1c0, CF_ISA_A); | |
2396 | + INSN(scc, 50c0, f0f8, CF_ISA_A); | |
2397 | + INSN(addsubq, 5080, f1c0, CF_ISA_A); | |
2398 | + INSN(tpf, 51f8, fff8, CF_ISA_A); | |
2399 | + INSN(branch, 6000, f000, CF_ISA_A); | |
2400 | + INSN(moveq, 7000, f100, CF_ISA_A); | |
2401 | + INSN(mvzs, 7100, f100, CF_ISA_B); | |
2402 | + INSN(or, 8000, f000, CF_ISA_A); | |
2403 | + INSN(divw, 80c0, f0c0, CF_ISA_A); | |
2404 | + INSN(addsub, 9000, f000, CF_ISA_A); | |
2405 | + INSN(subx, 9180, f1f8, CF_ISA_A); | |
2406 | + INSN(suba, 91c0, f1c0, CF_ISA_A); | |
2407 | + INSN(undef_mac, a000, f000, CF_ISA_A); | |
2408 | + INSN(mov3q, a140, f1c0, CF_ISA_B); | |
2409 | + INSN(cmp, b000, f1c0, CF_ISA_B); /* cmp.b */ | |
2410 | + INSN(cmp, b040, f1c0, CF_ISA_B); /* cmp.w */ | |
2411 | + INSN(cmpa, b0c0, f1c0, CF_ISA_B); /* cmpa.w */ | |
2412 | + INSN(cmp, b080, f1c0, CF_ISA_A); | |
2413 | + INSN(cmpa, b1c0, f1c0, CF_ISA_A); | |
2414 | + INSN(eor, b180, f1c0, CF_ISA_A); | |
2415 | + INSN(and, c000, f000, CF_ISA_A); | |
2416 | + INSN(mulw, c0c0, f0c0, CF_ISA_A); | |
2417 | + INSN(addsub, d000, f000, CF_ISA_A); | |
2418 | + INSN(addx, d180, f1f8, CF_ISA_A); | |
2419 | + INSN(adda, d1c0, f1c0, CF_ISA_A); | |
2420 | + INSN(shift_im, e080, f0f0, CF_ISA_A); | |
2421 | + INSN(shift_reg, e0a0, f0f0, CF_ISA_A); | |
2422 | + INSN(undef_fpu, f000, f000, CF_ISA_A); | |
2446 | 2423 | INSN(fpu, f200, ffc0, CF_FPU); |
2447 | 2424 | INSN(fbcc, f280, ffc0, CF_FPU); |
2448 | 2425 | INSN(frestore, f340, ffc0, CF_FPU); |
2449 | 2426 | INSN(fsave, f340, ffc0, CF_FPU); |
2450 | - INSN(intouch, f340, ffc0, CF_A); | |
2451 | - INSN(cpushl, f428, ff38, CF_A); | |
2452 | - INSN(wddata, fb00, ff00, CF_A); | |
2453 | - INSN(wdebug, fbc0, ffc0, CF_A); | |
2427 | + INSN(intouch, f340, ffc0, CF_ISA_A); | |
2428 | + INSN(cpushl, f428, ff38, CF_ISA_A); | |
2429 | + INSN(wddata, fb00, ff00, CF_ISA_A); | |
2430 | + INSN(wdebug, fbc0, ffc0, CF_ISA_A); | |
2454 | 2431 | #undef INSN |
2455 | 2432 | } |
2456 | 2433 | |
... | ... | @@ -2880,22 +2857,6 @@ void cpu_m68k_close(CPUM68KState *env) |
2880 | 2857 | free(env); |
2881 | 2858 | } |
2882 | 2859 | |
2883 | -int cpu_m68k_set_model(CPUM68KState *env, const char * name) | |
2884 | -{ | |
2885 | - m68k_def_t *def; | |
2886 | - | |
2887 | - for (def = m68k_cpu_defs; def->name; def++) { | |
2888 | - if (strcmp(def->name, name) == 0) | |
2889 | - break; | |
2890 | - } | |
2891 | - if (!def->name) | |
2892 | - return 1; | |
2893 | - | |
2894 | - register_m68k_insns(def); | |
2895 | - | |
2896 | - return 0; | |
2897 | -} | |
2898 | - | |
2899 | 2860 | void cpu_dump_state(CPUState *env, FILE *f, |
2900 | 2861 | int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
2901 | 2862 | int flags) | ... | ... |