Commit 0387d928754f08574a18ff72104d669d91dcc2f8
1 parent
fe33cc71
Fix Sparc64 ldfa/stfa and float ops with fpr >= 32
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162
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3 additions
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3 deletions
target-sparc/translate.c
... | ... | @@ -87,7 +87,7 @@ enum { |
87 | 87 | #define GET_FIELD_SPs(x,a,b) sign_extend (GET_FIELD_SP(x,a,b), ((b) - (a) + 1)) |
88 | 88 | |
89 | 89 | #ifdef TARGET_SPARC64 |
90 | -#define DFPREG(r) (((r & 1) << 6) | (r & 0x1e)) | |
90 | +#define DFPREG(r) (((r & 1) << 5) | (r & 0x1e)) | |
91 | 91 | #else |
92 | 92 | #define DFPREG(r) (r & 0x1e) |
93 | 93 | #endif |
... | ... | @@ -431,7 +431,7 @@ static inline void gen_ldf_asi(int insn, int size) |
431 | 431 | { |
432 | 432 | int asi, offset, rd; |
433 | 433 | |
434 | - rd = GET_FIELD(insn, 2, 6); | |
434 | + rd = DFPREG(GET_FIELD(insn, 2, 6)); | |
435 | 435 | if (IS_IMM) { |
436 | 436 | offset = GET_FIELD(insn, 25, 31); |
437 | 437 | gen_op_ldf_asi_reg(offset, size, rd); |
... | ... | @@ -445,7 +445,7 @@ static inline void gen_stf_asi(int insn, int size) |
445 | 445 | { |
446 | 446 | int asi, offset, rd; |
447 | 447 | |
448 | - rd = GET_FIELD(insn, 2, 6); | |
448 | + rd = DFPREG(GET_FIELD(insn, 2, 6)); | |
449 | 449 | if (IS_IMM) { |
450 | 450 | offset = GET_FIELD(insn, 25, 31); |
451 | 451 | gen_op_stf_asi_reg(offset, size, rd); | ... | ... |