gwj / at91sam9263 · Commits

Commit 035feb8857d410c3e066f13d8f7bcf8e836e6972

Authored by j_mayer
1 parent 6f5d427d

Share more SPR instanciations between all PowerPC 401 incarnations. 

Add comments about some unimplemented storage control dedicated SPRs.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3301 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 18 additions and 34 deletions
target-ppc/translate_init.c
  View file @035feb8
... ... @@ -1720,12 +1720,12 @@ static void gen_spr_440 (CPUPPCState *env)
1720 1720 static void gen_spr_40x (CPUPPCState *env)
1721 1721 {
1722 1722 /* Cache */
1723   - /* XXX : not implemented */
  1723 + /* not emulated, as Qemu do not emulate caches */
1724 1724 spr_register(env, SPR_40x_DCCR, "DCCR",
1725 1725 SPR_NOACCESS, SPR_NOACCESS,
1726 1726 &spr_read_generic, &spr_write_generic,
1727 1727 0x00000000);
1728   - /* XXX : not implemented */
  1728 + /* not emulated, as Qemu do not emulate caches */
1729 1729 spr_register(env, SPR_40x_ICCR, "ICCR",
1730 1730 SPR_NOACCESS, SPR_NOACCESS,
1731 1731 &spr_read_generic, &spr_write_generic,
... ... @@ -1839,6 +1839,7 @@ static void gen_spr_405 (CPUPPCState *env)
1839 1839 &spr_read_generic, &spr_write_generic,
1840 1840 0x00000000);
1841 1841 /* Storage control */
  1842 + /* XXX: TODO: not implemented */
1842 1843 spr_register(env, SPR_405_SLER, "SLER",
1843 1844 SPR_NOACCESS, SPR_NOACCESS,
1844 1845 &spr_read_generic, &spr_write_40x_sler,
... ... @@ -1945,10 +1946,21 @@ static void gen_spr_401 (CPUPPCState *env)
1945 1946 &spr_read_generic, &spr_write_generic,
1946 1947 0x00000000);
1947 1948 /* Storage control */
  1949 + /* XXX: TODO: not implemented */
1948 1950 spr_register(env, SPR_405_SLER, "SLER",
1949 1951 SPR_NOACCESS, SPR_NOACCESS,
1950 1952 &spr_read_generic, &spr_write_40x_sler,
1951 1953 0x00000000);
  1954 + /* not emulated, as Qemu never does speculative access */
  1955 + spr_register(env, SPR_40x_SGR, "SGR",
  1956 + SPR_NOACCESS, SPR_NOACCESS,
  1957 + &spr_read_generic, &spr_write_generic,
  1958 + 0xFFFFFFFF);
  1959 + /* not emulated, as Qemu do not emulate caches */
  1960 + spr_register(env, SPR_40x_DCWR, "DCWR",
  1961 + SPR_NOACCESS, SPR_NOACCESS,
  1962 + &spr_read_generic, &spr_write_generic,
  1963 + 0x00000000);
1952 1964 }
1953 1965  
1954 1966 static void gen_spr_401x2 (CPUPPCState *env)
... ... @@ -2502,16 +2514,6 @@ static void init_proc_401 (CPUPPCState *env)
2502 2514 gen_spr_40x(env);
2503 2515 gen_spr_401_403(env);
2504 2516 gen_spr_401(env);
2505   - /* Bus access control */
2506   - spr_register(env, SPR_40x_SGR, "SGR",
2507   - SPR_NOACCESS, SPR_NOACCESS,
2508   - &spr_read_generic, &spr_write_generic,
2509   - 0xFFFFFFFF);
2510   - /* XXX : not implemented */
2511   - spr_register(env, SPR_40x_DCWR, "DCWR",
2512   - SPR_NOACCESS, SPR_NOACCESS,
2513   - &spr_read_generic, &spr_write_generic,
2514   - 0x00000000);
2515 2517 init_excp_4xx_real(env);
2516 2518 /* Allocate hardware IRQ controller */
2517 2519 ppc40x_irq_init(env);
... ... @@ -2535,16 +2537,6 @@ static void init_proc_401x2 (CPUPPCState *env)
2535 2537 gen_spr_401_403(env);
2536 2538 gen_spr_401x2(env);
2537 2539 gen_spr_compress(env);
2538   - /* Bus access control */
2539   - spr_register(env, SPR_40x_SGR, "SGR",
2540   - SPR_NOACCESS, SPR_NOACCESS,
2541   - &spr_read_generic, &spr_write_generic,
2542   - 0xFFFFFFFF);
2543   - /* XXX : not implemented */
2544   - spr_register(env, SPR_40x_DCWR, "DCWR",
2545   - SPR_NOACCESS, SPR_NOACCESS,
2546   - &spr_read_generic, &spr_write_generic,
2547   - 0x00000000);
2548 2540 /* Memory management */
2549 2541 env->nb_tlb = 64;
2550 2542 env->nb_ways = 1;
... ... @@ -2598,16 +2590,6 @@ static void init_proc_IOP480 (CPUPPCState *env)
2598 2590 gen_spr_401_403(env);
2599 2591 gen_spr_401x2(env);
2600 2592 gen_spr_compress(env);
2601   - /* Bus access control */
2602   - spr_register(env, SPR_40x_SGR, "SGR",
2603   - SPR_NOACCESS, SPR_NOACCESS,
2604   - &spr_read_generic, &spr_write_generic,
2605   - 0xFFFFFFFF);
2606   - /* XXX : not implemented */
2607   - spr_register(env, SPR_40x_DCWR, "DCWR",
2608   - SPR_NOACCESS, SPR_NOACCESS,
2609   - &spr_read_generic, &spr_write_generic,
2610   - 0x00000000);
2611 2593 /* Memory management */
2612 2594 env->nb_tlb = 64;
2613 2595 env->nb_ways = 1;
... ... @@ -2658,11 +2640,12 @@ static void init_proc_403GCX (CPUPPCState *env)
2658 2640 gen_spr_403_real(env);
2659 2641 gen_spr_403_mmu(env);
2660 2642 /* Bus access control */
  2643 + /* not emulated, as Qemu never does speculative access */
2661 2644 spr_register(env, SPR_40x_SGR, "SGR",
2662 2645 SPR_NOACCESS, SPR_NOACCESS,
2663 2646 &spr_read_generic, &spr_write_generic,
2664 2647 0xFFFFFFFF);
2665   - /* XXX : not implemented */
  2648 + /* not emulated, as Qemu do not emulate caches */
2666 2649 spr_register(env, SPR_40x_DCWR, "DCWR",
2667 2650 SPR_NOACCESS, SPR_NOACCESS,
2668 2651 &spr_read_generic, &spr_write_generic,
... ... @@ -2695,11 +2678,12 @@ static void init_proc_405 (CPUPPCState *env)
2695 2678 gen_spr_40x(env);
2696 2679 gen_spr_405(env);
2697 2680 /* Bus access control */
  2681 + /* not emulated, as Qemu never does speculative access */
2698 2682 spr_register(env, SPR_40x_SGR, "SGR",
2699 2683 SPR_NOACCESS, SPR_NOACCESS,
2700 2684 &spr_read_generic, &spr_write_generic,
2701 2685 0xFFFFFFFF);
2702   - /* XXX : not implemented */
  2686 + /* not emulated, as Qemu do not emulate caches */
2703 2687 spr_register(env, SPR_40x_DCWR, "DCWR",
2704 2688 SPR_NOACCESS, SPR_NOACCESS,
2705 2689 &spr_read_generic, &spr_write_generic,
... ...