Commit 00f82b8a3166514f634c1c010c3b6175bcc6403b
1 parent
c1d00dc0
Use correct types to enable > 2G support, based on a patch from
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
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38 changed files
with
177 additions
and
102 deletions
cpu-all.h
| @@ -806,12 +806,20 @@ int cpu_inw(CPUState *env, int addr); | @@ -806,12 +806,20 @@ int cpu_inw(CPUState *env, int addr); | ||
| 806 | int cpu_inl(CPUState *env, int addr); | 806 | int cpu_inl(CPUState *env, int addr); |
| 807 | #endif | 807 | #endif |
| 808 | 808 | ||
| 809 | +/* address in the RAM (different from a physical address) */ | ||
| 810 | +#ifdef USE_KQEMU | ||
| 811 | +typedef uint32_t ram_addr_t; | ||
| 812 | +#else | ||
| 813 | +typedef unsigned long ram_addr_t; | ||
| 814 | +#endif | ||
| 815 | + | ||
| 809 | /* memory API */ | 816 | /* memory API */ |
| 810 | 817 | ||
| 811 | -extern int phys_ram_size; | 818 | +extern ram_addr_t phys_ram_size; |
| 812 | extern int phys_ram_fd; | 819 | extern int phys_ram_fd; |
| 813 | extern uint8_t *phys_ram_base; | 820 | extern uint8_t *phys_ram_base; |
| 814 | extern uint8_t *phys_ram_dirty; | 821 | extern uint8_t *phys_ram_dirty; |
| 822 | +extern ram_addr_t ram_size; | ||
| 815 | 823 | ||
| 816 | /* physical memory access */ | 824 | /* physical memory access */ |
| 817 | #define TLB_INVALID_MASK (1 << 3) | 825 | #define TLB_INVALID_MASK (1 << 3) |
| @@ -833,10 +841,10 @@ typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t | @@ -833,10 +841,10 @@ typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t | ||
| 833 | typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); | 841 | typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); |
| 834 | 842 | ||
| 835 | void cpu_register_physical_memory(target_phys_addr_t start_addr, | 843 | void cpu_register_physical_memory(target_phys_addr_t start_addr, |
| 836 | - unsigned long size, | ||
| 837 | - unsigned long phys_offset); | ||
| 838 | -uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr); | ||
| 839 | -ram_addr_t qemu_ram_alloc(unsigned int size); | 844 | + ram_addr_t size, |
| 845 | + ram_addr_t phys_offset); | ||
| 846 | +ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); | ||
| 847 | +ram_addr_t qemu_ram_alloc(ram_addr_t); | ||
| 840 | void qemu_ram_free(ram_addr_t addr); | 848 | void qemu_ram_free(ram_addr_t addr); |
| 841 | int cpu_register_io_memory(int io_index, | 849 | int cpu_register_io_memory(int io_index, |
| 842 | CPUReadMemoryFunc **mem_read, | 850 | CPUReadMemoryFunc **mem_read, |
cpu-defs.h
| @@ -76,9 +76,6 @@ typedef uint64_t target_phys_addr_t; | @@ -76,9 +76,6 @@ typedef uint64_t target_phys_addr_t; | ||
| 76 | #error TARGET_PHYS_ADDR_BITS undefined | 76 | #error TARGET_PHYS_ADDR_BITS undefined |
| 77 | #endif | 77 | #endif |
| 78 | 78 | ||
| 79 | -/* address in the RAM (different from a physical address) */ | ||
| 80 | -typedef unsigned long ram_addr_t; | ||
| 81 | - | ||
| 82 | #define HOST_LONG_SIZE (HOST_LONG_BITS / 8) | 79 | #define HOST_LONG_SIZE (HOST_LONG_BITS / 8) |
| 83 | 80 | ||
| 84 | #define EXCP_INTERRUPT 0x10000 /* async interruption */ | 81 | #define EXCP_INTERRUPT 0x10000 /* async interruption */ |
exec-all.h
| @@ -82,7 +82,7 @@ int cpu_restore_state_copy(struct TranslationBlock *tb, | @@ -82,7 +82,7 @@ int cpu_restore_state_copy(struct TranslationBlock *tb, | ||
| 82 | void cpu_resume_from_signal(CPUState *env1, void *puc); | 82 | void cpu_resume_from_signal(CPUState *env1, void *puc); |
| 83 | void cpu_exec_init(CPUState *env); | 83 | void cpu_exec_init(CPUState *env); |
| 84 | int page_unprotect(target_ulong address, unsigned long pc, void *puc); | 84 | int page_unprotect(target_ulong address, unsigned long pc, void *puc); |
| 85 | -void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, | 85 | +void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end, |
| 86 | int is_cpu_write_access); | 86 | int is_cpu_write_access); |
| 87 | void tb_invalidate_page_range(target_ulong start, target_ulong end); | 87 | void tb_invalidate_page_range(target_ulong start, target_ulong end); |
| 88 | void tlb_flush_page(CPUState *env, target_ulong addr); | 88 | void tlb_flush_page(CPUState *env, target_ulong addr); |
exec.c
| @@ -74,6 +74,10 @@ | @@ -74,6 +74,10 @@ | ||
| 74 | #define TARGET_VIRT_ADDR_SPACE_BITS 42 | 74 | #define TARGET_VIRT_ADDR_SPACE_BITS 42 |
| 75 | #elif defined(TARGET_PPC64) | 75 | #elif defined(TARGET_PPC64) |
| 76 | #define TARGET_PHYS_ADDR_SPACE_BITS 42 | 76 | #define TARGET_PHYS_ADDR_SPACE_BITS 42 |
| 77 | +#elif defined(TARGET_X86_64) && !defined(USE_KQEMU) | ||
| 78 | +#define TARGET_PHYS_ADDR_SPACE_BITS 42 | ||
| 79 | +#elif defined(TARGET_I386) && !defined(USE_KQEMU) | ||
| 80 | +#define TARGET_PHYS_ADDR_SPACE_BITS 36 | ||
| 77 | #else | 81 | #else |
| 78 | /* Note: for compatibility with kqemu, we use 32 bits for x86_64 */ | 82 | /* Note: for compatibility with kqemu, we use 32 bits for x86_64 */ |
| 79 | #define TARGET_PHYS_ADDR_SPACE_BITS 32 | 83 | #define TARGET_PHYS_ADDR_SPACE_BITS 32 |
| @@ -88,7 +92,7 @@ spinlock_t tb_lock = SPIN_LOCK_UNLOCKED; | @@ -88,7 +92,7 @@ spinlock_t tb_lock = SPIN_LOCK_UNLOCKED; | ||
| 88 | uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] __attribute__((aligned (32))); | 92 | uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] __attribute__((aligned (32))); |
| 89 | uint8_t *code_gen_ptr; | 93 | uint8_t *code_gen_ptr; |
| 90 | 94 | ||
| 91 | -int phys_ram_size; | 95 | +ram_addr_t phys_ram_size; |
| 92 | int phys_ram_fd; | 96 | int phys_ram_fd; |
| 93 | uint8_t *phys_ram_base; | 97 | uint8_t *phys_ram_base; |
| 94 | uint8_t *phys_ram_dirty; | 98 | uint8_t *phys_ram_dirty; |
| @@ -113,7 +117,7 @@ typedef struct PageDesc { | @@ -113,7 +117,7 @@ typedef struct PageDesc { | ||
| 113 | 117 | ||
| 114 | typedef struct PhysPageDesc { | 118 | typedef struct PhysPageDesc { |
| 115 | /* offset in host memory of the page + io_index in the low 12 bits */ | 119 | /* offset in host memory of the page + io_index in the low 12 bits */ |
| 116 | - uint32_t phys_offset; | 120 | + ram_addr_t phys_offset; |
| 117 | } PhysPageDesc; | 121 | } PhysPageDesc; |
| 118 | 122 | ||
| 119 | #define L2_BITS 10 | 123 | #define L2_BITS 10 |
| @@ -234,7 +238,7 @@ static void page_init(void) | @@ -234,7 +238,7 @@ static void page_init(void) | ||
| 234 | #endif | 238 | #endif |
| 235 | } | 239 | } |
| 236 | 240 | ||
| 237 | -static inline PageDesc *page_find_alloc(unsigned int index) | 241 | +static inline PageDesc *page_find_alloc(target_ulong index) |
| 238 | { | 242 | { |
| 239 | PageDesc **lp, *p; | 243 | PageDesc **lp, *p; |
| 240 | 244 | ||
| @@ -249,7 +253,7 @@ static inline PageDesc *page_find_alloc(unsigned int index) | @@ -249,7 +253,7 @@ static inline PageDesc *page_find_alloc(unsigned int index) | ||
| 249 | return p + (index & (L2_SIZE - 1)); | 253 | return p + (index & (L2_SIZE - 1)); |
| 250 | } | 254 | } |
| 251 | 255 | ||
| 252 | -static inline PageDesc *page_find(unsigned int index) | 256 | +static inline PageDesc *page_find(target_ulong index) |
| 253 | { | 257 | { |
| 254 | PageDesc *p; | 258 | PageDesc *p; |
| 255 | 259 | ||
| @@ -511,12 +515,12 @@ static inline void tb_reset_jump(TranslationBlock *tb, int n) | @@ -511,12 +515,12 @@ static inline void tb_reset_jump(TranslationBlock *tb, int n) | ||
| 511 | tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n])); | 515 | tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n])); |
| 512 | } | 516 | } |
| 513 | 517 | ||
| 514 | -static inline void tb_phys_invalidate(TranslationBlock *tb, unsigned int page_addr) | 518 | +static inline void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr) |
| 515 | { | 519 | { |
| 516 | CPUState *env; | 520 | CPUState *env; |
| 517 | PageDesc *p; | 521 | PageDesc *p; |
| 518 | unsigned int h, n1; | 522 | unsigned int h, n1; |
| 519 | - target_ulong phys_pc; | 523 | + target_phys_addr_t phys_pc; |
| 520 | TranslationBlock *tb1, *tb2; | 524 | TranslationBlock *tb1, *tb2; |
| 521 | 525 | ||
| 522 | /* remove the TB from the hash list */ | 526 | /* remove the TB from the hash list */ |
| @@ -667,7 +671,7 @@ static void tb_gen_code(CPUState *env, | @@ -667,7 +671,7 @@ static void tb_gen_code(CPUState *env, | ||
| 667 | the same physical page. 'is_cpu_write_access' should be true if called | 671 | the same physical page. 'is_cpu_write_access' should be true if called |
| 668 | from a real cpu write access: the virtual CPU will exit the current | 672 | from a real cpu write access: the virtual CPU will exit the current |
| 669 | TB if code is modified inside this TB. */ | 673 | TB if code is modified inside this TB. */ |
| 670 | -void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, | 674 | +void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end, |
| 671 | int is_cpu_write_access) | 675 | int is_cpu_write_access) |
| 672 | { | 676 | { |
| 673 | int n, current_tb_modified, current_tb_not_found, current_flags; | 677 | int n, current_tb_modified, current_tb_not_found, current_flags; |
| @@ -780,7 +784,7 @@ void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, | @@ -780,7 +784,7 @@ void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, | ||
| 780 | } | 784 | } |
| 781 | 785 | ||
| 782 | /* len must be <= 8 and start must be a multiple of len */ | 786 | /* len must be <= 8 and start must be a multiple of len */ |
| 783 | -static inline void tb_invalidate_phys_page_fast(target_ulong start, int len) | 787 | +static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len) |
| 784 | { | 788 | { |
| 785 | PageDesc *p; | 789 | PageDesc *p; |
| 786 | int offset, b; | 790 | int offset, b; |
| @@ -809,7 +813,7 @@ static inline void tb_invalidate_phys_page_fast(target_ulong start, int len) | @@ -809,7 +813,7 @@ static inline void tb_invalidate_phys_page_fast(target_ulong start, int len) | ||
| 809 | } | 813 | } |
| 810 | 814 | ||
| 811 | #if !defined(CONFIG_SOFTMMU) | 815 | #if !defined(CONFIG_SOFTMMU) |
| 812 | -static void tb_invalidate_phys_page(target_ulong addr, | 816 | +static void tb_invalidate_phys_page(target_phys_addr_t addr, |
| 813 | unsigned long pc, void *puc) | 817 | unsigned long pc, void *puc) |
| 814 | { | 818 | { |
| 815 | int n, current_flags, current_tb_modified; | 819 | int n, current_flags, current_tb_modified; |
| @@ -1985,9 +1989,9 @@ static inline void tlb_set_dirty(CPUState *env, | @@ -1985,9 +1989,9 @@ static inline void tlb_set_dirty(CPUState *env, | ||
| 1985 | #endif /* defined(CONFIG_USER_ONLY) */ | 1989 | #endif /* defined(CONFIG_USER_ONLY) */ |
| 1986 | 1990 | ||
| 1987 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, | 1991 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
| 1988 | - int memory); | ||
| 1989 | -static void *subpage_init (target_phys_addr_t base, uint32_t *phys, | ||
| 1990 | - int orig_memory); | 1992 | + ram_addr_t memory); |
| 1993 | +static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys, | ||
| 1994 | + ram_addr_t orig_memory); | ||
| 1991 | #define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \ | 1995 | #define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \ |
| 1992 | need_subpage) \ | 1996 | need_subpage) \ |
| 1993 | do { \ | 1997 | do { \ |
| @@ -2012,13 +2016,13 @@ static void *subpage_init (target_phys_addr_t base, uint32_t *phys, | @@ -2012,13 +2016,13 @@ static void *subpage_init (target_phys_addr_t base, uint32_t *phys, | ||
| 2012 | page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an | 2016 | page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an |
| 2013 | io memory page */ | 2017 | io memory page */ |
| 2014 | void cpu_register_physical_memory(target_phys_addr_t start_addr, | 2018 | void cpu_register_physical_memory(target_phys_addr_t start_addr, |
| 2015 | - unsigned long size, | ||
| 2016 | - unsigned long phys_offset) | 2019 | + ram_addr_t size, |
| 2020 | + ram_addr_t phys_offset) | ||
| 2017 | { | 2021 | { |
| 2018 | target_phys_addr_t addr, end_addr; | 2022 | target_phys_addr_t addr, end_addr; |
| 2019 | PhysPageDesc *p; | 2023 | PhysPageDesc *p; |
| 2020 | CPUState *env; | 2024 | CPUState *env; |
| 2021 | - unsigned long orig_size = size; | 2025 | + ram_addr_t orig_size = size; |
| 2022 | void *subpage; | 2026 | void *subpage; |
| 2023 | 2027 | ||
| 2024 | size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; | 2028 | size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; |
| @@ -2026,7 +2030,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr, | @@ -2026,7 +2030,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr, | ||
| 2026 | for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) { | 2030 | for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) { |
| 2027 | p = phys_page_find(addr >> TARGET_PAGE_BITS); | 2031 | p = phys_page_find(addr >> TARGET_PAGE_BITS); |
| 2028 | if (p && p->phys_offset != IO_MEM_UNASSIGNED) { | 2032 | if (p && p->phys_offset != IO_MEM_UNASSIGNED) { |
| 2029 | - unsigned long orig_memory = p->phys_offset; | 2033 | + ram_addr_t orig_memory = p->phys_offset; |
| 2030 | target_phys_addr_t start_addr2, end_addr2; | 2034 | target_phys_addr_t start_addr2, end_addr2; |
| 2031 | int need_subpage = 0; | 2035 | int need_subpage = 0; |
| 2032 | 2036 | ||
| @@ -2079,7 +2083,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr, | @@ -2079,7 +2083,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr, | ||
| 2079 | } | 2083 | } |
| 2080 | 2084 | ||
| 2081 | /* XXX: temporary until new memory mapping API */ | 2085 | /* XXX: temporary until new memory mapping API */ |
| 2082 | -uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) | 2086 | +ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr) |
| 2083 | { | 2087 | { |
| 2084 | PhysPageDesc *p; | 2088 | PhysPageDesc *p; |
| 2085 | 2089 | ||
| @@ -2090,11 +2094,11 @@ uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) | @@ -2090,11 +2094,11 @@ uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) | ||
| 2090 | } | 2094 | } |
| 2091 | 2095 | ||
| 2092 | /* XXX: better than nothing */ | 2096 | /* XXX: better than nothing */ |
| 2093 | -ram_addr_t qemu_ram_alloc(unsigned int size) | 2097 | +ram_addr_t qemu_ram_alloc(ram_addr_t size) |
| 2094 | { | 2098 | { |
| 2095 | ram_addr_t addr; | 2099 | ram_addr_t addr; |
| 2096 | if ((phys_ram_alloc_offset + size) > phys_ram_size) { | 2100 | if ((phys_ram_alloc_offset + size) > phys_ram_size) { |
| 2097 | - fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n", | 2101 | + fprintf(stderr, "Not enough memory (requested_size = %lu, max memory = %ld)\n", |
| 2098 | size, phys_ram_size); | 2102 | size, phys_ram_size); |
| 2099 | abort(); | 2103 | abort(); |
| 2100 | } | 2104 | } |
| @@ -2408,7 +2412,7 @@ static CPUWriteMemoryFunc *subpage_write[] = { | @@ -2408,7 +2412,7 @@ static CPUWriteMemoryFunc *subpage_write[] = { | ||
| 2408 | }; | 2412 | }; |
| 2409 | 2413 | ||
| 2410 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, | 2414 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
| 2411 | - int memory) | 2415 | + ram_addr_t memory) |
| 2412 | { | 2416 | { |
| 2413 | int idx, eidx; | 2417 | int idx, eidx; |
| 2414 | unsigned int i; | 2418 | unsigned int i; |
| @@ -2438,8 +2442,8 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, | @@ -2438,8 +2442,8 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, | ||
| 2438 | return 0; | 2442 | return 0; |
| 2439 | } | 2443 | } |
| 2440 | 2444 | ||
| 2441 | -static void *subpage_init (target_phys_addr_t base, uint32_t *phys, | ||
| 2442 | - int orig_memory) | 2445 | +static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys, |
| 2446 | + ram_addr_t orig_memory) | ||
| 2443 | { | 2447 | { |
| 2444 | subpage_t *mmio; | 2448 | subpage_t *mmio; |
| 2445 | int subpage_memory; | 2449 | int subpage_memory; |
hw/an5206.c
| @@ -30,7 +30,7 @@ void DMA_run (void) | @@ -30,7 +30,7 @@ void DMA_run (void) | ||
| 30 | 30 | ||
| 31 | /* Board init. */ | 31 | /* Board init. */ |
| 32 | 32 | ||
| 33 | -static void an5206_init(int ram_size, int vga_ram_size, | 33 | +static void an5206_init(ram_addr_t ram_size, int vga_ram_size, |
| 34 | const char *boot_device, DisplayState *ds, | 34 | const char *boot_device, DisplayState *ds, |
| 35 | const char *kernel_filename, const char *kernel_cmdline, | 35 | const char *kernel_filename, const char *kernel_cmdline, |
| 36 | const char *initrd_filename, const char *cpu_model) | 36 | const char *initrd_filename, const char *cpu_model) |
hw/boards.h
| @@ -3,7 +3,7 @@ | @@ -3,7 +3,7 @@ | ||
| 3 | #ifndef HW_BOARDS_H | 3 | #ifndef HW_BOARDS_H |
| 4 | #define HW_BOARDS_H | 4 | #define HW_BOARDS_H |
| 5 | 5 | ||
| 6 | -typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | 6 | +typedef void QEMUMachineInitFunc(ram_addr_t ram_size, int vga_ram_size, |
| 7 | const char *boot_device, DisplayState *ds, | 7 | const char *boot_device, DisplayState *ds, |
| 8 | const char *kernel_filename, | 8 | const char *kernel_filename, |
| 9 | const char *kernel_cmdline, | 9 | const char *kernel_cmdline, |
hw/dummy_m68k.c
| @@ -14,7 +14,7 @@ | @@ -14,7 +14,7 @@ | ||
| 14 | 14 | ||
| 15 | /* Board init. */ | 15 | /* Board init. */ |
| 16 | 16 | ||
| 17 | -static void dummy_m68k_init(int ram_size, int vga_ram_size, | 17 | +static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size, |
| 18 | const char *boot_device, DisplayState *ds, | 18 | const char *boot_device, DisplayState *ds, |
| 19 | const char *kernel_filename, const char *kernel_cmdline, | 19 | const char *kernel_filename, const char *kernel_cmdline, |
| 20 | const char *initrd_filename, const char *cpu_model) | 20 | const char *initrd_filename, const char *cpu_model) |
hw/etraxfs.c
| @@ -41,7 +41,7 @@ void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, | @@ -41,7 +41,7 @@ void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, | ||
| 41 | void etraxfs_ser_init(CPUState *env, qemu_irq *irqs, target_phys_addr_t base); | 41 | void etraxfs_ser_init(CPUState *env, qemu_irq *irqs, target_phys_addr_t base); |
| 42 | 42 | ||
| 43 | static | 43 | static |
| 44 | -void bareetraxfs_init (int ram_size, int vga_ram_size, | 44 | +void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size, |
| 45 | const char *boot_device, DisplayState *ds, | 45 | const char *boot_device, DisplayState *ds, |
| 46 | const char *kernel_filename, const char *kernel_cmdline, | 46 | const char *kernel_filename, const char *kernel_cmdline, |
| 47 | const char *initrd_filename, const char *cpu_model) | 47 | const char *initrd_filename, const char *cpu_model) |
hw/gumstix.c
| @@ -41,7 +41,7 @@ | @@ -41,7 +41,7 @@ | ||
| 41 | 41 | ||
| 42 | static const int sector_len = 128 * 1024; | 42 | static const int sector_len = 128 * 1024; |
| 43 | 43 | ||
| 44 | -static void connex_init(int ram_size, int vga_ram_size, | 44 | +static void connex_init(ram_addr_t ram_size, int vga_ram_size, |
| 45 | const char *boot_device, DisplayState *ds, | 45 | const char *boot_device, DisplayState *ds, |
| 46 | const char *kernel_filename, const char *kernel_cmdline, | 46 | const char *kernel_filename, const char *kernel_cmdline, |
| 47 | const char *initrd_filename, const char *cpu_model) | 47 | const char *initrd_filename, const char *cpu_model) |
| @@ -81,7 +81,7 @@ static void connex_init(int ram_size, int vga_ram_size, | @@ -81,7 +81,7 @@ static void connex_init(int ram_size, int vga_ram_size, | ||
| 81 | pxa2xx_gpio_in_get(cpu->gpio)[36]); | 81 | pxa2xx_gpio_in_get(cpu->gpio)[36]); |
| 82 | } | 82 | } |
| 83 | 83 | ||
| 84 | -static void verdex_init(int ram_size, int vga_ram_size, | 84 | +static void verdex_init(ram_addr_t ram_size, int vga_ram_size, |
| 85 | const char *boot_device, DisplayState *ds, | 85 | const char *boot_device, DisplayState *ds, |
| 86 | const char *kernel_filename, const char *kernel_cmdline, | 86 | const char *kernel_filename, const char *kernel_cmdline, |
| 87 | const char *initrd_filename, const char *cpu_model) | 87 | const char *initrd_filename, const char *cpu_model) |
hw/integratorcp.c
| @@ -474,7 +474,7 @@ static struct arm_boot_info integrator_binfo = { | @@ -474,7 +474,7 @@ static struct arm_boot_info integrator_binfo = { | ||
| 474 | .board_id = 0x113, | 474 | .board_id = 0x113, |
| 475 | }; | 475 | }; |
| 476 | 476 | ||
| 477 | -static void integratorcp_init(int ram_size, int vga_ram_size, | 477 | +static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size, |
| 478 | const char *boot_device, DisplayState *ds, | 478 | const char *boot_device, DisplayState *ds, |
| 479 | const char *kernel_filename, const char *kernel_cmdline, | 479 | const char *kernel_filename, const char *kernel_cmdline, |
| 480 | const char *initrd_filename, const char *cpu_model) | 480 | const char *initrd_filename, const char *cpu_model) |
hw/mainstone.c
| @@ -68,7 +68,7 @@ static struct arm_boot_info mainstone_binfo = { | @@ -68,7 +68,7 @@ static struct arm_boot_info mainstone_binfo = { | ||
| 68 | .ram_size = 0x04000000, | 68 | .ram_size = 0x04000000, |
| 69 | }; | 69 | }; |
| 70 | 70 | ||
| 71 | -static void mainstone_common_init(int ram_size, int vga_ram_size, | 71 | +static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size, |
| 72 | DisplayState *ds, const char *kernel_filename, | 72 | DisplayState *ds, const char *kernel_filename, |
| 73 | const char *kernel_cmdline, const char *initrd_filename, | 73 | const char *kernel_cmdline, const char *initrd_filename, |
| 74 | const char *cpu_model, enum mainstone_model_e model, int arm_id) | 74 | const char *cpu_model, enum mainstone_model_e model, int arm_id) |
| @@ -134,7 +134,7 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | @@ -134,7 +134,7 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | ||
| 134 | arm_load_kernel(cpu->env, &mainstone_binfo); | 134 | arm_load_kernel(cpu->env, &mainstone_binfo); |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | -static void mainstone_init(int ram_size, int vga_ram_size, | 137 | +static void mainstone_init(ram_addr_t ram_size, int vga_ram_size, |
| 138 | const char *boot_device, DisplayState *ds, | 138 | const char *boot_device, DisplayState *ds, |
| 139 | const char *kernel_filename, const char *kernel_cmdline, | 139 | const char *kernel_filename, const char *kernel_cmdline, |
| 140 | const char *initrd_filename, const char *cpu_model) | 140 | const char *initrd_filename, const char *cpu_model) |
hw/mcf5208.c
| @@ -202,7 +202,7 @@ static void mcf5208_sys_init(qemu_irq *pic) | @@ -202,7 +202,7 @@ static void mcf5208_sys_init(qemu_irq *pic) | ||
| 202 | } | 202 | } |
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | -static void mcf5208evb_init(int ram_size, int vga_ram_size, | 205 | +static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size, |
| 206 | const char *boot_device, DisplayState *ds, | 206 | const char *boot_device, DisplayState *ds, |
| 207 | const char *kernel_filename, const char *kernel_cmdline, | 207 | const char *kernel_filename, const char *kernel_cmdline, |
| 208 | const char *initrd_filename, const char *cpu_model) | 208 | const char *initrd_filename, const char *cpu_model) |
hw/mips_jazz.c
| @@ -116,7 +116,7 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len) | @@ -116,7 +116,7 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len) | ||
| 116 | #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX) | 116 | #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX) |
| 117 | 117 | ||
| 118 | static | 118 | static |
| 119 | -void mips_jazz_init (int ram_size, int vga_ram_size, | 119 | +void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, |
| 120 | DisplayState *ds, const char *cpu_model, | 120 | DisplayState *ds, const char *cpu_model, |
| 121 | enum jazz_model_e jazz_model) | 121 | enum jazz_model_e jazz_model) |
| 122 | { | 122 | { |
| @@ -256,7 +256,7 @@ void mips_jazz_init (int ram_size, int vga_ram_size, | @@ -256,7 +256,7 @@ void mips_jazz_init (int ram_size, int vga_ram_size, | ||
| 256 | } | 256 | } |
| 257 | 257 | ||
| 258 | static | 258 | static |
| 259 | -void mips_magnum_init (int ram_size, int vga_ram_size, | 259 | +void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size, |
| 260 | const char *boot_device, DisplayState *ds, | 260 | const char *boot_device, DisplayState *ds, |
| 261 | const char *kernel_filename, const char *kernel_cmdline, | 261 | const char *kernel_filename, const char *kernel_cmdline, |
| 262 | const char *initrd_filename, const char *cpu_model) | 262 | const char *initrd_filename, const char *cpu_model) |
| @@ -265,7 +265,7 @@ void mips_magnum_init (int ram_size, int vga_ram_size, | @@ -265,7 +265,7 @@ void mips_magnum_init (int ram_size, int vga_ram_size, | ||
| 265 | } | 265 | } |
| 266 | 266 | ||
| 267 | static | 267 | static |
| 268 | -void mips_pica61_init (int ram_size, int vga_ram_size, | 268 | +void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size, |
| 269 | const char *boot_device, DisplayState *ds, | 269 | const char *boot_device, DisplayState *ds, |
| 270 | const char *kernel_filename, const char *kernel_cmdline, | 270 | const char *kernel_filename, const char *kernel_cmdline, |
| 271 | const char *initrd_filename, const char *cpu_model) | 271 | const char *initrd_filename, const char *cpu_model) |
hw/mips_malta.c
| @@ -763,7 +763,7 @@ static void main_cpu_reset(void *opaque) | @@ -763,7 +763,7 @@ static void main_cpu_reset(void *opaque) | ||
| 763 | } | 763 | } |
| 764 | 764 | ||
| 765 | static | 765 | static |
| 766 | -void mips_malta_init (int ram_size, int vga_ram_size, | 766 | +void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, |
| 767 | const char *boot_device, DisplayState *ds, | 767 | const char *boot_device, DisplayState *ds, |
| 768 | const char *kernel_filename, const char *kernel_cmdline, | 768 | const char *kernel_filename, const char *kernel_cmdline, |
| 769 | const char *initrd_filename, const char *cpu_model) | 769 | const char *initrd_filename, const char *cpu_model) |
hw/mips_mipssim.c
| @@ -106,7 +106,7 @@ static void main_cpu_reset(void *opaque) | @@ -106,7 +106,7 @@ static void main_cpu_reset(void *opaque) | ||
| 106 | } | 106 | } |
| 107 | 107 | ||
| 108 | static void | 108 | static void |
| 109 | -mips_mipssim_init (int ram_size, int vga_ram_size, | 109 | +mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size, |
| 110 | const char *boot_device, DisplayState *ds, | 110 | const char *boot_device, DisplayState *ds, |
| 111 | const char *kernel_filename, const char *kernel_cmdline, | 111 | const char *kernel_filename, const char *kernel_cmdline, |
| 112 | const char *initrd_filename, const char *cpu_model) | 112 | const char *initrd_filename, const char *cpu_model) |
hw/mips_r4k.c
| @@ -147,7 +147,7 @@ static void main_cpu_reset(void *opaque) | @@ -147,7 +147,7 @@ static void main_cpu_reset(void *opaque) | ||
| 147 | 147 | ||
| 148 | static const int sector_len = 32 * 1024; | 148 | static const int sector_len = 32 * 1024; |
| 149 | static | 149 | static |
| 150 | -void mips_r4k_init (int ram_size, int vga_ram_size, | 150 | +void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, |
| 151 | const char *boot_device, DisplayState *ds, | 151 | const char *boot_device, DisplayState *ds, |
| 152 | const char *kernel_filename, const char *kernel_cmdline, | 152 | const char *kernel_filename, const char *kernel_cmdline, |
| 153 | const char *initrd_filename, const char *cpu_model) | 153 | const char *initrd_filename, const char *cpu_model) |
hw/nseries.c
| @@ -891,7 +891,7 @@ static struct arm_boot_info n800_binfo = { | @@ -891,7 +891,7 @@ static struct arm_boot_info n800_binfo = { | ||
| 891 | .atag_board = n800_atag_setup, | 891 | .atag_board = n800_atag_setup, |
| 892 | }; | 892 | }; |
| 893 | 893 | ||
| 894 | -static void n800_init(int ram_size, int vga_ram_size, | 894 | +static void n800_init(ram_addr_t ram_size, int vga_ram_size, |
| 895 | const char *boot_device, DisplayState *ds, | 895 | const char *boot_device, DisplayState *ds, |
| 896 | const char *kernel_filename, const char *kernel_cmdline, | 896 | const char *kernel_filename, const char *kernel_cmdline, |
| 897 | const char *initrd_filename, const char *cpu_model) | 897 | const char *initrd_filename, const char *cpu_model) |
hw/palm.c
| @@ -200,7 +200,7 @@ static struct arm_boot_info palmte_binfo = { | @@ -200,7 +200,7 @@ static struct arm_boot_info palmte_binfo = { | ||
| 200 | .board_id = 0x331, | 200 | .board_id = 0x331, |
| 201 | }; | 201 | }; |
| 202 | 202 | ||
| 203 | -static void palmte_init(int ram_size, int vga_ram_size, | 203 | +static void palmte_init(ram_addr_t ram_size, int vga_ram_size, |
| 204 | const char *boot_device, DisplayState *ds, | 204 | const char *boot_device, DisplayState *ds, |
| 205 | const char *kernel_filename, const char *kernel_cmdline, | 205 | const char *kernel_filename, const char *kernel_cmdline, |
| 206 | const char *initrd_filename, const char *cpu_model) | 206 | const char *initrd_filename, const char *cpu_model) |
hw/pc.c
| @@ -190,7 +190,8 @@ static int boot_device2nibble(char boot_device) | @@ -190,7 +190,8 @@ static int boot_device2nibble(char boot_device) | ||
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | /* hd_table must contain 4 block drivers */ | 192 | /* hd_table must contain 4 block drivers */ |
| 193 | -static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table) | 193 | +static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
| 194 | + const char *boot_device, BlockDriverState **hd_table) | ||
| 194 | { | 195 | { |
| 195 | RTCState *s = rtc_state; | 196 | RTCState *s = rtc_state; |
| 196 | int nbds, bds[3] = { 0, }; | 197 | int nbds, bds[3] = { 0, }; |
| @@ -213,6 +214,12 @@ static void cmos_init(int ram_size, const char *boot_device, BlockDriverState ** | @@ -213,6 +214,12 @@ static void cmos_init(int ram_size, const char *boot_device, BlockDriverState ** | ||
| 213 | rtc_set_memory(s, 0x30, val); | 214 | rtc_set_memory(s, 0x30, val); |
| 214 | rtc_set_memory(s, 0x31, val >> 8); | 215 | rtc_set_memory(s, 0x31, val >> 8); |
| 215 | 216 | ||
| 217 | + if (above_4g_mem_size) { | ||
| 218 | + rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); | ||
| 219 | + rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); | ||
| 220 | + rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); | ||
| 221 | + } | ||
| 222 | + | ||
| 216 | if (ram_size > (16 * 1024 * 1024)) | 223 | if (ram_size > (16 * 1024 * 1024)) |
| 217 | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); | 224 | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
| 218 | else | 225 | else |
| @@ -678,7 +685,7 @@ static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) | @@ -678,7 +685,7 @@ static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) | ||
| 678 | } | 685 | } |
| 679 | 686 | ||
| 680 | /* PC hardware initialisation */ | 687 | /* PC hardware initialisation */ |
| 681 | -static void pc_init1(int ram_size, int vga_ram_size, | 688 | +static void pc_init1(ram_addr_t ram_size, int vga_ram_size, |
| 682 | const char *boot_device, DisplayState *ds, | 689 | const char *boot_device, DisplayState *ds, |
| 683 | const char *kernel_filename, const char *kernel_cmdline, | 690 | const char *kernel_filename, const char *kernel_cmdline, |
| 684 | const char *initrd_filename, | 691 | const char *initrd_filename, |
| @@ -687,6 +694,7 @@ static void pc_init1(int ram_size, int vga_ram_size, | @@ -687,6 +694,7 @@ static void pc_init1(int ram_size, int vga_ram_size, | ||
| 687 | char buf[1024]; | 694 | char buf[1024]; |
| 688 | int ret, linux_boot, i; | 695 | int ret, linux_boot, i; |
| 689 | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; | 696 | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
| 697 | + ram_addr_t below_4g_mem_size, above_4g_mem_size = 0; | ||
| 690 | int bios_size, isa_bios_size, vga_bios_size; | 698 | int bios_size, isa_bios_size, vga_bios_size; |
| 691 | PCIBus *pci_bus; | 699 | PCIBus *pci_bus; |
| 692 | int piix3_devfn = -1; | 700 | int piix3_devfn = -1; |
| @@ -698,6 +706,13 @@ static void pc_init1(int ram_size, int vga_ram_size, | @@ -698,6 +706,13 @@ static void pc_init1(int ram_size, int vga_ram_size, | ||
| 698 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | 706 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
| 699 | BlockDriverState *fd[MAX_FD]; | 707 | BlockDriverState *fd[MAX_FD]; |
| 700 | 708 | ||
| 709 | + if (ram_size >= 0xe0000000 ) { | ||
| 710 | + above_4g_mem_size = ram_size - 0xe0000000; | ||
| 711 | + below_4g_mem_size = 0xe0000000; | ||
| 712 | + } else { | ||
| 713 | + below_4g_mem_size = ram_size; | ||
| 714 | + } | ||
| 715 | + | ||
| 701 | linux_boot = (kernel_filename != NULL); | 716 | linux_boot = (kernel_filename != NULL); |
| 702 | 717 | ||
| 703 | /* init CPUs */ | 718 | /* init CPUs */ |
| @@ -732,7 +747,13 @@ static void pc_init1(int ram_size, int vga_ram_size, | @@ -732,7 +747,13 @@ static void pc_init1(int ram_size, int vga_ram_size, | ||
| 732 | 747 | ||
| 733 | /* allocate RAM */ | 748 | /* allocate RAM */ |
| 734 | ram_addr = qemu_ram_alloc(ram_size); | 749 | ram_addr = qemu_ram_alloc(ram_size); |
| 735 | - cpu_register_physical_memory(0, ram_size, ram_addr); | 750 | + cpu_register_physical_memory(0, below_4g_mem_size, ram_addr); |
| 751 | + | ||
| 752 | + /* above 4giga memory allocation */ | ||
| 753 | + if (above_4g_mem_size > 0) { | ||
| 754 | + cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size, | ||
| 755 | + ram_addr + below_4g_mem_size); | ||
| 756 | + } | ||
| 736 | 757 | ||
| 737 | /* allocate VGA RAM */ | 758 | /* allocate VGA RAM */ |
| 738 | vga_ram_addr = qemu_ram_alloc(vga_ram_size); | 759 | vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
| @@ -952,7 +973,7 @@ static void pc_init1(int ram_size, int vga_ram_size, | @@ -952,7 +973,7 @@ static void pc_init1(int ram_size, int vga_ram_size, | ||
| 952 | } | 973 | } |
| 953 | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); | 974 | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); |
| 954 | 975 | ||
| 955 | - cmos_init(ram_size, boot_device, hd); | 976 | + cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); |
| 956 | 977 | ||
| 957 | if (pci_enabled && usb_enabled) { | 978 | if (pci_enabled && usb_enabled) { |
| 958 | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); | 979 | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); |
| @@ -992,7 +1013,7 @@ static void pc_init1(int ram_size, int vga_ram_size, | @@ -992,7 +1013,7 @@ static void pc_init1(int ram_size, int vga_ram_size, | ||
| 992 | } | 1013 | } |
| 993 | } | 1014 | } |
| 994 | 1015 | ||
| 995 | -static void pc_init_pci(int ram_size, int vga_ram_size, | 1016 | +static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size, |
| 996 | const char *boot_device, DisplayState *ds, | 1017 | const char *boot_device, DisplayState *ds, |
| 997 | const char *kernel_filename, | 1018 | const char *kernel_filename, |
| 998 | const char *kernel_cmdline, | 1019 | const char *kernel_cmdline, |
| @@ -1004,7 +1025,7 @@ static void pc_init_pci(int ram_size, int vga_ram_size, | @@ -1004,7 +1025,7 @@ static void pc_init_pci(int ram_size, int vga_ram_size, | ||
| 1004 | initrd_filename, 1, cpu_model); | 1025 | initrd_filename, 1, cpu_model); |
| 1005 | } | 1026 | } |
| 1006 | 1027 | ||
| 1007 | -static void pc_init_isa(int ram_size, int vga_ram_size, | 1028 | +static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size, |
| 1008 | const char *boot_device, DisplayState *ds, | 1029 | const char *boot_device, DisplayState *ds, |
| 1009 | const char *kernel_filename, | 1030 | const char *kernel_filename, |
| 1010 | const char *kernel_cmdline, | 1031 | const char *kernel_cmdline, |
hw/piix_pci.c
| @@ -55,7 +55,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) | @@ -55,7 +55,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) | ||
| 55 | return (irq_num + slot_addend) & 3; | 55 | return (irq_num + slot_addend) & 3; |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | -static uint32_t isa_page_descs[384 / 4]; | 58 | +static target_phys_addr_t isa_page_descs[384 / 4]; |
| 59 | static uint8_t smm_enabled; | 59 | static uint8_t smm_enabled; |
| 60 | static int pci_irq_levels[4]; | 60 | static int pci_irq_levels[4]; |
| 61 | 61 |
hw/ppc405_boards.c
| @@ -177,7 +177,7 @@ static void ref405ep_fpga_init (uint32_t base) | @@ -177,7 +177,7 @@ static void ref405ep_fpga_init (uint32_t base) | ||
| 177 | } | 177 | } |
| 178 | } | 178 | } |
| 179 | 179 | ||
| 180 | -static void ref405ep_init (int ram_size, int vga_ram_size, | 180 | +static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size, |
| 181 | const char *boot_device, DisplayState *ds, | 181 | const char *boot_device, DisplayState *ds, |
| 182 | const char *kernel_filename, | 182 | const char *kernel_filename, |
| 183 | const char *kernel_cmdline, | 183 | const char *kernel_cmdline, |
| @@ -505,7 +505,7 @@ static void taihu_cpld_init (uint32_t base) | @@ -505,7 +505,7 @@ static void taihu_cpld_init (uint32_t base) | ||
| 505 | } | 505 | } |
| 506 | } | 506 | } |
| 507 | 507 | ||
| 508 | -static void taihu_405ep_init(int ram_size, int vga_ram_size, | 508 | +static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size, |
| 509 | const char *boot_device, DisplayState *ds, | 509 | const char *boot_device, DisplayState *ds, |
| 510 | const char *kernel_filename, | 510 | const char *kernel_filename, |
| 511 | const char *kernel_cmdline, | 511 | const char *kernel_cmdline, |
hw/ppc_chrp.c
| @@ -57,7 +57,7 @@ static CPUReadMemoryFunc *unin_read[] = { | @@ -57,7 +57,7 @@ static CPUReadMemoryFunc *unin_read[] = { | ||
| 57 | }; | 57 | }; |
| 58 | 58 | ||
| 59 | /* PowerPC Mac99 hardware initialisation */ | 59 | /* PowerPC Mac99 hardware initialisation */ |
| 60 | -static void ppc_core99_init (int ram_size, int vga_ram_size, | 60 | +static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, |
| 61 | const char *boot_device, DisplayState *ds, | 61 | const char *boot_device, DisplayState *ds, |
| 62 | const char *kernel_filename, | 62 | const char *kernel_filename, |
| 63 | const char *kernel_cmdline, | 63 | const char *kernel_cmdline, |
hw/ppc_oldworld.c
| @@ -103,7 +103,7 @@ static int vga_osi_call (CPUState *env) | @@ -103,7 +103,7 @@ static int vga_osi_call (CPUState *env) | ||
| 103 | return 1; /* osi_call handled */ | 103 | return 1; /* osi_call handled */ |
| 104 | } | 104 | } |
| 105 | 105 | ||
| 106 | -static void ppc_heathrow_init (int ram_size, int vga_ram_size, | 106 | +static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, |
| 107 | const char *boot_device, DisplayState *ds, | 107 | const char *boot_device, DisplayState *ds, |
| 108 | const char *kernel_filename, | 108 | const char *kernel_filename, |
| 109 | const char *kernel_cmdline, | 109 | const char *kernel_cmdline, |
hw/ppc_prep.c
| @@ -535,7 +535,7 @@ CPUReadMemoryFunc *PPC_prep_io_read[] = { | @@ -535,7 +535,7 @@ CPUReadMemoryFunc *PPC_prep_io_read[] = { | ||
| 535 | #define NVRAM_SIZE 0x2000 | 535 | #define NVRAM_SIZE 0x2000 |
| 536 | 536 | ||
| 537 | /* PowerPC PREP hardware initialisation */ | 537 | /* PowerPC PREP hardware initialisation */ |
| 538 | -static void ppc_prep_init (int ram_size, int vga_ram_size, | 538 | +static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, |
| 539 | const char *boot_device, DisplayState *ds, | 539 | const char *boot_device, DisplayState *ds, |
| 540 | const char *kernel_filename, | 540 | const char *kernel_filename, |
| 541 | const char *kernel_cmdline, | 541 | const char *kernel_cmdline, |
hw/r2d.c
| @@ -30,7 +30,7 @@ | @@ -30,7 +30,7 @@ | ||
| 30 | #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ | 30 | #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ |
| 31 | #define SDRAM_SIZE 0x04000000 | 31 | #define SDRAM_SIZE 0x04000000 |
| 32 | 32 | ||
| 33 | -static void r2d_init(int ram_size, int vga_ram_size, | 33 | +static void r2d_init(ram_addr_t ram_size, int vga_ram_size, |
| 34 | const char *boot_device, DisplayState * ds, | 34 | const char *boot_device, DisplayState * ds, |
| 35 | const char *kernel_filename, const char *kernel_cmdline, | 35 | const char *kernel_filename, const char *kernel_cmdline, |
| 36 | const char *initrd_filename, const char *cpu_model) | 36 | const char *initrd_filename, const char *cpu_model) |
hw/realview.c
| @@ -23,7 +23,7 @@ static struct arm_boot_info realview_binfo = { | @@ -23,7 +23,7 @@ static struct arm_boot_info realview_binfo = { | ||
| 23 | .board_id = 0x33b, | 23 | .board_id = 0x33b, |
| 24 | }; | 24 | }; |
| 25 | 25 | ||
| 26 | -static void realview_init(int ram_size, int vga_ram_size, | 26 | +static void realview_init(ram_addr_t ram_size, int vga_ram_size, |
| 27 | const char *boot_device, DisplayState *ds, | 27 | const char *boot_device, DisplayState *ds, |
| 28 | const char *kernel_filename, const char *kernel_cmdline, | 28 | const char *kernel_filename, const char *kernel_cmdline, |
| 29 | const char *initrd_filename, const char *cpu_model) | 29 | const char *initrd_filename, const char *cpu_model) |
hw/shix.c
| @@ -65,7 +65,7 @@ void vga_screen_dump(const char *filename) | @@ -65,7 +65,7 @@ void vga_screen_dump(const char *filename) | ||
| 65 | /* XXXXX */ | 65 | /* XXXXX */ |
| 66 | } | 66 | } |
| 67 | 67 | ||
| 68 | -static void shix_init(int ram_size, int vga_ram_size, | 68 | +static void shix_init(ram_addr_t ram_size, int vga_ram_size, |
| 69 | const char *boot_device, DisplayState * ds, | 69 | const char *boot_device, DisplayState * ds, |
| 70 | const char *kernel_filename, const char *kernel_cmdline, | 70 | const char *kernel_filename, const char *kernel_cmdline, |
| 71 | const char *initrd_filename, const char *cpu_model) | 71 | const char *initrd_filename, const char *cpu_model) |
hw/spitz.c
| @@ -1188,7 +1188,7 @@ static struct arm_boot_info spitz_binfo = { | @@ -1188,7 +1188,7 @@ static struct arm_boot_info spitz_binfo = { | ||
| 1188 | .ram_size = 0x04000000, | 1188 | .ram_size = 0x04000000, |
| 1189 | }; | 1189 | }; |
| 1190 | 1190 | ||
| 1191 | -static void spitz_common_init(int ram_size, int vga_ram_size, | 1191 | +static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size, |
| 1192 | DisplayState *ds, const char *kernel_filename, | 1192 | DisplayState *ds, const char *kernel_filename, |
| 1193 | const char *kernel_cmdline, const char *initrd_filename, | 1193 | const char *kernel_cmdline, const char *initrd_filename, |
| 1194 | const char *cpu_model, enum spitz_model_e model, int arm_id) | 1194 | const char *cpu_model, enum spitz_model_e model, int arm_id) |
| @@ -1246,7 +1246,7 @@ static void spitz_common_init(int ram_size, int vga_ram_size, | @@ -1246,7 +1246,7 @@ static void spitz_common_init(int ram_size, int vga_ram_size, | ||
| 1246 | sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE); | 1246 | sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE); |
| 1247 | } | 1247 | } |
| 1248 | 1248 | ||
| 1249 | -static void spitz_init(int ram_size, int vga_ram_size, | 1249 | +static void spitz_init(ram_addr_t ram_size, int vga_ram_size, |
| 1250 | const char *boot_device, DisplayState *ds, | 1250 | const char *boot_device, DisplayState *ds, |
| 1251 | const char *kernel_filename, const char *kernel_cmdline, | 1251 | const char *kernel_filename, const char *kernel_cmdline, |
| 1252 | const char *initrd_filename, const char *cpu_model) | 1252 | const char *initrd_filename, const char *cpu_model) |
| @@ -1255,7 +1255,7 @@ static void spitz_init(int ram_size, int vga_ram_size, | @@ -1255,7 +1255,7 @@ static void spitz_init(int ram_size, int vga_ram_size, | ||
| 1255 | kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9); | 1255 | kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9); |
| 1256 | } | 1256 | } |
| 1257 | 1257 | ||
| 1258 | -static void borzoi_init(int ram_size, int vga_ram_size, | 1258 | +static void borzoi_init(ram_addr_t ram_size, int vga_ram_size, |
| 1259 | const char *boot_device, DisplayState *ds, | 1259 | const char *boot_device, DisplayState *ds, |
| 1260 | const char *kernel_filename, const char *kernel_cmdline, | 1260 | const char *kernel_filename, const char *kernel_cmdline, |
| 1261 | const char *initrd_filename, const char *cpu_model) | 1261 | const char *initrd_filename, const char *cpu_model) |
| @@ -1264,7 +1264,7 @@ static void borzoi_init(int ram_size, int vga_ram_size, | @@ -1264,7 +1264,7 @@ static void borzoi_init(int ram_size, int vga_ram_size, | ||
| 1264 | kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f); | 1264 | kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f); |
| 1265 | } | 1265 | } |
| 1266 | 1266 | ||
| 1267 | -static void akita_init(int ram_size, int vga_ram_size, | 1267 | +static void akita_init(ram_addr_t ram_size, int vga_ram_size, |
| 1268 | const char *boot_device, DisplayState *ds, | 1268 | const char *boot_device, DisplayState *ds, |
| 1269 | const char *kernel_filename, const char *kernel_cmdline, | 1269 | const char *kernel_filename, const char *kernel_cmdline, |
| 1270 | const char *initrd_filename, const char *cpu_model) | 1270 | const char *initrd_filename, const char *cpu_model) |
| @@ -1273,7 +1273,7 @@ static void akita_init(int ram_size, int vga_ram_size, | @@ -1273,7 +1273,7 @@ static void akita_init(int ram_size, int vga_ram_size, | ||
| 1273 | kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8); | 1273 | kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8); |
| 1274 | } | 1274 | } |
| 1275 | 1275 | ||
| 1276 | -static void terrier_init(int ram_size, int vga_ram_size, | 1276 | +static void terrier_init(ram_addr_t ram_size, int vga_ram_size, |
| 1277 | const char *boot_device, DisplayState *ds, | 1277 | const char *boot_device, DisplayState *ds, |
| 1278 | const char *kernel_filename, const char *kernel_cmdline, | 1278 | const char *kernel_filename, const char *kernel_cmdline, |
| 1279 | const char *initrd_filename, const char *cpu_model) | 1279 | const char *initrd_filename, const char *cpu_model) |
hw/stellaris.c
| @@ -1169,7 +1169,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, | @@ -1169,7 +1169,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, | ||
| 1169 | } | 1169 | } |
| 1170 | 1170 | ||
| 1171 | /* FIXME: Figure out how to generate these from stellaris_boards. */ | 1171 | /* FIXME: Figure out how to generate these from stellaris_boards. */ |
| 1172 | -static void lm3s811evb_init(int ram_size, int vga_ram_size, | 1172 | +static void lm3s811evb_init(ram_addr_t ram_size, int vga_ram_size, |
| 1173 | const char *boot_device, DisplayState *ds, | 1173 | const char *boot_device, DisplayState *ds, |
| 1174 | const char *kernel_filename, const char *kernel_cmdline, | 1174 | const char *kernel_filename, const char *kernel_cmdline, |
| 1175 | const char *initrd_filename, const char *cpu_model) | 1175 | const char *initrd_filename, const char *cpu_model) |
| @@ -1177,7 +1177,7 @@ static void lm3s811evb_init(int ram_size, int vga_ram_size, | @@ -1177,7 +1177,7 @@ static void lm3s811evb_init(int ram_size, int vga_ram_size, | ||
| 1177 | stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[0]); | 1177 | stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[0]); |
| 1178 | } | 1178 | } |
| 1179 | 1179 | ||
| 1180 | -static void lm3s6965evb_init(int ram_size, int vga_ram_size, | 1180 | +static void lm3s6965evb_init(ram_addr_t ram_size, int vga_ram_size, |
| 1181 | const char *boot_device, DisplayState *ds, | 1181 | const char *boot_device, DisplayState *ds, |
| 1182 | const char *kernel_filename, const char *kernel_cmdline, | 1182 | const char *kernel_filename, const char *kernel_cmdline, |
| 1183 | const char *initrd_filename, const char *cpu_model) | 1183 | const char *initrd_filename, const char *cpu_model) |
hw/sun4m.c
| @@ -1113,7 +1113,7 @@ static const struct hwdef hwdefs[] = { | @@ -1113,7 +1113,7 @@ static const struct hwdef hwdefs[] = { | ||
| 1113 | }; | 1113 | }; |
| 1114 | 1114 | ||
| 1115 | /* SPARCstation 5 hardware initialisation */ | 1115 | /* SPARCstation 5 hardware initialisation */ |
| 1116 | -static void ss5_init(int RAM_size, int vga_ram_size, | 1116 | +static void ss5_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1117 | const char *boot_device, DisplayState *ds, | 1117 | const char *boot_device, DisplayState *ds, |
| 1118 | const char *kernel_filename, const char *kernel_cmdline, | 1118 | const char *kernel_filename, const char *kernel_cmdline, |
| 1119 | const char *initrd_filename, const char *cpu_model) | 1119 | const char *initrd_filename, const char *cpu_model) |
| @@ -1123,7 +1123,7 @@ static void ss5_init(int RAM_size, int vga_ram_size, | @@ -1123,7 +1123,7 @@ static void ss5_init(int RAM_size, int vga_ram_size, | ||
| 1123 | } | 1123 | } |
| 1124 | 1124 | ||
| 1125 | /* SPARCstation 10 hardware initialisation */ | 1125 | /* SPARCstation 10 hardware initialisation */ |
| 1126 | -static void ss10_init(int RAM_size, int vga_ram_size, | 1126 | +static void ss10_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1127 | const char *boot_device, DisplayState *ds, | 1127 | const char *boot_device, DisplayState *ds, |
| 1128 | const char *kernel_filename, const char *kernel_cmdline, | 1128 | const char *kernel_filename, const char *kernel_cmdline, |
| 1129 | const char *initrd_filename, const char *cpu_model) | 1129 | const char *initrd_filename, const char *cpu_model) |
| @@ -1133,7 +1133,7 @@ static void ss10_init(int RAM_size, int vga_ram_size, | @@ -1133,7 +1133,7 @@ static void ss10_init(int RAM_size, int vga_ram_size, | ||
| 1133 | } | 1133 | } |
| 1134 | 1134 | ||
| 1135 | /* SPARCserver 600MP hardware initialisation */ | 1135 | /* SPARCserver 600MP hardware initialisation */ |
| 1136 | -static void ss600mp_init(int RAM_size, int vga_ram_size, | 1136 | +static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1137 | const char *boot_device, DisplayState *ds, | 1137 | const char *boot_device, DisplayState *ds, |
| 1138 | const char *kernel_filename, const char *kernel_cmdline, | 1138 | const char *kernel_filename, const char *kernel_cmdline, |
| 1139 | const char *initrd_filename, const char *cpu_model) | 1139 | const char *initrd_filename, const char *cpu_model) |
| @@ -1143,7 +1143,7 @@ static void ss600mp_init(int RAM_size, int vga_ram_size, | @@ -1143,7 +1143,7 @@ static void ss600mp_init(int RAM_size, int vga_ram_size, | ||
| 1143 | } | 1143 | } |
| 1144 | 1144 | ||
| 1145 | /* SPARCstation 20 hardware initialisation */ | 1145 | /* SPARCstation 20 hardware initialisation */ |
| 1146 | -static void ss20_init(int RAM_size, int vga_ram_size, | 1146 | +static void ss20_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1147 | const char *boot_device, DisplayState *ds, | 1147 | const char *boot_device, DisplayState *ds, |
| 1148 | const char *kernel_filename, const char *kernel_cmdline, | 1148 | const char *kernel_filename, const char *kernel_cmdline, |
| 1149 | const char *initrd_filename, const char *cpu_model) | 1149 | const char *initrd_filename, const char *cpu_model) |
| @@ -1153,7 +1153,7 @@ static void ss20_init(int RAM_size, int vga_ram_size, | @@ -1153,7 +1153,7 @@ static void ss20_init(int RAM_size, int vga_ram_size, | ||
| 1153 | } | 1153 | } |
| 1154 | 1154 | ||
| 1155 | /* SPARCstation 2 hardware initialisation */ | 1155 | /* SPARCstation 2 hardware initialisation */ |
| 1156 | -static void ss2_init(int RAM_size, int vga_ram_size, | 1156 | +static void ss2_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1157 | const char *boot_device, DisplayState *ds, | 1157 | const char *boot_device, DisplayState *ds, |
| 1158 | const char *kernel_filename, const char *kernel_cmdline, | 1158 | const char *kernel_filename, const char *kernel_cmdline, |
| 1159 | const char *initrd_filename, const char *cpu_model) | 1159 | const char *initrd_filename, const char *cpu_model) |
| @@ -1493,7 +1493,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, int RAM_size, | @@ -1493,7 +1493,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, int RAM_size, | ||
| 1493 | } | 1493 | } |
| 1494 | 1494 | ||
| 1495 | /* SPARCserver 1000 hardware initialisation */ | 1495 | /* SPARCserver 1000 hardware initialisation */ |
| 1496 | -static void ss1000_init(int RAM_size, int vga_ram_size, | 1496 | +static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1497 | const char *boot_device, DisplayState *ds, | 1497 | const char *boot_device, DisplayState *ds, |
| 1498 | const char *kernel_filename, const char *kernel_cmdline, | 1498 | const char *kernel_filename, const char *kernel_cmdline, |
| 1499 | const char *initrd_filename, const char *cpu_model) | 1499 | const char *initrd_filename, const char *cpu_model) |
| @@ -1503,7 +1503,7 @@ static void ss1000_init(int RAM_size, int vga_ram_size, | @@ -1503,7 +1503,7 @@ static void ss1000_init(int RAM_size, int vga_ram_size, | ||
| 1503 | } | 1503 | } |
| 1504 | 1504 | ||
| 1505 | /* SPARCcenter 2000 hardware initialisation */ | 1505 | /* SPARCcenter 2000 hardware initialisation */ |
| 1506 | -static void ss2000_init(int RAM_size, int vga_ram_size, | 1506 | +static void ss2000_init(ram_addr_t RAM_size, int vga_ram_size, |
| 1507 | const char *boot_device, DisplayState *ds, | 1507 | const char *boot_device, DisplayState *ds, |
| 1508 | const char *kernel_filename, const char *kernel_cmdline, | 1508 | const char *kernel_filename, const char *kernel_cmdline, |
| 1509 | const char *initrd_filename, const char *cpu_model) | 1509 | const char *initrd_filename, const char *cpu_model) |
hw/sun4u.c
| @@ -227,7 +227,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; | @@ -227,7 +227,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; | ||
| 227 | static fdctrl_t *floppy_controller; | 227 | static fdctrl_t *floppy_controller; |
| 228 | 228 | ||
| 229 | /* Sun4u hardware initialisation */ | 229 | /* Sun4u hardware initialisation */ |
| 230 | -static void sun4u_init(int ram_size, int vga_ram_size, | 230 | +static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, |
| 231 | const char *boot_devices, DisplayState *ds, | 231 | const char *boot_devices, DisplayState *ds, |
| 232 | const char *kernel_filename, const char *kernel_cmdline, | 232 | const char *kernel_filename, const char *kernel_cmdline, |
| 233 | const char *initrd_filename, const char *cpu_model) | 233 | const char *initrd_filename, const char *cpu_model) |
hw/versatilepb.c
| @@ -159,7 +159,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq) | @@ -159,7 +159,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq) | ||
| 159 | 159 | ||
| 160 | static struct arm_boot_info versatile_binfo; | 160 | static struct arm_boot_info versatile_binfo; |
| 161 | 161 | ||
| 162 | -static void versatile_init(int ram_size, int vga_ram_size, | 162 | +static void versatile_init(ram_addr_t ram_size, int vga_ram_size, |
| 163 | const char *boot_device, DisplayState *ds, | 163 | const char *boot_device, DisplayState *ds, |
| 164 | const char *kernel_filename, const char *kernel_cmdline, | 164 | const char *kernel_filename, const char *kernel_cmdline, |
| 165 | const char *initrd_filename, const char *cpu_model, | 165 | const char *initrd_filename, const char *cpu_model, |
| @@ -293,7 +293,7 @@ static void versatile_init(int ram_size, int vga_ram_size, | @@ -293,7 +293,7 @@ static void versatile_init(int ram_size, int vga_ram_size, | ||
| 293 | arm_load_kernel(env, &versatile_binfo); | 293 | arm_load_kernel(env, &versatile_binfo); |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | -static void vpb_init(int ram_size, int vga_ram_size, | 296 | +static void vpb_init(ram_addr_t ram_size, int vga_ram_size, |
| 297 | const char *boot_device, DisplayState *ds, | 297 | const char *boot_device, DisplayState *ds, |
| 298 | const char *kernel_filename, const char *kernel_cmdline, | 298 | const char *kernel_filename, const char *kernel_cmdline, |
| 299 | const char *initrd_filename, const char *cpu_model) | 299 | const char *initrd_filename, const char *cpu_model) |
| @@ -304,7 +304,7 @@ static void vpb_init(int ram_size, int vga_ram_size, | @@ -304,7 +304,7 @@ static void vpb_init(int ram_size, int vga_ram_size, | ||
| 304 | initrd_filename, cpu_model, 0x183); | 304 | initrd_filename, cpu_model, 0x183); |
| 305 | } | 305 | } |
| 306 | 306 | ||
| 307 | -static void vab_init(int ram_size, int vga_ram_size, | 307 | +static void vab_init(ram_addr_t ram_size, int vga_ram_size, |
| 308 | const char *boot_device, DisplayState *ds, | 308 | const char *boot_device, DisplayState *ds, |
| 309 | const char *kernel_filename, const char *kernel_cmdline, | 309 | const char *kernel_filename, const char *kernel_cmdline, |
| 310 | const char *initrd_filename, const char *cpu_model) | 310 | const char *initrd_filename, const char *cpu_model) |
osdep.c
| @@ -98,7 +98,6 @@ static void *kqemu_vmalloc(size_t size) | @@ -98,7 +98,6 @@ static void *kqemu_vmalloc(size_t size) | ||
| 98 | int64_t free_space; | 98 | int64_t free_space; |
| 99 | int ram_mb; | 99 | int ram_mb; |
| 100 | 100 | ||
| 101 | - extern int ram_size; | ||
| 102 | free_space = (int64_t)stfs.f_bavail * stfs.f_bsize; | 101 | free_space = (int64_t)stfs.f_bavail * stfs.f_bsize; |
| 103 | if ((ram_size + 8192 * 1024) >= free_space) { | 102 | if ((ram_size + 8192 * 1024) >= free_space) { |
| 104 | ram_mb = (ram_size / (1024 * 1024)); | 103 | ram_mb = (ram_size / (1024 * 1024)); |
qemu-doc.texi
| @@ -322,7 +322,9 @@ Disable boot signature checking for floppy disks in Bochs BIOS. It may | @@ -322,7 +322,9 @@ Disable boot signature checking for floppy disks in Bochs BIOS. It may | ||
| 322 | be needed to boot from old floppy disks. | 322 | be needed to boot from old floppy disks. |
| 323 | 323 | ||
| 324 | @item -m @var{megs} | 324 | @item -m @var{megs} |
| 325 | -Set virtual RAM size to @var{megs} megabytes. Default is 128 MiB. | 325 | +Set virtual RAM size to @var{megs} megabytes. Default is 128 MiB. Optionally, |
| 326 | +a suffix of ``M'' or ``G'' can be used to signify a value in megabytes or | ||
| 327 | +gigabytes respectively. | ||
| 326 | 328 | ||
| 327 | @item -smp @var{n} | 329 | @item -smp @var{n} |
| 328 | Simulate an SMP system with @var{n} CPUs. On the PC target, up to 255 | 330 | Simulate an SMP system with @var{n} CPUs. On the PC target, up to 255 |
sysemu.h
| @@ -73,7 +73,6 @@ int tap_win32_init(VLANState *vlan, const char *ifname); | @@ -73,7 +73,6 @@ int tap_win32_init(VLANState *vlan, const char *ifname); | ||
| 73 | /* SLIRP */ | 73 | /* SLIRP */ |
| 74 | void do_info_slirp(void); | 74 | void do_info_slirp(void); |
| 75 | 75 | ||
| 76 | -extern int ram_size; | ||
| 77 | extern int bios_size; | 76 | extern int bios_size; |
| 78 | extern int cirrus_vga_enabled; | 77 | extern int cirrus_vga_enabled; |
| 79 | extern int vmsvga_enabled; | 78 | extern int vmsvga_enabled; |
target-i386/helper.c
| @@ -1747,7 +1747,21 @@ void helper_cpuid(void) | @@ -1747,7 +1747,21 @@ void helper_cpuid(void) | ||
| 1747 | break; | 1747 | break; |
| 1748 | case 0x80000008: | 1748 | case 0x80000008: |
| 1749 | /* virtual & phys address size in low 2 bytes. */ | 1749 | /* virtual & phys address size in low 2 bytes. */ |
| 1750 | - EAX = 0x00003028; | 1750 | +/* XXX: This value must match the one used in the MMU code. */ |
| 1751 | +#if defined(TARGET_X86_64) | ||
| 1752 | +# if defined(USE_KQEMU) | ||
| 1753 | + EAX = 0x00003020; /* 48 bits virtual, 32 bits physical */ | ||
| 1754 | +# else | ||
| 1755 | +/* XXX: The physical address space is limited to 42 bits in exec.c. */ | ||
| 1756 | + EAX = 0x00003028; /* 48 bits virtual, 40 bits physical */ | ||
| 1757 | +# endif | ||
| 1758 | +#else | ||
| 1759 | +# if defined(USE_KQEMU) | ||
| 1760 | + EAX = 0x00000020; /* 32 bits physical */ | ||
| 1761 | +# else | ||
| 1762 | + EAX = 0x00000024; /* 36 bits physical */ | ||
| 1763 | +# endif | ||
| 1764 | +#endif | ||
| 1751 | EBX = 0; | 1765 | EBX = 0; |
| 1752 | ECX = 0; | 1766 | ECX = 0; |
| 1753 | EDX = 0; | 1767 | EDX = 0; |
target-i386/helper2.c
| @@ -800,8 +800,17 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) | @@ -800,8 +800,17 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) | ||
| 800 | 800 | ||
| 801 | #else | 801 | #else |
| 802 | 802 | ||
| 803 | -/* Bits 52-62 of a PTE are reserved. Bit 63 is the NX bit. */ | ||
| 804 | -#define PHYS_ADDR_MASK 0xffffffffff000L | 803 | +/* XXX: This value should match the one returned by CPUID |
| 804 | + * and in exec.c */ | ||
| 805 | +#if defined(USE_KQEMU) | ||
| 806 | +#define PHYS_ADDR_MASK 0xfffff000L | ||
| 807 | +#else | ||
| 808 | +# if defined(TARGET_X86_64) | ||
| 809 | +# define PHYS_ADDR_MASK 0xfffffff000L | ||
| 810 | +# else | ||
| 811 | +# define PHYS_ADDR_MASK 0xffffff000L | ||
| 812 | +# endif | ||
| 813 | +#endif | ||
| 805 | 814 | ||
| 806 | /* return value: | 815 | /* return value: |
| 807 | -1 = cannot handle fault | 816 | -1 = cannot handle fault |
vl.c
| @@ -142,8 +142,6 @@ int inet_aton(const char *cp, struct in_addr *ia); | @@ -142,8 +142,6 @@ int inet_aton(const char *cp, struct in_addr *ia); | ||
| 142 | //#define DEBUG_UNUSED_IOPORT | 142 | //#define DEBUG_UNUSED_IOPORT |
| 143 | //#define DEBUG_IOPORT | 143 | //#define DEBUG_IOPORT |
| 144 | 144 | ||
| 145 | -#define PHYS_RAM_MAX_SIZE (2047 * 1024 * 1024) | ||
| 146 | - | ||
| 147 | #ifdef TARGET_PPC | 145 | #ifdef TARGET_PPC |
| 148 | #define DEFAULT_RAM_SIZE 144 | 146 | #define DEFAULT_RAM_SIZE 144 |
| 149 | #else | 147 | #else |
| @@ -175,7 +173,7 @@ int nographic; | @@ -175,7 +173,7 @@ int nographic; | ||
| 175 | int curses; | 173 | int curses; |
| 176 | const char* keyboard_layout = NULL; | 174 | const char* keyboard_layout = NULL; |
| 177 | int64_t ticks_per_sec; | 175 | int64_t ticks_per_sec; |
| 178 | -int ram_size; | 176 | +ram_addr_t ram_size; |
| 179 | int pit_min_timer_count = 0; | 177 | int pit_min_timer_count = 0; |
| 180 | int nb_nics; | 178 | int nb_nics; |
| 181 | NICInfo nd_table[MAX_NICS]; | 179 | NICInfo nd_table[MAX_NICS]; |
| @@ -6877,7 +6875,8 @@ static int ram_get_page(QEMUFile *f, uint8_t *buf, int len) | @@ -6877,7 +6875,8 @@ static int ram_get_page(QEMUFile *f, uint8_t *buf, int len) | ||
| 6877 | 6875 | ||
| 6878 | static int ram_load_v1(QEMUFile *f, void *opaque) | 6876 | static int ram_load_v1(QEMUFile *f, void *opaque) |
| 6879 | { | 6877 | { |
| 6880 | - int i, ret; | 6878 | + int ret; |
| 6879 | + ram_addr_t i; | ||
| 6881 | 6880 | ||
| 6882 | if (qemu_get_be32(f) != phys_ram_size) | 6881 | if (qemu_get_be32(f) != phys_ram_size) |
| 6883 | return -EINVAL; | 6882 | return -EINVAL; |
| @@ -7013,7 +7012,7 @@ static void ram_decompress_close(RamDecompressState *s) | @@ -7013,7 +7012,7 @@ static void ram_decompress_close(RamDecompressState *s) | ||
| 7013 | 7012 | ||
| 7014 | static void ram_save(QEMUFile *f, void *opaque) | 7013 | static void ram_save(QEMUFile *f, void *opaque) |
| 7015 | { | 7014 | { |
| 7016 | - int i; | 7015 | + ram_addr_t i; |
| 7017 | RamCompressState s1, *s = &s1; | 7016 | RamCompressState s1, *s = &s1; |
| 7018 | uint8_t buf[10]; | 7017 | uint8_t buf[10]; |
| 7019 | 7018 | ||
| @@ -7058,7 +7057,7 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id) | @@ -7058,7 +7057,7 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id) | ||
| 7058 | { | 7057 | { |
| 7059 | RamDecompressState s1, *s = &s1; | 7058 | RamDecompressState s1, *s = &s1; |
| 7060 | uint8_t buf[10]; | 7059 | uint8_t buf[10]; |
| 7061 | - int i; | 7060 | + ram_addr_t i; |
| 7062 | 7061 | ||
| 7063 | if (version_id == 1) | 7062 | if (version_id == 1) |
| 7064 | return ram_load_v1(f, opaque); | 7063 | return ram_load_v1(f, opaque); |
| @@ -7075,7 +7074,7 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id) | @@ -7075,7 +7074,7 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id) | ||
| 7075 | } | 7074 | } |
| 7076 | if (buf[0] == 0) { | 7075 | if (buf[0] == 0) { |
| 7077 | if (ram_decompress_buf(s, phys_ram_base + i, BDRV_HASH_BLOCK_SIZE) < 0) { | 7076 | if (ram_decompress_buf(s, phys_ram_base + i, BDRV_HASH_BLOCK_SIZE) < 0) { |
| 7078 | - fprintf(stderr, "Error while reading ram block address=0x%08x", i); | 7077 | + fprintf(stderr, "Error while reading ram block address=0x%08" PRIx64, (uint64_t)i); |
| 7079 | goto error; | 7078 | goto error; |
| 7080 | } | 7079 | } |
| 7081 | } else | 7080 | } else |
| @@ -8557,16 +8556,39 @@ int main(int argc, char **argv) | @@ -8557,16 +8556,39 @@ int main(int argc, char **argv) | ||
| 8557 | case QEMU_OPTION_h: | 8556 | case QEMU_OPTION_h: |
| 8558 | help(0); | 8557 | help(0); |
| 8559 | break; | 8558 | break; |
| 8560 | - case QEMU_OPTION_m: | ||
| 8561 | - ram_size = atoi(optarg) * 1024 * 1024; | ||
| 8562 | - if (ram_size <= 0) | ||
| 8563 | - help(1); | ||
| 8564 | - if (ram_size > PHYS_RAM_MAX_SIZE) { | ||
| 8565 | - fprintf(stderr, "qemu: at most %d MB RAM can be simulated\n", | ||
| 8566 | - PHYS_RAM_MAX_SIZE / (1024 * 1024)); | 8559 | + case QEMU_OPTION_m: { |
| 8560 | + uint64_t value; | ||
| 8561 | + char *ptr; | ||
| 8562 | + | ||
| 8563 | + value = strtoul(optarg, &ptr, 10); | ||
| 8564 | + switch (*ptr) { | ||
| 8565 | + case 0: case 'M': case 'm': | ||
| 8566 | + value <<= 20; | ||
| 8567 | + break; | ||
| 8568 | + case 'G': case 'g': | ||
| 8569 | + value <<= 30; | ||
| 8570 | + break; | ||
| 8571 | + default: | ||
| 8572 | + fprintf(stderr, "qemu: invalid ram size: %s\n", optarg); | ||
| 8567 | exit(1); | 8573 | exit(1); |
| 8568 | } | 8574 | } |
| 8575 | + | ||
| 8576 | + /* On 32-bit hosts, QEMU is limited by virtual address space */ | ||
| 8577 | + if (value > (2047 << 20) | ||
| 8578 | +#ifndef USE_KQEMU | ||
| 8579 | + && HOST_LONG_BITS == 32 | ||
| 8580 | +#endif | ||
| 8581 | + ) { | ||
| 8582 | + fprintf(stderr, "qemu: at most 2047 MB RAM can be simulated\n"); | ||
| 8583 | + exit(1); | ||
| 8584 | + } | ||
| 8585 | + if (value != (uint64_t)(ram_addr_t)value) { | ||
| 8586 | + fprintf(stderr, "qemu: ram size too large\n"); | ||
| 8587 | + exit(1); | ||
| 8588 | + } | ||
| 8589 | + ram_size = value; | ||
| 8569 | break; | 8590 | break; |
| 8591 | + } | ||
| 8570 | case QEMU_OPTION_d: | 8592 | case QEMU_OPTION_d: |
| 8571 | { | 8593 | { |
| 8572 | int mask; | 8594 | int mask; |