Commit 00af685fc974e4941ef2d309a2e8818d311a370c
1 parent
217fae2d
We never have to export ppc_set_irq.
Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
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45 additions
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14 deletions
hw/ppc.c
@@ -30,7 +30,7 @@ | @@ -30,7 +30,7 @@ | ||
30 | extern FILE *logfile; | 30 | extern FILE *logfile; |
31 | extern int loglevel; | 31 | extern int loglevel; |
32 | 32 | ||
33 | -void ppc_set_irq (CPUState *env, int n_IRQ, int level) | 33 | +static void ppc_set_irq (CPUState *env, int n_IRQ, int level) |
34 | { | 34 | { |
35 | if (level) { | 35 | if (level) { |
36 | env->pending_interrupts |= 1 << n_IRQ; | 36 | env->pending_interrupts |= 1 << n_IRQ; |
@@ -162,6 +162,7 @@ void ppc6xx_irq_init (CPUState *env) | @@ -162,6 +162,7 @@ void ppc6xx_irq_init (CPUState *env) | ||
162 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env, 6); | 162 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env, 6); |
163 | } | 163 | } |
164 | 164 | ||
165 | +#if defined(TARGET_PPC64) | ||
165 | /* PowerPC 970 internal IRQ controller */ | 166 | /* PowerPC 970 internal IRQ controller */ |
166 | static void ppc970_set_irq (void *opaque, int pin, int level) | 167 | static void ppc970_set_irq (void *opaque, int pin, int level) |
167 | { | 168 | { |
@@ -283,6 +284,7 @@ void ppc970_irq_init (CPUState *env) | @@ -283,6 +284,7 @@ void ppc970_irq_init (CPUState *env) | ||
283 | { | 284 | { |
284 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env, 7); | 285 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env, 7); |
285 | } | 286 | } |
287 | +#endif /* defined(TARGET_PPC64) */ | ||
286 | 288 | ||
287 | /* PowerPC 40x internal IRQ controller */ | 289 | /* PowerPC 40x internal IRQ controller */ |
288 | static void ppc40x_set_irq (void *opaque, int pin, int level) | 290 | static void ppc40x_set_irq (void *opaque, int pin, int level) |
hw/ppc_chrp.c
@@ -491,6 +491,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | @@ -491,6 +491,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | ||
491 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | 491 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
492 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | 492 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; |
493 | break; | 493 | break; |
494 | +#if defined(TARGET_PPC64) | ||
494 | case PPC_FLAGS_INPUT_970: | 495 | case PPC_FLAGS_INPUT_970: |
495 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | 496 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); |
496 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | 497 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
@@ -505,6 +506,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | @@ -505,6 +506,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | ||
505 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | 506 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
506 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | 507 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; |
507 | break; | 508 | break; |
509 | +#endif /* defined(TARGET_PPC64) */ | ||
508 | default: | 510 | default: |
509 | cpu_abort(env, "Bus model not supported on mac99 machine\n"); | 511 | cpu_abort(env, "Bus model not supported on mac99 machine\n"); |
510 | exit(1); | 512 | exit(1); |
target-ppc/cpu.h
@@ -94,8 +94,6 @@ enum { | @@ -94,8 +94,6 @@ enum { | ||
94 | POWERPC_MMU_UNKNOWN = 0, | 94 | POWERPC_MMU_UNKNOWN = 0, |
95 | /* Standard 32 bits PowerPC MMU */ | 95 | /* Standard 32 bits PowerPC MMU */ |
96 | POWERPC_MMU_32B, | 96 | POWERPC_MMU_32B, |
97 | - /* Standard 64 bits PowerPC MMU */ | ||
98 | - POWERPC_MMU_64B, | ||
99 | /* PowerPC 601 MMU */ | 97 | /* PowerPC 601 MMU */ |
100 | POWERPC_MMU_601, | 98 | POWERPC_MMU_601, |
101 | /* PowerPC 6xx MMU with software TLB */ | 99 | /* PowerPC 6xx MMU with software TLB */ |
@@ -112,8 +110,12 @@ enum { | @@ -112,8 +110,12 @@ enum { | ||
112 | POWERPC_MMU_BOOKE, | 110 | POWERPC_MMU_BOOKE, |
113 | /* BookE FSL MMU model */ | 111 | /* BookE FSL MMU model */ |
114 | POWERPC_MMU_BOOKE_FSL, | 112 | POWERPC_MMU_BOOKE_FSL, |
113 | +#if defined(TARGET_PPC64) | ||
114 | + /* Standard 64 bits PowerPC MMU */ | ||
115 | + POWERPC_MMU_64B, | ||
115 | /* 64 bits "bridge" PowerPC MMU */ | 116 | /* 64 bits "bridge" PowerPC MMU */ |
116 | POWERPC_MMU_64BRIDGE, | 117 | POWERPC_MMU_64BRIDGE, |
118 | +#endif /* defined(TARGET_PPC64) */ | ||
117 | }; | 119 | }; |
118 | 120 | ||
119 | /*****************************************************************************/ | 121 | /*****************************************************************************/ |
@@ -142,10 +144,12 @@ enum { | @@ -142,10 +144,12 @@ enum { | ||
142 | POWERPC_EXCP_7x5, | 144 | POWERPC_EXCP_7x5, |
143 | /* PowerPC 74xx exception model */ | 145 | /* PowerPC 74xx exception model */ |
144 | POWERPC_EXCP_74xx, | 146 | POWERPC_EXCP_74xx, |
145 | - /* PowerPC 970 exception model */ | ||
146 | - POWERPC_EXCP_970, | ||
147 | /* BookE exception model */ | 147 | /* BookE exception model */ |
148 | POWERPC_EXCP_BOOKE, | 148 | POWERPC_EXCP_BOOKE, |
149 | +#if defined(TARGET_PPC64) | ||
150 | + /* PowerPC 970 exception model */ | ||
151 | + POWERPC_EXCP_970, | ||
152 | +#endif /* defined(TARGET_PPC64) */ | ||
149 | }; | 153 | }; |
150 | 154 | ||
151 | /*****************************************************************************/ | 155 | /*****************************************************************************/ |
@@ -1133,6 +1137,7 @@ enum { | @@ -1133,6 +1137,7 @@ enum { | ||
1133 | PPC40x_INPUT_NB, | 1137 | PPC40x_INPUT_NB, |
1134 | }; | 1138 | }; |
1135 | 1139 | ||
1140 | +#if defined(TARGET_PPC64) | ||
1136 | enum { | 1141 | enum { |
1137 | /* PowerPC 620 (and probably others) input pins */ | 1142 | /* PowerPC 620 (and probably others) input pins */ |
1138 | PPC620_INPUT_HRESET = 0, | 1143 | PPC620_INPUT_HRESET = 0, |
@@ -1155,6 +1160,7 @@ enum { | @@ -1155,6 +1160,7 @@ enum { | ||
1155 | PPC970_INPUT_INT = 5, | 1160 | PPC970_INPUT_INT = 5, |
1156 | PPC970_INPUT_THINT = 6, | 1161 | PPC970_INPUT_THINT = 6, |
1157 | }; | 1162 | }; |
1163 | +#endif | ||
1158 | 1164 | ||
1159 | /* Hardware exceptions definitions */ | 1165 | /* Hardware exceptions definitions */ |
1160 | enum { | 1166 | enum { |
target-ppc/helper.c
@@ -1612,10 +1612,16 @@ void ppc_tlb_invalidate_all (CPUPPCState *env) | @@ -1612,10 +1612,16 @@ void ppc_tlb_invalidate_all (CPUPPCState *env) | ||
1612 | cpu_abort(env, "MMU model not implemented\n"); | 1612 | cpu_abort(env, "MMU model not implemented\n"); |
1613 | break; | 1613 | break; |
1614 | case POWERPC_MMU_32B: | 1614 | case POWERPC_MMU_32B: |
1615 | +#if defined(TARGET_PPC64) | ||
1615 | case POWERPC_MMU_64B: | 1616 | case POWERPC_MMU_64B: |
1616 | case POWERPC_MMU_64BRIDGE: | 1617 | case POWERPC_MMU_64BRIDGE: |
1618 | +#endif /* defined(TARGET_PPC64) */ | ||
1617 | tlb_flush(env, 1); | 1619 | tlb_flush(env, 1); |
1618 | break; | 1620 | break; |
1621 | + default: | ||
1622 | + /* XXX: TODO */ | ||
1623 | + cpu_abort(env, "Unknown MMU model %d\n", env->mmu_model); | ||
1624 | + break; | ||
1619 | } | 1625 | } |
1620 | } | 1626 | } |
1621 | 1627 | ||
@@ -1672,14 +1678,21 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr) | @@ -1672,14 +1678,21 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr) | ||
1672 | tlb_flush_page(env, addr | (0xE << 28)); | 1678 | tlb_flush_page(env, addr | (0xE << 28)); |
1673 | tlb_flush_page(env, addr | (0xF << 28)); | 1679 | tlb_flush_page(env, addr | (0xF << 28)); |
1674 | break; | 1680 | break; |
1681 | +#if defined(TARGET_PPC64) | ||
1675 | case POWERPC_MMU_64B: | 1682 | case POWERPC_MMU_64B: |
1676 | case POWERPC_MMU_64BRIDGE: | 1683 | case POWERPC_MMU_64BRIDGE: |
1677 | /* tlbie invalidate TLBs for all segments */ | 1684 | /* tlbie invalidate TLBs for all segments */ |
1678 | /* XXX: given the fact that there are too many segments to invalidate, | 1685 | /* XXX: given the fact that there are too many segments to invalidate, |
1686 | + * and we still don't have a tlb_flush_mask(env, n, mask) in Qemu, | ||
1679 | * we just invalidate all TLBs | 1687 | * we just invalidate all TLBs |
1680 | */ | 1688 | */ |
1681 | tlb_flush(env, 1); | 1689 | tlb_flush(env, 1); |
1682 | break; | 1690 | break; |
1691 | +#endif /* defined(TARGET_PPC64) */ | ||
1692 | + default: | ||
1693 | + /* XXX: TODO */ | ||
1694 | + cpu_abort(env, "Unknown MMU model 2\n"); | ||
1695 | + break; | ||
1683 | } | 1696 | } |
1684 | #else | 1697 | #else |
1685 | ppc_tlb_invalidate_all(env); | 1698 | ppc_tlb_invalidate_all(env); |
target-ppc/translate_init.c
@@ -4448,6 +4448,7 @@ enum { | @@ -4448,6 +4448,7 @@ enum { | ||
4448 | CPU_POWERPC_74x7_v11 = 0x80030101, /* aka B: 1.1 */ | 4448 | CPU_POWERPC_74x7_v11 = 0x80030101, /* aka B: 1.1 */ |
4449 | CPU_POWERPC_74x7_v12 = 0x80020102, /* aka C: 1.2 */ | 4449 | CPU_POWERPC_74x7_v12 = 0x80020102, /* aka C: 1.2 */ |
4450 | /* 64 bits PowerPC */ | 4450 | /* 64 bits PowerPC */ |
4451 | +#if defined(TARGET_PPC64) | ||
4451 | CPU_POWERPC_620 = 0x00140000, | 4452 | CPU_POWERPC_620 = 0x00140000, |
4452 | CPU_POWERPC_630 = 0x00400000, | 4453 | CPU_POWERPC_630 = 0x00400000, |
4453 | CPU_POWERPC_631 = 0x00410104, | 4454 | CPU_POWERPC_631 = 0x00410104, |
@@ -4481,6 +4482,7 @@ enum { | @@ -4481,6 +4482,7 @@ enum { | ||
4481 | CPU_POWERPC_RS64II = 0x00340000, | 4482 | CPU_POWERPC_RS64II = 0x00340000, |
4482 | CPU_POWERPC_RS64III = 0x00360000, | 4483 | CPU_POWERPC_RS64III = 0x00360000, |
4483 | CPU_POWERPC_RS64IV = 0x00370000, | 4484 | CPU_POWERPC_RS64IV = 0x00370000, |
4485 | +#endif /* defined(TARGET_PPC64) */ | ||
4484 | /* Original POWER */ | 4486 | /* Original POWER */ |
4485 | /* XXX: should be POWER (RIOS), RSC3308, RSC4608, | 4487 | /* XXX: should be POWER (RIOS), RSC3308, RSC4608, |
4486 | * POWER2 (RIOS2) & RSC2 (P2SC) here | 4488 | * POWER2 (RIOS2) & RSC2 (P2SC) here |
@@ -5835,9 +5837,6 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | @@ -5835,9 +5837,6 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | ||
5835 | case POWERPC_MMU_32B: | 5837 | case POWERPC_MMU_32B: |
5836 | mmu_model = "PowerPC 32"; | 5838 | mmu_model = "PowerPC 32"; |
5837 | break; | 5839 | break; |
5838 | - case POWERPC_MMU_64B: | ||
5839 | - mmu_model = "PowerPC 64"; | ||
5840 | - break; | ||
5841 | case POWERPC_MMU_601: | 5840 | case POWERPC_MMU_601: |
5842 | mmu_model = "PowerPC 601"; | 5841 | mmu_model = "PowerPC 601"; |
5843 | break; | 5842 | break; |
@@ -5863,9 +5862,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | @@ -5863,9 +5862,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | ||
5863 | case POWERPC_MMU_BOOKE_FSL: | 5862 | case POWERPC_MMU_BOOKE_FSL: |
5864 | mmu_model = "PowerPC BookE FSL"; | 5863 | mmu_model = "PowerPC BookE FSL"; |
5865 | break; | 5864 | break; |
5865 | +#if defined (TARGET_PPC64) | ||
5866 | + case POWERPC_MMU_64B: | ||
5867 | + mmu_model = "PowerPC 64"; | ||
5868 | + break; | ||
5866 | case POWERPC_MMU_64BRIDGE: | 5869 | case POWERPC_MMU_64BRIDGE: |
5867 | mmu_model = "PowerPC 64 bridge"; | 5870 | mmu_model = "PowerPC 64 bridge"; |
5868 | break; | 5871 | break; |
5872 | +#endif | ||
5869 | default: | 5873 | default: |
5870 | mmu_model = "Unknown or invalid"; | 5874 | mmu_model = "Unknown or invalid"; |
5871 | break; | 5875 | break; |
@@ -5901,12 +5905,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | @@ -5901,12 +5905,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | ||
5901 | case POWERPC_EXCP_74xx: | 5905 | case POWERPC_EXCP_74xx: |
5902 | excp_model = "PowerPC 74xx"; | 5906 | excp_model = "PowerPC 74xx"; |
5903 | break; | 5907 | break; |
5904 | - case POWERPC_EXCP_970: | ||
5905 | - excp_model = "PowerPC 970"; | ||
5906 | - break; | ||
5907 | case POWERPC_EXCP_BOOKE: | 5908 | case POWERPC_EXCP_BOOKE: |
5908 | excp_model = "PowerPC BookE"; | 5909 | excp_model = "PowerPC BookE"; |
5909 | break; | 5910 | break; |
5911 | +#if defined (TARGET_PPC64) | ||
5912 | + case POWERPC_EXCP_970: | ||
5913 | + excp_model = "PowerPC 970"; | ||
5914 | + break; | ||
5915 | +#endif | ||
5910 | default: | 5916 | default: |
5911 | excp_model = "Unknown or invalid"; | 5917 | excp_model = "Unknown or invalid"; |
5912 | break; | 5918 | break; |
@@ -5921,12 +5927,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | @@ -5921,12 +5927,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) | ||
5921 | case PPC_FLAGS_INPUT_405: | 5927 | case PPC_FLAGS_INPUT_405: |
5922 | bus_model = "PowerPC 405"; | 5928 | bus_model = "PowerPC 405"; |
5923 | break; | 5929 | break; |
5924 | - case PPC_FLAGS_INPUT_970: | ||
5925 | - bus_model = "PowerPC 970"; | ||
5926 | - break; | ||
5927 | case PPC_FLAGS_INPUT_401: | 5930 | case PPC_FLAGS_INPUT_401: |
5928 | bus_model = "PowerPC 401/403"; | 5931 | bus_model = "PowerPC 401/403"; |
5929 | break; | 5932 | break; |
5933 | +#if defined (TARGET_PPC64) | ||
5934 | + case PPC_FLAGS_INPUT_970: | ||
5935 | + bus_model = "PowerPC 970"; | ||
5936 | + break; | ||
5937 | +#endif | ||
5930 | default: | 5938 | default: |
5931 | bus_model = "Unknown or invalid"; | 5939 | bus_model = "Unknown or invalid"; |
5932 | break; | 5940 | break; |