We never have to export ppc_set_irq.

Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162

We never have to export ppc_set_irq.
Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
j_mayer
1 parent 217fae2d
Showing 5 changed files with 45 additions and 14 deletions
hw/ppc.c
hw/ppc_chrp.c
target-ppc/cpu.h
target-ppc/helper.c
target-ppc/translate_init.c
@@ -30,7 +30,7 @@
 extern FILE *logfile;
 extern int loglevel;
-void ppc_set_irq (CPUState *env, int n_IRQ, int level)
+static void ppc_set_irq (CPUState *env, int n_IRQ, int level)
 {
     if (level) {
         env->pending_interrupts |= 1 << n_IRQ;
@@ -162,6 +162,7 @@ void ppc6xx_irq_init (CPUState *env)
     env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env, 6);
 }
+#if defined(TARGET_PPC64)
 /* PowerPC 970 internal IRQ controller */
 static void ppc970_set_irq (void *opaque, int pin, int level)
 {
@@ -283,6 +284,7 @@ void ppc970_irq_init (CPUState *env)
 {
     env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env, 7);
 }
+#endif /* defined(TARGET_PPC64) */
 /* PowerPC 40x internal IRQ controller */
 static void ppc40x_set_irq (void *opaque, int pin, int level)
@@ -491,6 +491,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device,
                 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                     ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
                 break;
+#if defined(TARGET_PPC64)
             case PPC_FLAGS_INPUT_970:
                 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
                 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
@@ -505,6 +506,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device,
                 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                     ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
                 break;
+#endif /* defined(TARGET_PPC64) */
             default:
                 cpu_abort(env, "Bus model not supported on mac99 machine\n");
                 exit(1);
@@ -94,8 +94,6 @@ enum {
     POWERPC_MMU_UNKNOWN    = 0,
     /* Standard 32 bits PowerPC MMU                            */
     POWERPC_MMU_32B,
-    /* Standard 64 bits PowerPC MMU                            */
-    POWERPC_MMU_64B,
     /* PowerPC 601 MMU                                         */
     POWERPC_MMU_601,
     /* PowerPC 6xx MMU with software TLB                       */
@@ -112,8 +110,12 @@ enum {
     POWERPC_MMU_BOOKE,
     /* BookE FSL MMU model                                     */
     POWERPC_MMU_BOOKE_FSL,
+#if defined(TARGET_PPC64)
+    /* Standard 64 bits PowerPC MMU                            */
+    POWERPC_MMU_64B,
     /* 64 bits "bridge" PowerPC MMU                            */
     POWERPC_MMU_64BRIDGE,
+#endif /* defined(TARGET_PPC64) */
 };
 /*****************************************************************************/
@@ -142,10 +144,12 @@ enum {
     POWERPC_EXCP_7x5,
     /* PowerPC 74xx exception model     */
     POWERPC_EXCP_74xx,
-    /* PowerPC 970 exception model      */
-    POWERPC_EXCP_970,
     /* BookE exception model            */
     POWERPC_EXCP_BOOKE,
+#if defined(TARGET_PPC64)
+    /* PowerPC 970 exception model      */
+    POWERPC_EXCP_970,
+#endif /* defined(TARGET_PPC64) */
 };
 /*****************************************************************************/
@@ -1133,6 +1137,7 @@ enum {
     PPC40x_INPUT_NB,
 };
+#if defined(TARGET_PPC64)
 enum {
     /* PowerPC 620 (and probably others) input pins */
     PPC620_INPUT_HRESET     = 0,
@@ -1155,6 +1160,7 @@ enum {
     PPC970_INPUT_INT        = 5,
     PPC970_INPUT_THINT      = 6,
 };
+#endif
 /* Hardware exceptions definitions */
 enum {
@@ -1612,10 +1612,16 @@ void ppc_tlb_invalidate_all (CPUPPCState *env)
         cpu_abort(env, "MMU model not implemented\n");
         break;
     case POWERPC_MMU_32B:
+#if defined(TARGET_PPC64)
     case POWERPC_MMU_64B:
     case POWERPC_MMU_64BRIDGE:
+#endif /* defined(TARGET_PPC64) */
         tlb_flush(env, 1);
         break;
+    default:
+        /* XXX: TODO */
+        cpu_abort(env, "Unknown MMU model %d\n", env->mmu_model);
+        break;
     }
 }
@@ -1672,14 +1678,21 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr)
         tlb_flush_page(env, addr | (0xE << 28));
         tlb_flush_page(env, addr | (0xF << 28));
         break;
+#if defined(TARGET_PPC64)
     case POWERPC_MMU_64B:
     case POWERPC_MMU_64BRIDGE:
         /* tlbie invalidate TLBs for all segments */
         /* XXX: given the fact that there are too many segments to invalidate,
+         *      and we still don't have a tlb_flush_mask(env, n, mask) in Qemu,
          *      we just invalidate all TLBs
          */
         tlb_flush(env, 1);
         break;
+#endif /* defined(TARGET_PPC64) */
+    default:
+        /* XXX: TODO */
+        cpu_abort(env, "Unknown MMU model 2\n");
+        break;
     }
 #else
     ppc_tlb_invalidate_all(env);
@@ -4448,6 +4448,7 @@ enum {
     CPU_POWERPC_74x7_v11    = 0x80030101, /* aka B: 1.1 */
     CPU_POWERPC_74x7_v12    = 0x80020102, /* aka C: 1.2 */
     /* 64 bits PowerPC */
+#if defined(TARGET_PPC64)
     CPU_POWERPC_620         = 0x00140000,
     CPU_POWERPC_630         = 0x00400000,
     CPU_POWERPC_631         = 0x00410104,
@@ -4481,6 +4482,7 @@ enum {
     CPU_POWERPC_RS64II      = 0x00340000,
     CPU_POWERPC_RS64III     = 0x00360000,
     CPU_POWERPC_RS64IV      = 0x00370000,
+#endif /* defined(TARGET_PPC64) */
     /* Original POWER */
     /* XXX: should be POWER (RIOS), RSC3308, RSC4608,
      * POWER2 (RIOS2) & RSC2 (P2SC) here
@@ -5835,9 +5837,6 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
         case POWERPC_MMU_32B:
             mmu_model = "PowerPC 32";
             break;
-        case POWERPC_MMU_64B:
-            mmu_model = "PowerPC 64";
-            break;
         case POWERPC_MMU_601:
             mmu_model = "PowerPC 601";
             break;
@@ -5863,9 +5862,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
         case POWERPC_MMU_BOOKE_FSL:
             mmu_model = "PowerPC BookE FSL";
             break;
+#if defined (TARGET_PPC64)
+        case POWERPC_MMU_64B:
+            mmu_model = "PowerPC 64";
+            break;
         case POWERPC_MMU_64BRIDGE:
             mmu_model = "PowerPC 64 bridge";
             break;
+#endif
         default:
             mmu_model = "Unknown or invalid";
             break;
@@ -5901,12 +5905,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
         case POWERPC_EXCP_74xx:
             excp_model = "PowerPC 74xx";
             break;
-        case POWERPC_EXCP_970:
-            excp_model = "PowerPC 970";
-            break;
         case POWERPC_EXCP_BOOKE:
             excp_model = "PowerPC BookE";
             break;
+#if defined (TARGET_PPC64)
+        case POWERPC_EXCP_970:
+            excp_model = "PowerPC 970";
+            break;
+#endif
         default:
             excp_model = "Unknown or invalid";
             break;
@@ -5921,12 +5927,14 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
         case PPC_FLAGS_INPUT_405:
             bus_model = "PowerPC 405";
             break;
-        case PPC_FLAGS_INPUT_970:
-            bus_model = "PowerPC 970";
-            break;
         case PPC_FLAGS_INPUT_401:
             bus_model = "PowerPC 401/403";
             break;
+#if defined (TARGET_PPC64)
+        case PPC_FLAGS_INPUT_970:
+            bus_model = "PowerPC 970";
+            break;
+#endif
         default:
             bus_model = "Unknown or invalid";
             break;